mirror of https://github.com/snes9xgit/snes9x.git
Go back to allowing writes to 4200 and vtimerpos to trigger immediately.
This commit is contained in:
parent
7d5128d294
commit
756f370021
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@ -245,7 +245,7 @@ void S9xMainLoop (void)
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if ((CPU.Cycles >= Timings.NextIRQTimer))
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{
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S9xUpdateIRQPositions();
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S9xUpdateIRQPositions(false);
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#ifdef DEBUGGER
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S9xTraceMessage ("Timer triggered\n");
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22
ppu.cpp
22
ppu.cpp
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@ -285,7 +285,7 @@ static int CyclesUntilNext (int hc, int vc)
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}
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else
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{
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if (vc == vpos && (hc > CPU.Cycles || !PPU.HTimerEnabled))
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if (vc == vpos && (hc > CPU.Cycles))
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{
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return hc;
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}
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@ -304,7 +304,7 @@ static int CyclesUntilNext (int hc, int vc)
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return total;
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}
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void S9xUpdateIRQPositions ()
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void S9xUpdateIRQPositions (bool initial)
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{
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PPU.HTimerPosition = PPU.IRQHBeamPos * ONE_DOT_CYCLE + Timings.IRQTriggerCycles;
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PPU.HTimerPosition -= PPU.IRQHBeamPos ? 0 : ONE_DOT_CYCLE;
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@ -336,6 +336,9 @@ void S9xUpdateIRQPositions ()
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}
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else if (!PPU.HTimerEnabled && PPU.VTimerEnabled)
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{
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if (CPU.V_Counter == PPU.VTimerPosition && initial)
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Timings.NextIRQTimer = CPU.Cycles + Timings.IRQTriggerCycles;
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else
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Timings.NextIRQTimer = CyclesUntilNext (Timings.IRQTriggerCycles, PPU.VTimerPosition);
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}
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else
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@ -1547,9 +1550,11 @@ void S9xSetCPU (uint8 Byte, uint16 Address)
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if (Settings.TraceHCEvent)
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S9xTraceFormattedMessage("Write to 0x4200. Byte is %2x was %2x\n", Byte, Memory.FillRAM[Address]);
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#endif
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if (Byte & 0x20)
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{
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PPU.VTimerEnabled = TRUE;
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#ifdef DEBUGGER
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missing.virq = 1;
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missing.virq_pos = PPU.IRQVBeamPos;
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@ -1561,6 +1566,7 @@ void S9xSetCPU (uint8 Byte, uint16 Address)
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if (Byte & 0x10)
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{
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PPU.HTimerEnabled = TRUE;
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#ifdef DEBUGGER
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missing.hirq = 1;
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missing.hirq_pos = PPU.IRQHBeamPos;
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@ -1575,13 +1581,12 @@ void S9xSetCPU (uint8 Byte, uint16 Address)
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CPU.IRQTransition = FALSE;
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}
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S9xUpdateIRQPositions();
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S9xUpdateIRQPositions(true);
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// NMI can trigger immediately during VBlank as long as NMI_read ($4210) wasn't cleard.
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if ((Byte & 0x80) && !(Memory.FillRAM[0x4200] & 0x80) &&
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(CPU.V_Counter >= PPU.ScreenHeight + FIRST_VISIBLE_LINE) && (Memory.FillRAM[0x4210] & 0x80))
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{
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// FIXME: triggered at HC+=6, checked just before the final CPU cycle,
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// then, when to call S9xOpcode_NMI()?
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CPU.NMIPending = TRUE;
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@ -1591,7 +1596,6 @@ void S9xSetCPU (uint8 Byte, uint16 Address)
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if (Settings.TraceHCEvent)
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S9xTraceFormattedMessage("NMI Triggered on low-to-high occurring at next HC=%d\n", Timings.NMITriggerPos);
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#endif
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}
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#ifdef DEBUGGER
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@ -1642,7 +1646,7 @@ if (Settings.TraceHCEvent)
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pos = PPU.IRQHBeamPos;
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PPU.IRQHBeamPos = (PPU.IRQHBeamPos & 0xff00) | Byte;
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if (PPU.IRQHBeamPos != pos)
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S9xUpdateIRQPositions();
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S9xUpdateIRQPositions(false);
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#ifdef DEBUGGER
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missing.hirq_pos = PPU.IRQHBeamPos;
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#endif
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@ -1652,7 +1656,7 @@ if (Settings.TraceHCEvent)
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pos = PPU.IRQHBeamPos;
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PPU.IRQHBeamPos = (PPU.IRQHBeamPos & 0xff) | ((Byte & 1) << 8);
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if (PPU.IRQHBeamPos != pos)
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S9xUpdateIRQPositions();
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S9xUpdateIRQPositions(false);
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#ifdef DEBUGGER
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missing.hirq_pos = PPU.IRQHBeamPos;
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#endif
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@ -1662,7 +1666,7 @@ if (Settings.TraceHCEvent)
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pos = PPU.IRQVBeamPos;
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PPU.IRQVBeamPos = (PPU.IRQVBeamPos & 0xff00) | Byte;
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if (PPU.IRQVBeamPos != pos)
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S9xUpdateIRQPositions();
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S9xUpdateIRQPositions(true);
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#ifdef DEBUGGER
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missing.virq_pos = PPU.IRQVBeamPos;
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#endif
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@ -1672,7 +1676,7 @@ if (Settings.TraceHCEvent)
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pos = PPU.IRQVBeamPos;
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PPU.IRQVBeamPos = (PPU.IRQVBeamPos & 0xff) | ((Byte & 1) << 8);
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if (PPU.IRQVBeamPos != pos)
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S9xUpdateIRQPositions();
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S9xUpdateIRQPositions(true);
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#ifdef DEBUGGER
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missing.virq_pos = PPU.IRQVBeamPos;
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#endif
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2
ppu.h
2
ppu.h
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@ -389,7 +389,7 @@ void S9xSetPPU (uint8, uint16);
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uint8 S9xGetPPU (uint16);
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void S9xSetCPU (uint8, uint16);
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uint8 S9xGetCPU (uint16);
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void S9xUpdateIRQPositions ();
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void S9xUpdateIRQPositions (bool initial);
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void S9xFixColourBrightness (void);
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void S9xDoAutoJoypad (void);
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@ -1780,7 +1780,7 @@ int S9xUnfreezeFromStream (STREAM stream)
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ICPU.ShiftedDB = Registers.DB << 16;
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S9xSetPCBase(Registers.PBPC);
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S9xUnpackStatus();
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S9xUpdateIRQPositions();
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S9xUpdateIRQPositions(false);
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S9xFixCycles();
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for (int d = 0; d < 8; d++)
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