Remove extra case bracker from 2-cycle MOV opcodes.

This commit is contained in:
Brandon Wright 2011-09-14 17:02:26 -05:00
parent d6e2f1c8e6
commit 6b9d6caf54
1 changed files with 40 additions and 76 deletions

View File

@ -1,112 +1,76 @@
case 0x7d: { case 0x7d: {
switch(opcode_cycle++) { op_io();
case 1: regs.a = regs.x;
op_io(); regs.p.n = !!(regs.a & 0x80);
regs.a = regs.x; regs.p.z = (regs.a == 0);
regs.p.n = !!(regs.a & 0x80); opcode_cycle = 0;
regs.p.z = (regs.a == 0);
opcode_cycle = 0;
break;
}
break; break;
} }
case 0xdd: { case 0xdd: {
switch(opcode_cycle++) { op_io();
case 1: regs.a = regs.y;
op_io(); regs.p.n = !!(regs.a & 0x80);
regs.a = regs.y; regs.p.z = (regs.a == 0);
regs.p.n = !!(regs.a & 0x80); opcode_cycle = 0;
regs.p.z = (regs.a == 0);
opcode_cycle = 0;
break;
}
break; break;
} }
case 0x5d: { case 0x5d: {
switch(opcode_cycle++) { op_io();
case 1: regs.x = regs.a;
op_io(); regs.p.n = !!(regs.x & 0x80);
regs.x = regs.a; regs.p.z = (regs.x == 0);
regs.p.n = !!(regs.x & 0x80); opcode_cycle = 0;
regs.p.z = (regs.x == 0);
opcode_cycle = 0;
break;
}
break; break;
} }
case 0xfd: { case 0xfd: {
switch(opcode_cycle++) { op_io();
case 1: regs.y = regs.a;
op_io(); regs.p.n = !!(regs.y & 0x80);
regs.y = regs.a; regs.p.z = (regs.y == 0);
regs.p.n = !!(regs.y & 0x80); opcode_cycle = 0;
regs.p.z = (regs.y == 0);
opcode_cycle = 0;
break;
}
break; break;
} }
case 0x9d: { case 0x9d: {
switch(opcode_cycle++) { op_io();
case 1: regs.x = regs.sp;
op_io(); regs.p.n = !!(regs.x & 0x80);
regs.x = regs.sp; regs.p.z = (regs.x == 0);
regs.p.n = !!(regs.x & 0x80); opcode_cycle = 0;
regs.p.z = (regs.x == 0);
opcode_cycle = 0;
break;
}
break; break;
} }
case 0xbd: { case 0xbd: {
switch(opcode_cycle++) { op_io();
case 1: regs.sp = regs.x;
op_io(); opcode_cycle = 0;
regs.sp = regs.x;
opcode_cycle = 0;
break;
}
break; break;
} }
case 0xe8: { case 0xe8: {
switch(opcode_cycle++) { regs.a = op_readpc();
case 1: regs.p.n = !!(regs.a & 0x80);
regs.a = op_readpc(); regs.p.z = (regs.a == 0);
regs.p.n = !!(regs.a & 0x80); opcode_cycle = 0;
regs.p.z = (regs.a == 0);
opcode_cycle = 0;
break;
}
break; break;
} }
case 0xcd: { case 0xcd: {
switch(opcode_cycle++) { regs.x = op_readpc();
case 1: regs.p.n = !!(regs.x & 0x80);
regs.x = op_readpc(); regs.p.z = (regs.x == 0);
regs.p.n = !!(regs.x & 0x80); opcode_cycle = 0;
regs.p.z = (regs.x == 0);
opcode_cycle = 0;
break;
}
break; break;
} }
case 0x8d: { case 0x8d: {
switch(opcode_cycle++) { regs.y = op_readpc();
case 1: regs.p.n = !!(regs.y & 0x80);
regs.y = op_readpc(); regs.p.z = (regs.y == 0);
regs.p.n = !!(regs.y & 0x80); opcode_cycle = 0;
regs.p.z = (regs.y == 0);
opcode_cycle = 0;
break;
}
break; break;
} }