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fx: Optimise copying registers on LE platforms 

Use {READ,WRITE}_WORD so that it copies by word on little-endian
platforms. Mark a LUT const for const-correctness.
This commit is contained in:
jSTE0 2022-02-11 22:48:10 +00:00
parent 104769cec0
commit 242238a610
1 changed files with 9 additions and 18 deletions
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27
fxemu.cpp
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@ -218,8 +218,8 @@ static void FxReset (struct FxInfo_s *psFxInfo)
static void fx_readRegisterSpace (void) static void fx_readRegisterSpace (void)
{ {
static uint32 avHeight[] = { 128, 160, 192, 256 }; static const uint32 avHeight[] = { 128, 160, 192, 256 };
static uint32 avMult[] = { 16, 32, 32, 64 }; static const uint32 avMult[] = { 16, 32, 32, 64 };
uint8 *p; uint8 *p;
int n; int n;
@ -228,16 +228,12 @@ static void fx_readRegisterSpace (void)
// Update R0-R15 // Update R0-R15
p = GSU.pvRegisters; p = GSU.pvRegisters;
for (int i = 0; i < 16; i++) for (int i = 0; i < 16; i++, p += 2)
{ GSU.avReg[i] = (uint32) READ_WORD(p);
GSU.avReg[i] = *p++;
GSU.avReg[i] += ((uint32) (*p++)) << 8;
}
// Update other registers // Update other registers
p = GSU.pvRegisters; p = GSU.pvRegisters;
GSU.vStatusReg = (uint32) p[GSU_SFR]; GSU.vStatusReg = (uint32) READ_WORD(&p[GSU_SFR]);
GSU.vStatusReg |= ((uint32) p[GSU_SFR + 1]) << 8;
GSU.vPrgBankReg = (uint32) p[GSU_PBR]; GSU.vPrgBankReg = (uint32) p[GSU_PBR];
GSU.vRomBankReg = (uint32) p[GSU_ROMBR]; GSU.vRomBankReg = (uint32) p[GSU_ROMBR];
GSU.vRamBankReg = ((uint32) p[GSU_RAMBR]) & (FX_RAM_BANKS - 1); GSU.vRamBankReg = ((uint32) p[GSU_RAMBR]) & (FX_RAM_BANKS - 1);
@ -291,11 +287,8 @@ static void fx_writeRegisterSpace (void)
uint8 *p; uint8 *p;
p = GSU.pvRegisters; p = GSU.pvRegisters;
for (int i = 0; i < 16; i++) for (int i = 0; i < 16; i++, p += 2)
{ WRITE_WORD(p, GSU.avReg[i]);
*p++ = (uint8) GSU.avReg[i];
*p++ = (uint8) (GSU.avReg[i] >> 8);
}
// Update status register // Update status register
if (USEX16(GSU.vZero) == 0) if (USEX16(GSU.vZero) == 0)
@ -319,13 +312,11 @@ static void fx_writeRegisterSpace (void)
CF(CY); CF(CY);
p = GSU.pvRegisters; p = GSU.pvRegisters;
p[GSU_SFR] = (uint8) GSU.vStatusReg; WRITE_WORD(&p[GSU_SFR], GSU.vStatusReg);
p[GSU_SFR + 1] = (uint8) (GSU.vStatusReg >> 8);
p[GSU_PBR] = (uint8) GSU.vPrgBankReg; p[GSU_PBR] = (uint8) GSU.vPrgBankReg;
p[GSU_ROMBR] = (uint8) GSU.vRomBankReg; p[GSU_ROMBR] = (uint8) GSU.vRomBankReg;
p[GSU_RAMBR] = (uint8) GSU.vRamBankReg; p[GSU_RAMBR] = (uint8) GSU.vRamBankReg;
p[GSU_CBR] = (uint8) GSU.vCacheBaseReg; WRITE_WORD(&p[GSU_CBR], GSU.vCacheBaseReg);
p[GSU_CBR + 1] = (uint8) (GSU.vCacheBaseReg >> 8);
//fx_restoreCache(); //fx_restoreCache();
} }