mirror of https://github.com/snes9xgit/snes9x.git
Map some of those backwards, so the lower address shows up first in the descriptors.
This commit is contained in:
parent
2a9fbf0f24
commit
0fcda51be4
26
memmap.cpp
26
memmap.cpp
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@ -2988,14 +2988,14 @@ void CMemory::map_WRAM (void)
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void CMemory::map_LoROMSRAM (void)
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{
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map_index(0x70, 0x7f, 0x0000, 0x7fff, MAP_LOROM_SRAM, MAP_TYPE_RAM);
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map_index(0xf0, 0xff, 0x0000, 0x7fff, MAP_LOROM_SRAM, MAP_TYPE_RAM);
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map_index(0x70, 0x7f, 0x0000, 0x7fff, MAP_LOROM_SRAM, MAP_TYPE_RAM);
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}
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void CMemory::map_HiROMSRAM (void)
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{
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map_index(0x20, 0x3f, 0x6000, 0x7fff, MAP_HIROM_SRAM, MAP_TYPE_RAM);
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map_index(0xa0, 0xbf, 0x6000, 0x7fff, MAP_HIROM_SRAM, MAP_TYPE_RAM);
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map_index(0x20, 0x3f, 0x6000, 0x7fff, MAP_HIROM_SRAM, MAP_TYPE_RAM);
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}
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void CMemory::map_DSP (void)
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@ -3126,8 +3126,8 @@ void CMemory::Map_NoMAD1LoROMMap (void)
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map_lorom(0x80, 0xbf, 0x8000, 0xffff, CalculatedSize);
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map_lorom(0xc0, 0xff, 0x0000, 0xffff, CalculatedSize);
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map_index(0x70, 0x7f, 0x0000, 0xffff, MAP_LOROM_SRAM, MAP_TYPE_RAM);
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map_index(0xf0, 0xff, 0x0000, 0xffff, MAP_LOROM_SRAM, MAP_TYPE_RAM);
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map_index(0x70, 0x7f, 0x0000, 0xffff, MAP_LOROM_SRAM, MAP_TYPE_RAM);
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map_WRAM();
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@ -3178,10 +3178,10 @@ void CMemory::Map_SRAM512KLoROMMap (void)
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map_lorom(0x80, 0xbf, 0x8000, 0xffff, CalculatedSize);
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map_lorom(0xc0, 0xff, 0x0000, 0xffff, CalculatedSize);
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map_space(0x70, 0x70, 0x0000, 0xffff, SRAM);
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map_space(0x71, 0x71, 0x0000, 0xffff, SRAM + 0x8000);
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map_space(0x72, 0x72, 0x0000, 0xffff, SRAM + 0x10000);
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map_space(0x73, 0x73, 0x0000, 0xffff, SRAM + 0x18000);
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map_space(0x72, 0x72, 0x0000, 0xffff, SRAM + 0x10000);
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map_space(0x71, 0x71, 0x0000, 0xffff, SRAM + 0x8000);
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map_space(0x70, 0x70, 0x0000, 0xffff, SRAM);
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map_WRAM();
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@ -3202,14 +3202,14 @@ void CMemory::Map_SufamiTurboLoROMMap (void)
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if (Multi.sramSizeA)
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{
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map_index(0x60, 0x63, 0x8000, 0xffff, MAP_LOROM_SRAM, MAP_TYPE_RAM);
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map_index(0xe0, 0xe3, 0x8000, 0xffff, MAP_LOROM_SRAM, MAP_TYPE_RAM);
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map_index(0x60, 0x63, 0x8000, 0xffff, MAP_LOROM_SRAM, MAP_TYPE_RAM);
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}
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if (Multi.sramSizeB)
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{
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map_index(0x70, 0x73, 0x8000, 0xffff, MAP_LOROM_SRAM_B, MAP_TYPE_RAM);
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map_index(0xf0, 0xf3, 0x8000, 0xffff, MAP_LOROM_SRAM_B, MAP_TYPE_RAM);
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map_index(0x70, 0x73, 0x8000, 0xffff, MAP_LOROM_SRAM_B, MAP_TYPE_RAM);
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}
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map_WRAM();
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@ -3233,8 +3233,8 @@ void CMemory::Map_SufamiTurboPseudoLoROMMap (void)
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// I don't care :P
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map_space(0x60, 0x63, 0x8000, 0xffff, SRAM - 0x8000);
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map_space(0xe0, 0xe3, 0x8000, 0xffff, SRAM - 0x8000);
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map_space(0x70, 0x73, 0x8000, 0xffff, SRAM + 0x4000 - 0x8000);
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map_space(0xf0, 0xf3, 0x8000, 0xffff, SRAM + 0x4000 - 0x8000);
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map_space(0x70, 0x73, 0x8000, 0xffff, SRAM + 0x4000 - 0x8000, false);
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map_space(0xf0, 0xf3, 0x8000, 0xffff, SRAM + 0x4000 - 0x8000, false);
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map_WRAM();
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@ -3262,8 +3262,8 @@ void CMemory::Map_SuperFXLoROMMap (void)
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map_space(0x00, 0x3f, 0x6000, 0x7fff, SRAM - 0x6000);
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map_space(0x80, 0xbf, 0x6000, 0x7fff, SRAM - 0x6000);
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map_space(0x70, 0x70, 0x0000, 0xffff, SRAM);
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map_space(0x71, 0x71, 0x0000, 0xffff, SRAM + 0x10000);
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map_space(0x70, 0x70, 0x0000, 0xffff, SRAM);
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map_WRAM();
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@ -3316,10 +3316,10 @@ void CMemory::Map_SA1LoROMMap (void)
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map_hirom_offset(0xc0, 0xff, 0x0000, 0xffff, CalculatedSize, 0);
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map_space(0x00, 0x3f, 0x3000, 0x3fff, FillRAM);
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map_space(0x80, 0xbf, 0x3000, 0x3fff, FillRAM);
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map_index(0x00, 0x3f, 0x6000, 0x7fff, MAP_BWRAM, MAP_TYPE_I_O);
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map_space(0x00, 0x3f, 0x3000, 0x3fff, FillRAM);
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map_index(0x80, 0xbf, 0x6000, 0x7fff, MAP_BWRAM, MAP_TYPE_I_O);
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map_index(0x00, 0x3f, 0x6000, 0x7fff, MAP_BWRAM, MAP_TYPE_I_O);
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for (int c = 0x40; c < 0x80; c++)
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map_space(c, c, 0x0000, 0xffff, SRAM + (c & 1) * 0x10000, false);
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