diff --git a/cpu.cpp b/cpu.cpp
index 497e46ea..d0258c11 100644
--- a/cpu.cpp
+++ b/cpu.cpp
@@ -227,7 +227,7 @@ static void S9xSoftResetCPU (void)
 	CPU.V_Counter = 0;
 	CPU.Flags = CPU.Flags & (DEBUG_MODE_FLAG | TRACE_FLAG);
 	CPU.PCBase = NULL;
-	CPU.NMILine = FALSE;
+	CPU.NMIPending = FALSE;
 	CPU.IRQLine = FALSE;
 	CPU.IRQTransition = FALSE;
 	CPU.IRQLastState = FALSE;
diff --git a/cpuexec.cpp b/cpuexec.cpp
index c2c562da..f5fc203a 100644
--- a/cpuexec.cpp
+++ b/cpuexec.cpp
@@ -209,11 +209,11 @@ void S9xMainLoop (void)
 {
 	for (;;)
 	{
-		if (CPU.NMILine)
+		if (CPU.NMIPending)
 		{
 			if (Timings.NMITriggerPos <= CPU.Cycles)
 			{
-				CPU.NMILine = FALSE;
+				CPU.NMIPending = FALSE;
 				Timings.NMITriggerPos = 0xffff;
 				if (CPU.WaitingForInterrupt)
 				{
@@ -439,8 +439,6 @@ void S9xDoHEventProcessing (void)
 
 				// FIXME: reading $4210 will wait 2 cycles, then perform reading, then wait 4 more cycles.
 				Memory.FillRAM[0x4210] = Model->_5A22;
-				CPU.NMILine = FALSE;
-				Timings.NMITriggerPos = 0xffff;
 
 				ICPU.Frame++;
 				PPU.HVBeamCounterLatched = 0;
@@ -507,7 +505,7 @@ void S9xDoHEventProcessing (void)
 				{
 					// FIXME: triggered at HC=6, checked just before the final CPU cycle,
 					// then, when to call S9xOpcode_NMI()?
-					CPU.NMILine = TRUE;
+					CPU.NMIPending = TRUE;
 					Timings.NMITriggerPos = 6 + 6;
 				}
 
diff --git a/dma.cpp b/dma.cpp
index d5a6e71d..ef617860 100644
--- a/dma.cpp
+++ b/dma.cpp
@@ -1288,7 +1288,7 @@ bool8 S9xDoDMA (uint8 Channel)
 		}
 	}
 
-	if (CPU.NMILine && (Timings.NMITriggerPos != 0xffff))
+	if (CPU.NMIPending && (Timings.NMITriggerPos != 0xffff))
 	{
 		Timings.NMITriggerPos = CPU.Cycles + Timings.NMIDMADelay;
 		if (Timings.NMITriggerPos >= Timings.H_Max)
diff --git a/ppu.cpp b/ppu.cpp
index 39ac5828..fffb5e3f 100644
--- a/ppu.cpp
+++ b/ppu.cpp
@@ -1513,7 +1513,7 @@ void S9xSetCPU (uint8 Byte, uint16 Address)
 				{
 					// FIXME: triggered at HC+=6, checked just before the final CPU cycle,
 					// then, when to call S9xOpcode_NMI()?
-					CPU.NMILine = TRUE;
+					CPU.NMIPending = TRUE;
 					Timings.NMITriggerPos = CPU.Cycles + 6 + 6;
 				}
 
diff --git a/snapshot.cpp b/snapshot.cpp
index 7f4ddd90..216ae43a 100644
--- a/snapshot.cpp
+++ b/snapshot.cpp
@@ -384,7 +384,7 @@ static FreezeData	SnapCPU[] =
 	DELETED_INT_ENTRY(6, 7, WaitAddress, 4),
 	DELETED_INT_ENTRY(6, 7, WaitCounter, 4),
 	DELETED_INT_ENTRY(6, 7, PBPCAtOpcodeStart, 4),
-	INT_ENTRY(7, NMILine),
+	INT_ENTRY(7, NMIPending),
 	INT_ENTRY(7, IRQLine),
 	INT_ENTRY(7, IRQTransition),
 	INT_ENTRY(7, IRQLastState),
@@ -1745,7 +1745,7 @@ int S9xUnfreezeFromStream (STREAM stream)
 		{
 			printf("Converting old snapshot version %d to %d\n...", version, SNAPSHOT_VERSION);
 
-			CPU.NMILine = (CPU.Flags & (1 <<  7)) ? TRUE : FALSE;
+			CPU.NMIPending = (CPU.Flags & (1 <<  7)) ? TRUE : FALSE;
 			CPU.IRQLine = (CPU.Flags & (1 << 11)) ? TRUE : FALSE;
 			CPU.IRQTransition = FALSE;
 			CPU.IRQLastState = FALSE;
diff --git a/snes9x.h b/snes9x.h
index 5f439768..b49021f5 100644
--- a/snes9x.h
+++ b/snes9x.h
@@ -303,7 +303,7 @@ struct SCPUState
 	int32	PrevCycles;
 	int32	V_Counter;
 	uint8	*PCBase;
-	bool8	NMILine;
+	bool8	NMIPending;
 	bool8	IRQLine;
 	bool8	IRQTransition;
 	bool8	IRQLastState;