2011-06-12 06:25:22 +00:00
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class SMP : public Processor {
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public:
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static const uint8 iplrom[64];
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uint8 *apuram;
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unsigned port_read(unsigned port);
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void port_write(unsigned port, unsigned data);
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unsigned mmio_read(unsigned addr);
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void mmio_write(unsigned addr, unsigned data);
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void enter();
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void power();
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void reset();
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2011-06-24 11:42:04 +00:00
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void load_state(uint8 **);
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void save_state(uint8 **);
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2011-06-26 10:33:14 +00:00
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void save_spc (uint8 *);
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2011-06-12 06:25:22 +00:00
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SMP();
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~SMP();
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//private:
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struct Flags {
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bool n, v, p, b, h, i, z, c;
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alwaysinline operator unsigned() const {
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return (n << 7) | (v << 6) | (p << 5) | (b << 4)
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| (h << 3) | (i << 2) | (z << 1) | (c << 0);
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};
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alwaysinline unsigned operator=(unsigned data) {
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n = data & 0x80; v = data & 0x40; p = data & 0x20; b = data & 0x10;
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h = data & 0x08; i = data & 0x04; z = data & 0x02; c = data & 0x01;
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2011-06-23 10:24:13 +00:00
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return data;
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2011-06-12 06:25:22 +00:00
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}
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alwaysinline unsigned operator|=(unsigned data) { return operator=(operator unsigned() | data); }
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alwaysinline unsigned operator^=(unsigned data) { return operator=(operator unsigned() ^ data); }
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alwaysinline unsigned operator&=(unsigned data) { return operator=(operator unsigned() & data); }
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};
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unsigned opcode_number;
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unsigned opcode_cycle;
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2012-02-01 15:33:04 +00:00
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uint16 rd, wr, dp, sp, ya, bit;
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2011-09-07 16:46:52 +00:00
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2011-06-12 06:25:22 +00:00
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struct Regs {
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uint16 pc;
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uint8 sp;
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union {
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uint16 ya;
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#ifndef __BIG_ENDIAN__
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2013-05-18 20:10:50 +00:00
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struct { uint8 a, y; } B;
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2011-06-12 06:25:22 +00:00
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#else
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2013-05-18 20:10:50 +00:00
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struct { uint8 y, a; } B;
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2011-06-12 06:25:22 +00:00
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#endif
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};
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uint8 x;
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Flags p;
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} regs;
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struct Status {
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//$00f1
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bool iplrom_enable;
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//$00f2
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unsigned dsp_addr;
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//$00f8,$00f9
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unsigned ram00f8;
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unsigned ram00f9;
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} status;
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template<unsigned frequency>
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struct Timer {
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bool enable;
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uint8 target;
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uint8 stage1_ticks;
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uint8 stage2_ticks;
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uint8 stage3_ticks;
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2011-07-05 11:23:24 +00:00
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inline void tick();
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inline void tick(unsigned clocks);
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2011-06-12 06:25:22 +00:00
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};
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Timer<128> timer0;
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Timer<128> timer1;
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Timer< 16> timer2;
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2011-07-05 11:23:24 +00:00
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inline void tick();
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2011-09-14 17:54:51 +00:00
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inline void tick(unsigned clocks);
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2011-06-12 06:25:22 +00:00
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alwaysinline void op_io();
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2011-09-14 17:54:51 +00:00
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alwaysinline void op_io(unsigned clocks);
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2011-06-12 06:25:22 +00:00
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debugvirtual alwaysinline uint8 op_read(uint16 addr);
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debugvirtual alwaysinline void op_write(uint16 addr, uint8 data);
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debugvirtual alwaysinline void op_step();
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2019-02-28 00:51:46 +00:00
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alwaysinline void op_writestack(uint8 data);
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alwaysinline uint8 op_readstack();
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2011-06-12 06:25:22 +00:00
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static const unsigned cycle_count_table[256];
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uint64 cycle_table_cpu[256];
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unsigned cycle_table_dsp[256];
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uint64 cycle_step_cpu;
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2012-01-26 19:42:27 +00:00
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inline uint8 op_adc (uint8 x, uint8 y);
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inline uint16 op_addw(uint16 x, uint16 y);
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inline uint8 op_and (uint8 x, uint8 y);
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inline uint8 op_cmp (uint8 x, uint8 y);
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inline uint16 op_cmpw(uint16 x, uint16 y);
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inline uint8 op_eor (uint8 x, uint8 y);
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inline uint8 op_inc (uint8 x);
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inline uint8 op_dec (uint8 x);
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inline uint8 op_or (uint8 x, uint8 y);
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inline uint8 op_sbc (uint8 x, uint8 y);
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inline uint16 op_subw(uint16 x, uint16 y);
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inline uint8 op_asl (uint8 x);
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inline uint8 op_lsr (uint8 x);
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inline uint8 op_rol (uint8 x);
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inline uint8 op_ror (uint8 x);
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2018-05-16 22:46:28 +00:00
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#ifdef DEBUGGER
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void disassemble_opcode(char *output, uint16 addr);
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inline uint8 disassemble_read(uint16 addr);
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inline uint16 relb(int8 offset, int op_len);
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#endif
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2011-06-12 06:25:22 +00:00
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};
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2019-02-23 22:00:39 +00:00
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extern SMP smp;
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