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@ -2680,12 +2680,13 @@ reg_state_t reg_state_t::merge(const reg_state_t& rhs, u32 current_pc) const
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res.tag = reg_state_t::alloc_tag();
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res.origin = current_pc;
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res.is_instruction = false;
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res.is_phi = true;
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return res;
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}
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}
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}
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return make_unknown(current_pc);
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return make_unknown(current_pc, current_pc, true);
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}
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reg_state_t reg_state_t::build_on_top_of(const reg_state_t& rhs) const
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@ -4190,23 +4191,6 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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for (u32 i = 0; i < s_reg_max; i++)
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{
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if (tb.chunk == block.chunk && tb.reg_origin[i] + 1)
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{
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const u32 expected = block.reg_mod[i] ? addr : block.reg_origin[i];
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if (tb.reg_origin[i] == 0x80000000)
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{
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tb.reg_origin[i] = expected;
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}
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else if (tb.reg_origin[i] != expected)
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{
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// Set -1 if multiple origins merged (requires PHI node)
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tb.reg_origin[i] = -1;
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must_repeat |= !tb.targets.empty();
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}
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}
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if (g_cfg.core.spu_block_size == spu_block_size_type::giga && tb.func == block.func && tb.reg_origin_abs[i] + 2)
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{
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const u32 expected = block.reg_mod[i] ? addr : block.reg_origin_abs[i];
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@ -4277,13 +4261,6 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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{
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const u32 orig = bb.reg_origin_abs[i];
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if (orig < 0x40000)
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{
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auto& src = ::at32(m_bbs, orig);
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bb.reg_const[i] = src.reg_const[i];
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bb.reg_val32[i] = src.reg_val32[i];
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}
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if (!bb.reg_save_dom[i] && bb.reg_use[i] && (orig == 0x40000 || orig + 2 == 0))
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{
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// Destroy offset if external reg value is used
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@ -4317,71 +4294,6 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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// Propagate some constants
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switch (last_inst)
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{
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case spu_itype::IL:
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{
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bb.reg_const[op.rt] = true;
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bb.reg_val32[op.rt] = op.si16;
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break;
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}
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case spu_itype::ILA:
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{
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bb.reg_const[op.rt] = true;
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bb.reg_val32[op.rt] = op.i18;
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break;
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}
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case spu_itype::ILHU:
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{
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bb.reg_const[op.rt] = true;
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bb.reg_val32[op.rt] = op.i16 << 16;
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break;
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}
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case spu_itype::ILH:
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{
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bb.reg_const[op.rt] = true;
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bb.reg_val32[op.rt] = op.i16 << 16 | op.i16;
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break;
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}
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case spu_itype::IOHL:
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{
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bb.reg_val32[op.rt] = bb.reg_val32[op.rt] | op.i16;
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break;
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}
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case spu_itype::ORI:
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{
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bb.reg_const[op.rt] = bb.reg_const[op.ra];
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bb.reg_val32[op.rt] = bb.reg_val32[op.ra] | op.si10;
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break;
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}
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case spu_itype::OR:
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{
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bb.reg_const[op.rt] = bb.reg_const[op.ra] && bb.reg_const[op.rb];
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bb.reg_val32[op.rt] = bb.reg_val32[op.ra] | bb.reg_val32[op.rb];
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break;
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}
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case spu_itype::AI:
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{
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bb.reg_const[op.rt] = bb.reg_const[op.ra];
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bb.reg_val32[op.rt] = bb.reg_val32[op.ra] + op.si10;
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break;
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}
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case spu_itype::A:
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{
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bb.reg_const[op.rt] = bb.reg_const[op.ra] && bb.reg_const[op.rb];
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bb.reg_val32[op.rt] = bb.reg_val32[op.ra] + bb.reg_val32[op.rb];
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break;
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}
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case spu_itype::SFI:
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{
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bb.reg_const[op.rt] = bb.reg_const[op.ra];
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bb.reg_val32[op.rt] = op.si10 - bb.reg_val32[op.ra];
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break;
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}
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case spu_itype::SF:
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{
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bb.reg_const[op.rt] = bb.reg_const[op.ra] && bb.reg_const[op.rb];
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bb.reg_val32[op.rt] = bb.reg_val32[op.rb] - bb.reg_val32[op.ra];
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break;
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}
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case spu_itype::STQD:
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{
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if (op.ra == s_reg_sp && bb.stack_sub != 0x80000000 && bb.reg_save_dom[op.rt])
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@ -4410,15 +4322,10 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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bb.reg_load_mod[op.rt] = 0x80000000 + op.si10 * 16 - bb.stack_sub;
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}
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// Clear const
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bb.reg_const[op.rt] = false;
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break;
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}
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default:
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{
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// Clear const if reg is modified here
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if (u8 reg = m_regmod[ia / 4]; reg < s_reg_max)
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bb.reg_const[reg] = false;
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break;
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}
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}
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@ -4426,12 +4333,6 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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// $SP is modified
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if (m_regmod[ia / 4] == s_reg_sp)
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{
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if (bb.reg_const[s_reg_sp])
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{
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// Making $SP a constant is a funny thing too.
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bb.stack_sub = 0x80000000;
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}
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if (bb.stack_sub != 0x80000000)
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{
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switch (last_inst)
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@ -5876,7 +5777,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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}
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case MFC_Cmd:
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{
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const auto [af, av, atagg, _3, _5, apc, ainst] = get_reg(op.rt);
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const auto [af, av, atagg, _3, _5, apc, ainst, aphi] = get_reg(op.rt);
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if (!is_pattern_match)
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{
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@ -6227,7 +6128,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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atomic16->get_rdatomic = true;
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// Go above and beyond and also set the constant for it
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set_const_value(op.rt, MFC_GETLLAR_SUCCESS);
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|
//set_const_value(op.rt, MFC_GETLLAR_SUCCESS);
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invalidate = false;
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}
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}
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@ -6674,7 +6575,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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case spu_itype::HBR:
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{
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hbr_loc = spu_branch_target(pos, op.roh << 7 | op.rt);
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const auto [af, av, at, ao, az, apc, ainst] = get_reg(op.ra);
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const auto [af, av, at, ao, az, apc, ainst, aphi] = get_reg(op.ra);
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hbr_tg = af & vf::is_const && !op.c ? av & 0x3fffc : -1;
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|
break;
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}
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|
@ -6742,8 +6643,8 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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const auto ra = get_reg(op.ra);
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const auto rb = get_reg(op.rb);
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const auto [af, av, at, ao, az, apc, ainst] = ra;
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const auto [bf, bv, bt, bo, bz, bpc, binst] = rb;
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const auto [af, av, at, ao, az, apc, ainst, aphi] = ra;
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const auto [bf, bv, bt, bo, bz, bpc, binst, bphi] = rb;
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inherit_const_value(op.rt, ra, rb, av | bv, pos);
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|
break;
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|
@ -6758,7 +6659,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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const auto ra = get_reg(op.ra);
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const auto [af, av, at, ao, az, apc, ainst] = ra;
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const auto [af, av, at, ao, az, apc, ainst, aphi] = ra;
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inherit_const_value(op.rt, ra, ra, av ^ op.si10, pos);
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|
break;
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@ -6774,8 +6675,8 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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const auto ra = get_reg(op.ra);
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const auto rb = get_reg(op.rb);
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const auto [af, av, at, ao, az, apc, ainst] = ra;
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const auto [bf, bv, bt, bo, bz, bpc, binst] = rb;
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const auto [af, av, at, ao, az, apc, ainst, aphi] = ra;
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const auto [bf, bv, bt, bo, bz, bpc, binst, bphi] = rb;
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inherit_const_value(op.rt, ra, rb, bv ^ av, pos);
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|
break;
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@ -6785,8 +6686,8 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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const auto ra = get_reg(op.ra);
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const auto rb = get_reg(op.rb);
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const auto [af, av, at, ao, az, apc, ainst] = ra;
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const auto [bf, bv, bt, bo, bz, bpc, binst] = rb;
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const auto [af, av, at, ao, az, apc, ainst, aphi] = ra;
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const auto [bf, bv, bt, bo, bz, bpc, binst, bphi] = rb;
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|
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inherit_const_value(op.rt, ra, rb, ~(bv | av), pos);
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|
break;
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|
@ -6808,8 +6709,8 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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|
|
const auto ra = get_reg(op.ra);
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|
|
const auto rb = get_reg(op.rb);
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|
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const auto [af, av, at, ao, az, apc, ainst] = ra;
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|
|
|
const auto [bf, bv, bt, bo, bz, bpc, binst] = rb;
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|
|
|
const auto [af, av, at, ao, az, apc, ainst, aphi] = ra;
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|
|
|
const auto [bf, bv, bt, bo, bz, bpc, binst, bphi] = rb;
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|
|
|
|
|
|
|
|
inherit_const_value(op.rt, ra, rb, bv & av, pos);
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|
|
|
|
break;
|
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|
|
@ -6823,7 +6724,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
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|
|
}
|
|
|
|
|
|
|
|
|
|
const auto ra = get_reg(op.ra);
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|
|
|
|
const auto [af, av, at, ao, az, apc, ainst] = ra;
|
|
|
|
|
const auto [af, av, at, ao, az, apc, ainst, aphi] = ra;
|
|
|
|
|
|
|
|
|
|
inherit_const_value(op.rt, ra, ra, av + op.si10, pos);
|
|
|
|
|
|
|
|
|
@ -6840,8 +6741,8 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
|
|
|
|
const auto ra = get_reg(op.ra);
|
|
|
|
|
const auto rb = get_reg(op.rb);
|
|
|
|
|
|
|
|
|
|
const auto [af, av, at, ao, az, apc, ainst] = ra;
|
|
|
|
|
const auto [bf, bv, bt, bo, bz, bpc, binst] = rb;
|
|
|
|
|
const auto [af, av, at, ao, az, apc, ainst, aphi] = ra;
|
|
|
|
|
const auto [bf, bv, bt, bo, bz, bpc, binst, bphi] = rb;
|
|
|
|
|
|
|
|
|
|
inherit_const_value(op.rt, ra, rb, bv + av, pos);
|
|
|
|
|
|
|
|
|
@ -6856,7 +6757,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
|
|
|
|
case spu_itype::SFI:
|
|
|
|
|
{
|
|
|
|
|
const auto ra = get_reg(op.ra);
|
|
|
|
|
const auto [af, av, at, ao, az, apc, ainst] = get_reg(op.ra);
|
|
|
|
|
const auto [af, av, at, ao, az, apc, ainst, aphi] = get_reg(op.ra);
|
|
|
|
|
|
|
|
|
|
inherit_const_value(op.rt, ra, ra, op.si10 - av, pos);
|
|
|
|
|
break;
|
|
|
|
@ -6866,8 +6767,8 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
|
|
|
|
const auto ra = get_reg(op.ra);
|
|
|
|
|
const auto rb = get_reg(op.rb);
|
|
|
|
|
|
|
|
|
|
const auto [af, av, at, ao, az, apc, ainst] = ra;
|
|
|
|
|
const auto [bf, bv, bt, bo, bz, bpc, binst] = rb;
|
|
|
|
|
const auto [af, av, at, ao, az, apc, ainst, aphi] = ra;
|
|
|
|
|
const auto [bf, bv, bt, bo, bz, bpc, binst, bphi] = rb;
|
|
|
|
|
|
|
|
|
|
inherit_const_value(op.rt, ra, rb, bv - av, pos);
|
|
|
|
|
|
|
|
|
@ -6906,7 +6807,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
|
|
|
|
}
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const auto ra = get_reg(op.ra);
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const auto [af, av, at, ao, az, apc, ainst] = get_reg(op.ra);
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const auto [af, av, at, ao, az, apc, ainst, aphi] = get_reg(op.ra);
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inherit_const_value(op.rt, ra, ra, av >> ((0 - op.i7) & 0x1f), pos);
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break;
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@ -6926,7 +6827,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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}
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const auto ra = get_reg(op.ra);
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const auto [af, av, at, ao, az, apc, ainst] = ra;
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const auto [af, av, at, ao, az, apc, ainst, aphi] = ra;
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inherit_const_value(op.rt, ra, ra, av << (op.i7 & 0x1f), pos);
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break;
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@ -6943,7 +6844,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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case spu_itype::CEQI:
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{
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const auto ra = get_reg(op.ra);
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const auto [af, av, at, ao, az, apc, ainst] = ra;
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const auto [af, av, at, ao, az, apc, ainst, aphi] = ra;
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inherit_const_value(op.rt, ra, ra, av == op.si10 + 0u, pos);
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@ -7066,6 +6967,30 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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fmt::append(func_hash, "%s", fmt::base57(output));
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}
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for (auto& [addr, block] : infos)
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{
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auto& bb = ::at32(m_bbs, addr);
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for (u32 i = 0; i < s_reg_max; i++)
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{
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const auto& reg = block->start_reg_state[i];
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if (reg.is_const())
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{
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bb.reg_const[i] = true;
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bb.reg_val32[i] = reg.value;
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}
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else if (reg.is_instruction)
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{
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bb.reg_origin[i] = reg.origin;
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}
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else if (reg.is_phi)
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{
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bb.reg_origin[i] = -1;
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}
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}
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}
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for (const auto& [pc_commited, pattern] : atomic16_all)
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{
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if (!pattern.active)
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