From e5d0e035d0b6358b154242ffd3a5d7b5622ff496 Mon Sep 17 00:00:00 2001
From: Malcolm Jestadt <MalcolmJestadt@gmail.com>
Date: Thu, 4 Mar 2021 12:16:12 -0500
Subject: [PATCH] SPU LLVM: Rearange FM instruction for better performance -
 Doesn't eliminate any instructions, but allows for better out of order
 execution.

---
 rpcs3/Emu/Cell/SPURecompiler.cpp | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/rpcs3/Emu/Cell/SPURecompiler.cpp b/rpcs3/Emu/Cell/SPURecompiler.cpp
index 6ea743e0a3..f5e86dd62c 100644
--- a/rpcs3/Emu/Cell/SPURecompiler.cpp
+++ b/rpcs3/Emu/Cell/SPURecompiler.cpp
@@ -7750,9 +7750,9 @@ public:
 
 			const auto ma = eval(sext<s32[4]>(fcmp_uno(a != fsplat<f32[4]>(0.))));
 			const auto mb = eval(sext<s32[4]>(fcmp_uno(b != fsplat<f32[4]>(0.))));
-			const auto ca = eval(bitcast<f32[4]>(bitcast<s32[4]>(a) & mb));
-			const auto cb = eval(bitcast<f32[4]>(bitcast<s32[4]>(b) & ma));
-			set_vr(op.rt, fm(ca, cb));
+			const auto cx = eval(ma & mb);
+			const auto x = fm(a, b);
+			set_vr(op.rt, eval(bitcast<f32[4]>(bitcast<s32[4]>(x) & cx)));
 		}
 		else
 			set_vr(op.rt, get_vr<f32[4]>(op.ra) * get_vr<f32[4]>(op.rb));