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ARMv7: more opcodes

This commit is contained in:
Nekotekina 2014-10-30 23:07:47 +03:00
parent 7aeda3b0c7
commit de156c59e4
5 changed files with 114 additions and 46 deletions
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12
rpcs3/Emu/ARMv7/ARMv7DisAsm.cpp
View File

@ -197,12 +197,6 @@ void ARMv7DisAsm::CMP_RSR(const u32 data, const ARMv7_encoding type)
} }
void ARMv7DisAsm::DBG(const u32 data, const ARMv7_encoding type)
{
Write(__FUNCTION__);
}
void ARMv7DisAsm::EOR_IMM(const u32 data, const ARMv7_encoding type) void ARMv7DisAsm::EOR_IMM(const u32 data, const ARMv7_encoding type)
{ {
Write(__FUNCTION__); Write(__FUNCTION__);
@ -429,12 +423,6 @@ void ARMv7DisAsm::MVN_RSR(const u32 data, const ARMv7_encoding type)
} }
void ARMv7DisAsm::NEG(const u32 data, const ARMv7_encoding type)
{
Write(__FUNCTION__);
}
void ARMv7DisAsm::NOP(const u32 data, const ARMv7_encoding type) void ARMv7DisAsm::NOP(const u32 data, const ARMv7_encoding type)
{ {
Write(__FUNCTION__); Write(__FUNCTION__);

4
rpcs3/Emu/ARMv7/ARMv7DisAsm.h
View File

@ -95,8 +95,6 @@ protected:
virtual void CMP_REG(const u32 data, const ARMv7_encoding type); virtual void CMP_REG(const u32 data, const ARMv7_encoding type);
virtual void CMP_RSR(const u32 data, const ARMv7_encoding type); virtual void CMP_RSR(const u32 data, const ARMv7_encoding type);
virtual void DBG(const u32 data, const ARMv7_encoding type);
virtual void EOR_IMM(const u32 data, const ARMv7_encoding type); virtual void EOR_IMM(const u32 data, const ARMv7_encoding type);
virtual void EOR_REG(const u32 data, const ARMv7_encoding type); virtual void EOR_REG(const u32 data, const ARMv7_encoding type);
virtual void EOR_RSR(const u32 data, const ARMv7_encoding type); virtual void EOR_RSR(const u32 data, const ARMv7_encoding type);
@ -155,8 +153,6 @@ protected:
virtual void MVN_REG(const u32 data, const ARMv7_encoding type); virtual void MVN_REG(const u32 data, const ARMv7_encoding type);
virtual void MVN_RSR(const u32 data, const ARMv7_encoding type); virtual void MVN_RSR(const u32 data, const ARMv7_encoding type);
virtual void NEG(const u32 data, const ARMv7_encoding type);
virtual void NOP(const u32 data, const ARMv7_encoding type); virtual void NOP(const u32 data, const ARMv7_encoding type);
virtual void ORN_IMM(const u32 data, const ARMv7_encoding type); virtual void ORN_IMM(const u32 data, const ARMv7_encoding type);

20
rpcs3/Emu/ARMv7/ARMv7Interpreter.cpp
View File

@ -409,16 +409,6 @@ void ARMv7Interpreter::CMP_RSR(const u32 data, const ARMv7_encoding type)
} }
void ARMv7Interpreter::DBG(const u32 data, const ARMv7_encoding type)
{
switch (type)
{
case A1: throw __FUNCTION__;
default: throw __FUNCTION__;
}
}
void ARMv7Interpreter::EOR_IMM(const u32 data, const ARMv7_encoding type) void ARMv7Interpreter::EOR_IMM(const u32 data, const ARMv7_encoding type)
{ {
switch (type) switch (type)
@ -818,16 +808,6 @@ void ARMv7Interpreter::MVN_RSR(const u32 data, const ARMv7_encoding type)
} }
void ARMv7Interpreter::NEG(const u32 data, const ARMv7_encoding type)
{
switch (type)
{
case A1: throw __FUNCTION__;
default: throw __FUNCTION__;
}
}
void ARMv7Interpreter::NOP(const u32 data, const ARMv7_encoding type) void ARMv7Interpreter::NOP(const u32 data, const ARMv7_encoding type)
{ {
switch (type) switch (type)

4
rpcs3/Emu/ARMv7/ARMv7Interpreter.h
View File

@ -308,8 +308,6 @@ protected:
virtual void CMP_REG(const u32 data, const ARMv7_encoding type); virtual void CMP_REG(const u32 data, const ARMv7_encoding type);
virtual void CMP_RSR(const u32 data, const ARMv7_encoding type); virtual void CMP_RSR(const u32 data, const ARMv7_encoding type);
virtual void DBG(const u32 data, const ARMv7_encoding type);
virtual void EOR_IMM(const u32 data, const ARMv7_encoding type); virtual void EOR_IMM(const u32 data, const ARMv7_encoding type);
virtual void EOR_REG(const u32 data, const ARMv7_encoding type); virtual void EOR_REG(const u32 data, const ARMv7_encoding type);
virtual void EOR_RSR(const u32 data, const ARMv7_encoding type); virtual void EOR_RSR(const u32 data, const ARMv7_encoding type);
@ -368,8 +366,6 @@ protected:
virtual void MVN_REG(const u32 data, const ARMv7_encoding type); virtual void MVN_REG(const u32 data, const ARMv7_encoding type);
virtual void MVN_RSR(const u32 data, const ARMv7_encoding type); virtual void MVN_RSR(const u32 data, const ARMv7_encoding type);
virtual void NEG(const u32 data, const ARMv7_encoding type);
virtual void NOP(const u32 data, const ARMv7_encoding type); virtual void NOP(const u32 data, const ARMv7_encoding type);
virtual void ORN_IMM(const u32 data, const ARMv7_encoding type); virtual void ORN_IMM(const u32 data, const ARMv7_encoding type);

120
rpcs3/Emu/ARMv7/ARMv7Opcodes.h
View File

@ -95,8 +95,6 @@ public:
virtual void CMP_REG(const u32 data, const ARMv7_encoding type) = 0; virtual void CMP_REG(const u32 data, const ARMv7_encoding type) = 0;
virtual void CMP_RSR(const u32 data, const ARMv7_encoding type) = 0; virtual void CMP_RSR(const u32 data, const ARMv7_encoding type) = 0;
virtual void DBG(const u32 data, const ARMv7_encoding type) = 0;
virtual void EOR_IMM(const u32 data, const ARMv7_encoding type) = 0; virtual void EOR_IMM(const u32 data, const ARMv7_encoding type) = 0;
virtual void EOR_REG(const u32 data, const ARMv7_encoding type) = 0; virtual void EOR_REG(const u32 data, const ARMv7_encoding type) = 0;
virtual void EOR_RSR(const u32 data, const ARMv7_encoding type) = 0; virtual void EOR_RSR(const u32 data, const ARMv7_encoding type) = 0;
@ -155,8 +153,6 @@ public:
virtual void MVN_REG(const u32 data, const ARMv7_encoding type) = 0; virtual void MVN_REG(const u32 data, const ARMv7_encoding type) = 0;
virtual void MVN_RSR(const u32 data, const ARMv7_encoding type) = 0; virtual void MVN_RSR(const u32 data, const ARMv7_encoding type) = 0;
virtual void NEG(const u32 data, const ARMv7_encoding type) = 0;
virtual void NOP(const u32 data, const ARMv7_encoding type) = 0; virtual void NOP(const u32 data, const ARMv7_encoding type) = 0;
virtual void ORN_IMM(const u32 data, const ARMv7_encoding type) = 0; virtual void ORN_IMM(const u32 data, const ARMv7_encoding type) = 0;
@ -427,7 +423,104 @@ static const ARMv7_opcode_t ARMv7_opcode_table[] =
ARMv7_OP4(0xfff0, 0xf0f0, 0xfab0, 0xf080, T1, CLZ), ARMv7_OP4(0xfff0, 0xf0f0, 0xfab0, 0xf080, T1, CLZ),
ARMv7_OP4(0x0fff, 0x0ff0, 0x016f, 0x0f10, A1, CLZ), ARMv7_OP4(0x0fff, 0x0ff0, 0x016f, 0x0f10, A1, CLZ),
// ARMv7_OP4(0xfbf0, 0x8f00, 0xf110, 0x0f00, T1, CMN_IMM),
ARMv7_OP4(0x0ff0, 0xf000, 0x0370, 0x0000, A1, CMN_IMM),
ARMv7_OP2(0xffc0, 0x42c0, T1, CMN_REG),
ARMv7_OP4(0xfff0, 0x8f00, 0xeb10, 0x0f00, T2, CMN_REG),
ARMv7_OP4(0x0ff0, 0xf010, 0x0170, 0x0000, A1, CMN_REG),
ARMv7_OP4(0x0ff0, 0xf090, 0x0170, 0x0010, A1, CMN_RSR),
ARMv7_OP2(0xf800, 0x2800, T1, CMP_IMM),
ARMv7_OP4(0xfbf0, 0x8f00, 0xf1b0, 0x0f00, T2, CMP_IMM),
ARMv7_OP4(0x0ff0, 0xf000, 0x0350, 0x0000, A1, CMP_IMM),
ARMv7_OP2(0xffc0, 0x4280, T1, CMP_REG),
ARMv7_OP2(0xff00, 0x4500, T2, CMP_REG),
ARMv7_OP4(0xfff0, 0x8f00, 0xebb0, 0x0f00, T3, CMP_REG),
ARMv7_OP4(0x0ff0, 0xf010, 0x0150, 0x0000, A1, CMP_REG),
ARMv7_OP4(0x0ff0, 0xf090, 0x0150, 0x0010, A1, CMP_RSR),
ARMv7_OP4(0xfbe0, 0x8000, 0xf080, 0x0000, T1, EOR_IMM),
ARMv7_OP4(0x0fe0, 0x0000, 0x0220, 0x0000, A1, EOR_IMM),
ARMv7_OP2(0xffc0, 0x4040, T1, EOR_REG),
ARMv7_OP4(0xffe0, 0x8000, 0xea80, 0x0000, T2, EOR_REG),
ARMv7_OP4(0x0fe0, 0x0010, 0x0020, 0x0000, A1, EOR_REG),
ARMv7_OP4(0x0fe0, 0x0090, 0x0020, 0x0010, A1, EOR_RSR),
ARMv7_OP2(0xff00, 0xbf00, T1, IT),
ARMv7_OP2(0xf800, 0xc800, T1, LDM),
ARMv7_OP4(0xffd0, 0x2000, 0xe890, 0x0000, T2, LDM),
ARMv7_OP4(0x0fd0, 0x0000, 0x0890, 0x0000, A1, LDM),
ARMv7_OP4(0x0fd0, 0x0000, 0x0810, 0x0000, A1, LDMDA),
ARMv7_OP4(0xffd0, 0x2000, 0xe910, 0x0000, T1, LDMDB),
ARMv7_OP4(0x0fd0, 0x0000, 0x0910, 0x0000, A1, LDMDB),
ARMv7_OP4(0x0fd0, 0x0000, 0x0990, 0x0000, A1, LDMIB),
ARMv7_OP2(0xf800, 0x6800, T1, LDR_IMM),
ARMv7_OP2(0xf800, 0x9800, T2, LDR_IMM),
ARMv7_OP4(0xfff0, 0x0000, 0xf8d0, 0x0000, T3, LDR_IMM),
ARMv7_OP4(0xfff0, 0x0800, 0xf850, 0x0800, T4, LDR_IMM),
ARMv7_OP4(0x0e50, 0x0000, 0x0410, 0x0000, A1, LDR_IMM),
ARMv7_OP2(0xf800, 0x4800, T1, LDR_LIT),
ARMv7_OP4(0xff7f, 0x0000, 0xf85f, 0x0000, T2, LDR_LIT),
ARMv7_OP4(0x0f7f, 0x0000, 0x051f, 0x0000, A1, LDR_LIT),
ARMv7_OP2(0xfe00, 0x5800, T1, LDR_REG),
ARMv7_OP4(0xfff0, 0x0fc0, 0xf850, 0x0000, T2, LDR_REG),
ARMv7_OP4(0x0e50, 0x0010, 0x0610, 0x0000, A1, LDR_REG),
ARMv7_OP2(0xf800, 0x7800, T1, LDRB_IMM),
ARMv7_OP4(0xfff0, 0x0000, 0xf890, 0x0000, T2, LDRB_IMM),
ARMv7_OP4(0xfff0, 0x0800, 0xf810, 0x0800, T3, LDRB_IMM),
ARMv7_OP4(0x0e50, 0x0000, 0x0450, 0x0000, A1, LDRB_IMM),
ARMv7_OP4(0xff7f, 0x0000, 0xf81f, 0x0000, T1, LDRB_LIT),
ARMv7_OP4(0x0f7f, 0x0000, 0x055f, 0x0000, A1, LDRB_LIT),
ARMv7_OP2(0xfe00, 0x5c00, T1, LDRB_REG),
ARMv7_OP4(0xfff0, 0x0fc0, 0xf810, 0x0000, T2, LDRB_REG),
ARMv7_OP4(0x0e50, 0x0010, 0x0650, 0x0000, A1, LDRB_REG),
ARMv7_OP4(0xfe50, 0x0000, 0xe850, 0x0000, T1, LDRD_IMM),
ARMv7_OP4(0x0e50, 0x00f0, 0x0040, 0x00d0, A1, LDRD_IMM),
ARMv7_OP4(0xfe7f, 0x0000, 0xe85f, 0x0000, T1, LDRD_LIT),
ARMv7_OP4(0x0f7f, 0x00f0, 0x014f, 0x00d0, A1, LDRD_LIT),
ARMv7_OP4(0x0e50, 0x0ff0, 0x0000, 0x00d0, A1, LDRD_REG),
ARMv7_OP4(0xfff0, 0x0000, 0xf990, 0x0000, T1, LDRSB_IMM),
ARMv7_OP4(0xfff0, 0x0800, 0xf910, 0x0800, T2, LDRSB_IMM),
ARMv7_OP4(0x0e50, 0x00f0, 0x0050, 0x00d0, A1, LDRSB_IMM),
ARMv7_OP4(0xff7f, 0x0000, 0xf91f, 0x0000, T1, LDRSB_LIT),
ARMv7_OP4(0x0f7f, 0x00f0, 0x015f, 0x00d0, A1, LDRSB_LIT),
ARMv7_OP2(0xfe00, 0x5600, T1, LDRSB_REG),
ARMv7_OP4(0xfff0, 0x0fc0, 0xf910, 0x0000, T2, LDRSB_REG),
ARMv7_OP4(0x0e50, 0x0ff0, 0x0010, 0x00d0, A1, LDRSB_REG),
ARMv7_OP4(0xfff0, 0x0000, 0xf9b0, 0x0000, T1, LDRSH_IMM),
ARMv7_OP4(0xfff0, 0x0800, 0xf930, 0x0800, T2, LDRSH_IMM),
ARMv7_OP4(0x0e50, 0x00f0, 0x0050, 0x00f0, A1, LDRSH_IMM),
ARMv7_OP4(0xff7f, 0x0000, 0xf93f, 0x0000, T1, LDRSH_LIT),
ARMv7_OP4(0x0f7f, 0x00f0, 0x015f, 0x00f0, A1, LDRSH_LIT),
ARMv7_OP2(0xfe00, 0x5e00, T1, LDRSH_REG),
ARMv7_OP4(0xfff0, 0x0fc0, 0xf930, 0x0000, T2, LDRSH_REG),
ARMv7_OP4(0x0e50, 0x0ff0, 0x0010, 0x00f0, A1, LDRSH_REG),
ARMv7_OP2(0xf800, 0x0000, T1, LSL_IMM),
ARMv7_OP4(0xffef, 0x8030, 0xea4f, 0x0000, T2, LSL_IMM),
ARMv7_OP4(0x0fef, 0x0070, 0x01a0, 0x0000, A1, LSL_IMM),
ARMv7_OP2(0xffc0, 0x4080, T1, LSL_REG),
ARMv7_OP4(0xffe0, 0xf0f0, 0xfa00, 0xf000, T2, LSL_REG),
ARMv7_OP4(0x0fef, 0x00f0, 0x01a0, 0x0010, A1, LSL_REG),
ARMv7_OP2(0xf800, 0x0800, T1, LSR_IMM),
ARMv7_OP4(0xffef, 0x8030, 0xea4f, 0x0010, T2, LSR_IMM),
ARMv7_OP4(0x0fef, 0x0030, 0x01a0, 0x0020, A1, LSR_IMM),
ARMv7_OP2(0xffc0, 0x40c0, T1, LSR_REG),
ARMv7_OP4(0xffe0, 0xf0f0, 0xfa20, 0xf000, T2, LSR_REG),
ARMv7_OP4(0x0fef, 0x00f0, 0x01a0, 0x0030, A1, LSR_REG),
ARMv7_OP4(0xfff0, 0x00f0, 0xfb00, 0x0000, T1, MLA),
ARMv7_OP4(0x0fe0, 0x00f0, 0x0020, 0x0090, A1, MLA),
ARMv7_OP4(0xfff0, 0x00f0, 0xfb00, 0x0010, T1, MLS),
ARMv7_OP4(0x0ff0, 0x00f0, 0x0060, 0x0090, A1, MLS),
ARMv7_OP2(0xf800, 0x2000, T1, MOV_IMM), ARMv7_OP2(0xf800, 0x2000, T1, MOV_IMM),
ARMv7_OP4(0xfbef, 0x8000, 0xf04f, 0x0000, T2, MOV_IMM), ARMv7_OP4(0xfbef, 0x8000, 0xf04f, 0x0000, T2, MOV_IMM),
@ -441,7 +534,22 @@ static const ARMv7_opcode_t ARMv7_opcode_table[] =
ARMv7_OP4(0xfbf0, 0x8000, 0xf2c0, 0x0000, T1, MOVT), ARMv7_OP4(0xfbf0, 0x8000, 0xf2c0, 0x0000, T1, MOVT),
ARMv7_OP4(0x0ff0, 0x0000, 0x0340, 0x0000, A1, MOVT), ARMv7_OP4(0x0ff0, 0x0000, 0x0340, 0x0000, A1, MOVT),
// ARMv7_OP4(0xffff, 0xf0ff, 0xf3ef, 0x8000, T1, MRS),
ARMv7_OP4(0x0fff, 0x0fff, 0x010f, 0x0000, A1, MRS),
ARMv7_OP4(0x0ff3, 0xf000, 0x0320, 0xf000, A1, MSR_IMM),
ARMv7_OP4(0xfff0, 0xf3ff, 0xf380, 0x8000, T1, MSR_REG),
ARMv7_OP4(0x0ff3, 0xfff0, 0x0120, 0xf000, A1, MSR_REG),
ARMv7_OP2(0xffc0, 0x4340, T1, MUL),
ARMv7_OP4(0xfff0, 0xf0f0, 0xfb00, 0xf000, T2, MUL),
ARMv7_OP4(0x0fe0, 0xf0f0, 0x0000, 0x0090, A1, MUL),
ARMv7_OP4(0xfbef, 0x8000, 0xf06f, 0x0000, T1, MVN_IMM),
ARMv7_OP4(0x0fef, 0x0000, 0x03e0, 0x0000, A1, MVN_IMM),
ARMv7_OP2(0xffc0, 0x43c0, T1, MVN_REG),
ARMv7_OP4(0xffef, 0x8000, 0xea6f, 0x0000, T2, MVN_REG),
ARMv7_OP4(0xffef, 0x0010, 0x01e0, 0x0000, A1, MVN_REG),
ARMv7_OP4(0x0fef, 0x0090, 0x01e0, 0x0010, A1, MVN_RSR),
ARMv7_OP2(0xffff, 0xbf00, T1, NOP), ARMv7_OP2(0xffff, 0xbf00, T1, NOP),
ARMv7_OP4(0xffff, 0xffff, 0xf3af, 0x8000, T2, NOP), ARMv7_OP4(0xffff, 0xffff, 0xf3af, 0x8000, T2, NOP),