mirror of https://github.com/RPCS3/rpcs3.git
SPU LLVM: improve constant propagation
Propagate constants in non-volatile registers between chunks Disable function table in Mega mode
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Nekotekina
parent
a424fcfcf7
commit
d3ad44aec4
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@ -1553,9 +1553,28 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator
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std::array<llvm::StoreInst*, s_reg_max> store{};
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};
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struct chunk_info
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{
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// Callable function
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llvm::Function* func;
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// Constants in non-volatile registers at the entry point
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std::array<llvm::Value*, s_reg_max> reg{};
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chunk_info() = default;
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chunk_info(llvm::Function* func)
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: func(func)
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{
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}
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};
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// Current block
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block_info* m_block;
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// Current chunk
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chunk_info* m_finfo;
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// All blocks in the current function chunk
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std::unordered_map<u32, block_info, value_hash<u32, 2>> m_blocks;
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@ -1563,7 +1582,7 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator
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std::vector<u32> m_block_queue;
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// All function chunks in current SPU compile unit
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std::unordered_map<u32, llvm::Function*, value_hash<u32, 2>> m_functions;
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std::unordered_map<u32, chunk_info, value_hash<u32, 2>> m_functions;
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// Function chunk list for processing
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std::vector<u32> m_function_queue;
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@ -1584,9 +1603,28 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator
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result->addAttribute(2, llvm::Attribute::NoAlias);
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// Enqueue if necessary
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if (m_functions.emplace(addr, result).second)
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const auto empl = m_functions.emplace(addr, chunk_info{result});
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if (empl.second)
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{
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m_function_queue.push_back(addr);
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if (m_block && g_cfg.core.spu_block_size != spu_block_size_type::safe)
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{
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// Initialize constants for non-volatile registers (TODO)
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auto& regs = empl.first->second.reg;
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for (u32 i = 80; i <= 127; i++)
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{
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if (auto c = llvm::dyn_cast_or_null<llvm::Constant>(m_block->reg[i]))
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{
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if (!(find_reg_origin(addr, i, false) >> 31))
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{
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regs[i] = c;
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}
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}
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}
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}
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}
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return result;
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@ -1600,6 +1638,7 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator
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m_reg_addr.fill(nullptr);
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m_block = nullptr;
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m_finfo = nullptr;
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m_blocks.clear();
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m_block_queue.clear();
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m_ir->SetInsertPoint(llvm::BasicBlock::Create(m_context, "", m_function));
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@ -1769,12 +1808,12 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator
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}
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// Return either basic block addr with single dominating value, or negative number of PHI entries
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u32 find_reg_origin(u32 addr, u32 index)
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u32 find_reg_origin(u32 addr, u32 index, bool chunk_only = true)
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{
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u32 result = -1;
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// Handle entry point specially
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if (m_entry_info[addr / 4])
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if (chunk_only && m_entry_info[addr / 4])
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{
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result = addr;
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}
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@ -1791,10 +1830,12 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator
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{
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for (u32 pred : pfound->second)
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{
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if (m_entry_map[pred / 4] == root)
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if (chunk_only && m_entry_map[pred / 4] != root)
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{
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m_scan_queue.push_back(pred);
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continue;
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}
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m_scan_queue.push_back(pred);
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}
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}
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@ -1831,7 +1872,7 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator
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// Enqueue predecessors if register is not modified there
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for (u32 pred : pfound->second)
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{
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if (m_entry_map[pred / 4] != root)
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if (chunk_only && m_entry_map[pred / 4] != root)
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{
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continue;
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}
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@ -1847,7 +1888,7 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator
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break;
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}
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if (regmod || m_entry_info[addr / 4])
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if (regmod || (chunk_only && m_entry_info[addr / 4]))
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{
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if (result == -1)
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{
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@ -2200,7 +2241,8 @@ public:
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{
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// Initialize function info
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m_entry = m_function_queue[fi];
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set_function(m_functions[m_entry]);
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set_function(m_functions[m_entry].func);
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m_finfo = &m_functions[m_entry];
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m_ir->CreateBr(add_block(m_entry));
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// Emit instructions for basic blocks
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@ -2251,9 +2293,10 @@ public:
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if (!value)
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{
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// Value hasn't been loaded yet
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value = m_ir->CreateLoad(regptr);
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value = m_finfo->reg[i] ? m_finfo->reg[i] : m_ir->CreateLoad(regptr);
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}
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else if (i < 128 && llvm::isa<llvm::Constant>(value))
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if (i < 128 && llvm::isa<llvm::Constant>(value))
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{
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// Bitcast the constant
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value = make_const_vector(get_const_vector(llvm::cast<llvm::Constant>(value), baddr, i), _phi->getType());
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@ -2279,7 +2322,7 @@ public:
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const auto regptr = init_vr(i);
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const auto cblock = m_ir->GetInsertBlock();
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m_ir->SetInsertPoint(m_function->getEntryBlock().getTerminator());
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const auto value = m_ir->CreateLoad(regptr);
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const auto value = m_finfo->reg[i] ? m_finfo->reg[i] : m_ir->CreateLoad(regptr);
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m_ir->SetInsertPoint(cblock);
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_phi->addIncoming(value, &m_function->getEntryBlock());
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}
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@ -2295,6 +2338,11 @@ public:
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m_block->reg[i] = bfound->second.reg[i];
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}
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}
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else if (baddr == m_entry)
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{
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// Passthrough constant from a different chunk
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m_block->reg[i] = m_finfo->reg[i];
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}
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}
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// Emit state check if necessary (TODO: more conditions)
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@ -2380,10 +2428,19 @@ public:
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}
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chunks.push_back(null);
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continue;
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}
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else
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chunks.push_back(found->second.func);
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// If a chunk has incoming constants, we can't add it to the function table (TODO)
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for (const auto c : found->second.reg)
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{
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chunks.push_back(found->second);
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if (c != nullptr)
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{
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chunks.back() = null;
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break;
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}
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}
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}
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@ -2406,7 +2463,7 @@ public:
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for (const auto& func : m_functions)
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{
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pm.run(*func.second);
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pm.run(*func.second.func);
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}
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// Clear context (TODO)
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@ -4498,18 +4555,11 @@ public:
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llvm::Value* ptr = m_ir->CreateGEP(disp, m_ir->CreateLShr(ad64, 2, "", true));
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if (g_cfg.core.spu_block_size != spu_block_size_type::safe)
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if (g_cfg.core.spu_block_size == spu_block_size_type::giga)
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{
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// Try to load chunk address from the function table
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llvm::Value* index = ad64;
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if (g_cfg.core.spu_block_size != spu_block_size_type::giga)
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{
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index = m_ir->CreateSub(ad64, m_ir->getInt64(m_function_queue[0]));
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}
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const auto use_ftable = m_ir->CreateICmpULT(index, m_ir->getInt64(m_size));
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ptr = m_ir->CreateSelect(use_ftable, m_ir->CreateGEP(m_function_table, {m_ir->getInt64(0), m_ir->CreateLShr(index, 2, "", true)}), ptr);
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const auto use_ftable = m_ir->CreateICmpULT(ad64, m_ir->getInt64(m_size));
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ptr = m_ir->CreateSelect(use_ftable, m_ir->CreateGEP(m_function_table, {m_ir->getInt64(0), m_ir->CreateLShr(ad64, 2, "", true)}), ptr);
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}
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tail(m_ir->CreateLoad(ptr));
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