Merge pull request #108 from Bigpet/master

added SUBFME, SUBFZE and fix cache folder creation

rpcs3/Emu/Cell/PPUDisAsm.h

@@ -1418,6 +1418,10 @@ private:
 	{
 		DisAsm_V1_R2("stvewx", vs, ra, rb);
 	}
+	void SUBFZE(u32 rd, u32 ra, u32 oe, bool rc)
+	{
+		DisAsm_R2_OE_RC("subfze", rd, ra, oe, rc);
+	}
 	void ADDZE(u32 rd, u32 ra, u32 oe, bool rc)
 	{
 		DisAsm_R2_OE_RC("addze", rd, ra, oe, rc);
@@ -1434,6 +1438,10 @@ private:
 	{
 		DisAsm_V1_R2("stvx", vd, ra, rb);
 	}
+	void SUBFME(u32 rd, u32 ra, u32 oe, bool rc)
+	{
+		DisAsm_R2_OE_RC("subfme", rd, ra, oe, rc);
+	}
 	void MULLD(u32 rd, u32 ra, u32 rb, u32 oe, bool rc)
 	{
 		DisAsm_R3_OE_RC("mulld", rd, ra, rb, oe, rc);

rpcs3/Emu/Cell/PPUInstrTable.h

@@ -489,10 +489,12 @@ namespace PPU_instr
 	/*0x0b5*/bind_instr(g1f_list, STDUX, RS, RA, RB);
 	/*0x0b7*/bind_instr(g1f_list, STWUX, RS, RA, RB);
 	/*0x0c7*/bind_instr(g1f_list, STVEWX, VS, RA, RB);
+	/*0x0c8*/bind_instr(g1f_list, SUBFZE, RD, RA, OE, RC);
 	/*0x0ca*/bind_instr(g1f_list, ADDZE, RD, RA, OE, RC);
 	/*0x0d6*/bind_instr(g1f_list, STDCX_, RS, RA, RB);
 	/*0x0d7*/bind_instr(g1f_list, STBX, RS, RA, RB);
 	/*0x0e7*/bind_instr(g1f_list, STVX, VS, RA, RB);
+	/*0x0e8*/bind_instr(g1f_list, SUBFME, RD, RA, OE, RC);
 	/*0x0e9*/bind_instr(g1f_list, MULLD, RD, RA, RB, OE, RC);
 	/*0x0ea*/bind_instr(g1f_list, ADDME, RD, RA, OE, RC);
 	/*0x0eb*/bind_instr(g1f_list, MULLW, RD, RA, RB, OE, RC);

rpcs3/Emu/Cell/PPUInterpreter.h

@@ -2612,10 +2612,10 @@ private:
 	}
 	void SUBFE(u32 rd, u32 ra, u32 rb, u32 oe, bool rc)
 	{
-		const s64 RA = CPU.GPR[ra];
+		const u64 RA = CPU.GPR[ra];
-		const s64 RB = CPU.GPR[rb];
+		const u64 RB = CPU.GPR[rb];
-		CPU.GPR[ra] = ~RA + RB + CPU.XER.CA;
+		CPU.GPR[rd] = ~RA + RB + CPU.XER.CA;
-		CPU.XER.CA = ((u64)~RA + CPU.XER.CA > ~(u64)RB) | ((RA == 0) & CPU.XER.CA);
+		CPU.XER.CA = (~RA + CPU.XER.CA > ~RB) | ((RA == 0) & CPU.XER.CA);
 		if(rc) CPU.UpdateCR0<s64>(CPU.GPR[rd]);
 		if(oe) UNK("subfeo");
 	}
@@ -2734,6 +2734,14 @@ private:
 		if(oe) ConLog.Warning("addzeo");
 		if(rc) CPU.UpdateCR0<s64>(CPU.GPR[rd]);
 	}
+	void SUBFZE(u32 rd, u32 ra, u32 oe, bool rc)
+	{
+		const u64 RA = CPU.GPR[ra];
+		CPU.GPR[rd] = ~RA + CPU.XER.CA;
+		CPU.XER.CA = (0x8000000000000000 & RA) && (0x8000000000000000 & CPU.GPR[rd]);//RA <= 0ull;
+		if (oe) ConLog.Warning("subfzeo");
+		if (rc) CPU.UpdateCR0<s64>(CPU.GPR[rd]);
+	}
 	void STDCX_(u32 rs, u32 ra, u32 rb)
 	{
 		const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb];
@@ -2759,6 +2767,14 @@ private:
 	{
 		Memory.Write128((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~0xfULL, CPU.VPR[vs]._u128);
 	}
+	void SUBFME(u32 rd, u32 ra, u32 oe, bool rc)
+	{
+		const u64 RA = CPU.GPR[ra];
+		CPU.GPR[rd] = ~RA + CPU.XER.CA + 0xFFFFFFFFFFFFFFFF;
+		CPU.XER.CA = !(0x8000000000000000 & RA) && !(0x8000000000000000 & CPU.GPR[rd]);
+		if (oe) ConLog.Warning("subfmeo");
+		if (rc) CPU.UpdateCR0<s64>(CPU.GPR[rd]);
+	}
 	void MULLD(u32 rd, u32 ra, u32 rb, u32 oe, bool rc)
 	{
 		CPU.GPR[rd] = (s64)((s64)CPU.GPR[ra] * (s64)CPU.GPR[rb]);

rpcs3/Emu/Cell/PPUOpcodes.h

@@ -301,11 +301,13 @@ namespace PPU_opcodes
 		STDUX 	= 0x0b5,
 		STWUX 	= 0x0b7,
 		STVEWX	= 0x0c7, //Store Vector Element Word Indexed
-		ADDZE 	= 0x0ca,
+		SUBFZE	= 0x0c8,
+		ADDZE	= 0x0ca,
 		STDCX_ 	= 0x0d6,
 		STBX 	= 0x0d7,
 		STVX 	= 0x0e7,
-		MULLD 	= 0x0e9,
+		SUBFME	= 0x0e8,
+		MULLD	= 0x0e9,
 		ADDME 	= 0x0ea,
 		MULLW 	= 0x0eb,
 		DCBTST 	= 0x0f6,
@@ -347,7 +349,7 @@ namespace PPU_opcodes
 		SRW 	= 0x218,
 		SRD 	= 0x21b,
 		LVRX	= 0x227, //Load Vector Right Indexed
-		LFSUX 	= 0x237,
+		LFSUX	= 0x237,
 		SYNC 	= 0x256,
 		LFDX 	= 0x257,
 		LFDUX	= 0x277,
@@ -693,11 +695,13 @@ public:
 	virtual void STDUX(u32 rs, u32 ra, u32 rb) = 0;
 	virtual void STWUX(u32 rs, u32 ra, u32 rb) = 0;
 	virtual void STVEWX(u32 vs, u32 ra, u32 rb) = 0;
+	virtual void SUBFZE(u32 rd, u32 ra, u32 oe, bool rc) = 0;
 	virtual void ADDZE(u32 rd, u32 ra, u32 oe, bool rc) = 0;
 	virtual void STDCX_(u32 rs, u32 ra, u32 rb) = 0;
 	virtual void STBX(u32 rs, u32 ra, u32 rb) = 0;
 	virtual void STVX(u32 vs, u32 ra, u32 rb) = 0;
 	virtual void MULLD(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) = 0;
+	virtual void SUBFME(u32 rd, u32 ra, u32 oe, bool rc) = 0;
 	virtual void ADDME(u32 rd, u32 ra, u32 oe, bool rc) = 0;
 	virtual void MULLW(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) = 0;
 	virtual void DCBTST(u32 th, u32 ra, u32 rb) = 0;

rpcs3/Emu/SysCalls/Modules/cellSysutil.cpp

@@ -839,7 +839,7 @@ int cellSysCacheMount(mem_ptr_t<CellSysCacheParam> param)
 	char id[CELL_SYSCACHE_ID_SIZE];
 	strncpy(id, param->cacheId, CELL_SYSCACHE_ID_SIZE);
 	strncpy(param->getCachePath, ("/dev_hdd1/cache/" + std::string(id) + "/").c_str(), CELL_SYSCACHE_PATH_MAX);
-	Emu.GetVFS().CreateFile(wxString(param->getCachePath));
+	Emu.GetVFS().CreateDir(wxString(param->getCachePath));
 
 	return CELL_SYSCACHE_RET_OK_RELAYED;
 }