mirror of https://github.com/RPCS3/rpcs3.git
Merge pull request #1046 from Nekotekina/new_interpreter
Alternative interpreters
This commit is contained in:
B1ackDaemon
commit
952098c00f
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@ -88,6 +88,7 @@ union _CRT_ALIGN(16) u128
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double _d[2];
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__m128 vf;
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__m128i vi;
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__m128d vd;
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class bit_array_128
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{
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@ -202,14 +203,21 @@ union _CRT_ALIGN(16) u128
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static u128 from32p(u32 value)
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{
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u128 ret;
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ret.vi = _mm_set1_epi32((int)value);
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ret.vi = _mm_set1_epi32(static_cast<s32>(value));
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return ret;
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}
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static u128 from16p(u16 value)
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{
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u128 ret;
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ret.vi = _mm_set1_epi16(static_cast<s16>(value));
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return ret;
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}
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static u128 from8p(u8 value)
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{
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u128 ret;
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ret.vi = _mm_set1_epi8((char)value);
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ret.vi = _mm_set1_epi8(static_cast<s8>(value));
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return ret;
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}
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@ -227,16 +235,75 @@ union _CRT_ALIGN(16) u128
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return ret;
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}
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static u128 fromF(__m128 value)
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{
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u128 ret;
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ret.vf = value;
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return ret;
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}
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static u128 fromD(__m128d value)
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{
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u128 ret;
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ret.vd = value;
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return ret;
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}
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static __forceinline u128 add8(const u128& left, const u128& right)
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{
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return fromV(_mm_add_epi8(left.vi, right.vi));
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}
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static __forceinline u128 add16(const u128& left, const u128& right)
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{
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return fromV(_mm_add_epi16(left.vi, right.vi));
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}
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static __forceinline u128 add32(const u128& left, const u128& right)
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{
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return fromV(_mm_add_epi32(left.vi, right.vi));
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}
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static __forceinline u128 addfs(const u128& left, const u128& right)
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{
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return fromF(_mm_add_ps(left.vf, right.vf));
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}
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static __forceinline u128 addfd(const u128& left, const u128& right)
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{
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return fromD(_mm_add_pd(left.vd, right.vd));
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}
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static __forceinline u128 sub8(const u128& left, const u128& right)
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{
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return fromV(_mm_sub_epi8(left.vi, right.vi));
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}
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static __forceinline u128 sub16(const u128& left, const u128& right)
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{
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return fromV(_mm_sub_epi16(left.vi, right.vi));
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}
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static __forceinline u128 sub32(const u128& left, const u128& right)
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{
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return fromV(_mm_sub_epi32(left.vi, right.vi));
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}
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static __forceinline u128 subfs(const u128& left, const u128& right)
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{
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return fromF(_mm_sub_ps(left.vf, right.vf));
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}
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static __forceinline u128 subfd(const u128& left, const u128& right)
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{
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return fromD(_mm_sub_pd(left.vd, right.vd));
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}
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static __forceinline u128 maxu8(const u128& left, const u128& right)
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{
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return fromV(_mm_max_epu8(left.vi, right.vi));
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}
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static __forceinline u128 minu8(const u128& left, const u128& right)
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{
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return fromV(_mm_min_epu8(left.vi, right.vi));
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@ -247,14 +314,14 @@ union _CRT_ALIGN(16) u128
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return fromV(_mm_cmpeq_epi8(left.vi, right.vi));
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}
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static __forceinline u128 gtu8(const u128& left, const u128& right)
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static __forceinline u128 eq16(const u128& left, const u128& right)
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{
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return fromV(_mm_cmpgt_epu8(left.vi, right.vi));
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return fromV(_mm_cmpeq_epi16(left.vi, right.vi));
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}
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static __forceinline u128 leu8(const u128& left, const u128& right)
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static __forceinline u128 eq32(const u128& left, const u128& right)
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{
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return fromV(_mm_cmple_epu8(left.vi, right.vi));
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return fromV(_mm_cmpeq_epi32(left.vi, right.vi));
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}
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bool operator == (const u128& right) const
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@ -287,6 +354,16 @@ union _CRT_ALIGN(16) u128
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return from64(~_u64[0], ~_u64[1]);
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}
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__forceinline bool is_any_1() const // check if any bit is 1
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{
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return _u64[0] || _u64[1];
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}
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__forceinline bool is_any_0() const // check if any bit is 0
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{
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return ~_u64[0] || ~_u64[1];
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}
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// result = (~left) & (right)
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static __forceinline u128 andnot(const u128& left, const u128& right)
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{
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@ -342,15 +342,49 @@ static __forceinline uint64_t cntlz64(uint64_t arg)
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}
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// compare 16 packed unsigned bytes (greater than)
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static __forceinline __m128i _mm_cmpgt_epu8(__m128i A, __m128i B)
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inline __m128i sse_cmpgt_epu8(__m128i A, __m128i B)
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{
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// (A xor 0x80) > (B xor 0x80)
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return _mm_cmpgt_epi8(_mm_xor_si128(A, _mm_set1_epi8(-128)), _mm_xor_si128(B, _mm_set1_epi8(-128)));
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const auto sign = _mm_set1_epi32(0x80808080);
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return _mm_cmpgt_epi8(_mm_xor_si128(A, sign), _mm_xor_si128(B, sign));
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}
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// compare 16 packed unsigned bytes (less or equal)
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static __forceinline __m128i _mm_cmple_epu8(__m128i A, __m128i B)
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inline __m128i sse_cmpgt_epu16(__m128i A, __m128i B)
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{
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// ((B xor 0x80) > (A xor 0x80)) || A == B
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return _mm_or_si128(_mm_cmpgt_epu8(B, A), _mm_cmpeq_epi8(A, B));
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const auto sign = _mm_set1_epi32(0x80008000);
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return _mm_cmpgt_epi16(_mm_xor_si128(A, sign), _mm_xor_si128(B, sign));
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}
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inline __m128i sse_cmpgt_epu32(__m128i A, __m128i B)
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{
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const auto sign = _mm_set1_epi32(0x80000000);
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return _mm_cmpgt_epi32(_mm_xor_si128(A, sign), _mm_xor_si128(B, sign));
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}
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inline __m128 sse_exp2_ps(__m128 A)
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{
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const auto x0 = _mm_max_ps(_mm_min_ps(A, _mm_set1_ps(127.4999961f)), _mm_set1_ps(-127.4999961f));
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const auto x1 = _mm_add_ps(x0, _mm_set1_ps(0.5f));
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const auto x2 = _mm_sub_epi32(_mm_cvtps_epi32(x1), _mm_and_si128(_mm_castps_si128(_mm_cmpnlt_ps(_mm_setzero_ps(), x1)), _mm_set1_epi32(1)));
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const auto x3 = _mm_sub_ps(x0, _mm_cvtepi32_ps(x2));
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const auto x4 = _mm_mul_ps(x3, x3);
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const auto x5 = _mm_mul_ps(x3, _mm_add_ps(_mm_mul_ps(_mm_add_ps(_mm_mul_ps(x4, _mm_set1_ps(0.023093347705f)), _mm_set1_ps(20.20206567f)), x4), _mm_set1_ps(1513.906801f)));
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const auto x6 = _mm_mul_ps(x5, _mm_rcp_ps(_mm_sub_ps(_mm_add_ps(_mm_mul_ps(_mm_set1_ps(233.1842117f), x4), _mm_set1_ps(4368.211667f)), x5)));
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return _mm_mul_ps(_mm_add_ps(_mm_add_ps(x6, x6), _mm_set1_ps(1.0f)), _mm_castsi128_ps(_mm_slli_epi32(_mm_add_epi32(x2, _mm_set1_epi32(127)), 23)));
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}
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inline __m128 sse_log2_ps(__m128 A)
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{
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const auto _1 = _mm_set1_ps(1.0f);
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const auto _c = _mm_set1_ps(1.442695040f);
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const auto x0 = _mm_max_ps(A, _mm_castsi128_ps(_mm_set1_epi32(0x00800000)));
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const auto x1 = _mm_or_ps(_mm_and_ps(x0, _mm_castsi128_ps(_mm_set1_epi32(0x807fffff))), _1);
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const auto x2 = _mm_rcp_ps(_mm_add_ps(x1, _1));
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const auto x3 = _mm_mul_ps(_mm_sub_ps(x1, _1), x2);
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const auto x4 = _mm_add_ps(x3, x3);
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const auto x5 = _mm_mul_ps(x4, x4);
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const auto x6 = _mm_add_ps(_mm_mul_ps(_mm_add_ps(_mm_mul_ps(_mm_set1_ps(-0.7895802789f), x5), _mm_set1_ps(16.38666457f)), x5), _mm_set1_ps(-64.1409953f));
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const auto x7 = _mm_rcp_ps(_mm_add_ps(_mm_mul_ps(_mm_add_ps(_mm_mul_ps(_mm_set1_ps(-35.67227983f), x5), _mm_set1_ps(312.0937664f)), x5), _mm_set1_ps(-769.6919436f)));
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const auto x8 = _mm_cvtepi32_ps(_mm_sub_epi32(_mm_srli_epi32(_mm_castps_si128(x0), 23), _mm_set1_epi32(127)));
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return _mm_add_ps(_mm_mul_ps(_mm_mul_ps(_mm_mul_ps(_mm_mul_ps(x5, x6), x7), x4), _c), _mm_add_ps(_mm_mul_ps(x4, _c), x8));
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}
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@ -128,7 +128,7 @@ bool rRename(const std::string &from, const std::string &to)
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#ifdef _WIN32
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if (!MoveFile(ConvertUTF8ToWString(from).c_str(), ConvertUTF8ToWString(to).c_str()))
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#else
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if (rename(from.c_str(), to.c_str()))
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if (int err = rename(from.c_str(), to.c_str()))
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#endif
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{
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LOG_ERROR(GENERAL, "Error renaming '%s' to '%s': 0x%llx", from.c_str(), to.c_str(), (u64)GET_API_ERROR);
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@ -34,7 +34,7 @@ if (NOT MSVC)
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set(CMAKE_C_FLAGS_MINSIZEREL "${CMAKE_C_FLAGS_MINSIZEREL} -Os -D_NDEBUG")
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set(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} -O1 -D_NDEBUG")
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set(CMAKE_C_FLAGS_RELWITHDEBINFO "${CMAKE_C_FLAGS_RELWITHDEBINFO} -O1 -g -D_NDEBUG")
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add_definitions(-msse2 -mcx16)
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add_definitions(-msse -msse2 -mcx16 -mssse3)
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endif()
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if (APPLE)
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@ -174,16 +174,17 @@ void ARMv7Thread::DoReset()
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void ARMv7Thread::DoRun()
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{
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m_dec = nullptr;
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switch(Ini.CPUDecoderMode.GetValue())
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{
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case 0:
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//m_dec = new ARMv7Decoder(*new ARMv7DisAsm());
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break;
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case 1:
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case 2:
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m_dec = new ARMv7Decoder(context);
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break;
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default:
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LOG_ERROR(PPU, "Invalid CPU decoder mode: %d", Ini.CPUDecoderMode.GetValue());
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Emu.Pause();
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}
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}
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@ -228,6 +229,7 @@ void ARMv7Thread::FastCall(u32 addr)
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void ARMv7Thread::FastStop()
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{
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m_status = Stopped;
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m_events |= CPU_EVENT_STOP;
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}
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armv7_thread::armv7_thread(u32 entry, const std::string& name, u32 stack_size, s32 prio)
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@ -13,6 +13,8 @@ typedef void(atexit_func_t)(vm::psv::ptr<void>);
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std::vector<std::function<void(ARMv7Context&)>> g_atexit;
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std::mutex g_atexit_mutex;
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std::string armv7_fmt(ARMv7Context& context, vm::psv::ptr<const char> fmt, u32 g_count, u32 f_count, u32 v_count)
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{
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std::string result;
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@ -152,7 +154,7 @@ namespace sce_libc_func
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{
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sceLibc.Warning("__cxa_atexit(func=*0x%x, arg=*0x%x, dso=*0x%x)", func, arg, dso);
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LV2_LOCK;
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std::lock_guard<std::mutex> lock(g_atexit_mutex);
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g_atexit.insert(g_atexit.begin(), [func, arg, dso](ARMv7Context& context)
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{
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@ -164,7 +166,7 @@ namespace sce_libc_func
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{
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sceLibc.Warning("__aeabi_atexit(arg=*0x%x, func=*0x%x, dso=*0x%x)", arg, func, dso);
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LV2_LOCK;
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std::lock_guard<std::mutex> lock(g_atexit_mutex);
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g_atexit.insert(g_atexit.begin(), [func, arg, dso](ARMv7Context& context)
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{
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@ -176,19 +178,27 @@ namespace sce_libc_func
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{
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sceLibc.Warning("exit()");
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for (auto func : g_atexit)
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std::lock_guard<std::mutex> lock(g_atexit_mutex);
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if (!Emu.IsStopped())
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{
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for (auto func : decltype(g_atexit)(std::move(g_atexit)))
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{
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func(context);
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}
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g_atexit.clear();
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sceLibc.Success("Process finished");
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CallAfter([]()
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{
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Emu.Stop();
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});
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while (!Emu.IsStopped())
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{
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std::this_thread::sleep_for(std::chrono::milliseconds(1));
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}
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}
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}
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void printf(ARMv7Context& context, vm::psv::ptr<const char> fmt) // va_args...
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@ -17,6 +17,7 @@ CPUThread* GetCurrentCPUThread()
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CPUThread::CPUThread(CPUThreadType type)
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: ThreadBase("CPUThread")
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, m_events(0)
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, m_type(type)
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, m_stack_size(0)
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, m_stack_addr(0)
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@ -242,6 +243,7 @@ void CPUThread::Stop()
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SendDbgCommand(DID_STOP_THREAD, this);
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m_status = Stopped;
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m_events |= CPU_EVENT_STOP;
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if(static_cast<NamedThreadBase*>(this) != GetCurrentNamedThread())
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{
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@ -20,11 +20,19 @@ enum CPUThreadStatus
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CPUThread_Step,
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};
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// CPU Thread Events
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enum : u64
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{
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CPU_EVENT_STOP = (1ull << 0),
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};
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class CPUDecoder;
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class CPUThread : public ThreadBase
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{
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protected:
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std::atomic<u64> m_events; // flags
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u32 m_status;
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u32 m_id;
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u64 m_prio;
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@ -45,6 +53,8 @@ protected:
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virtual void DumpInformation() override;
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public:
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void AddEvent(const u64 event) { m_events |= event; }
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virtual void InitRegs() = 0;
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virtual void InitStack() = 0;
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@ -115,8 +115,6 @@ namespace PPU_instr
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*/
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static CodeField<30> AA;
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static CodeFieldSignedOffset<6, 29, 2> LI(FIELD_BRANCH);
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//
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static CodeFieldSignedOffset<6, 29, 2> LL(FIELD_BRANCH);
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/*
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@ -245,7 +243,7 @@ namespace PPU_instr
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bind_instr(main_list, BC, BO, BI, BD, AA, LK);
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bind_instr(main_list, HACK, uimm26);
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bind_instr(main_list, SC, LEV);
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bind_instr(main_list, B, LI, AA, LK);
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bind_instr(main_list, B, LL, AA, LK);
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bind_instr(main_list, RLWIMI, RA, RS, SH, MB, ME, RC);
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bind_instr(main_list, RLWINM, RA, RS, SH, MB, ME, RC);
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bind_instr(main_list, RLWNM, RA, RS, RB, MB, ME, RC);
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|
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File diff suppressed because it is too large
Load Diff
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@ -18,6 +18,7 @@
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#include <fenv.h>
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extern u64 rotate_mask[64][64]; // defined in PPUThread.cpp, static didn't work correctly in GCC 4.9 for some reason
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|
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inline void InitRotateMask()
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{
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static bool inited = false;
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|
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@ -56,6 +57,11 @@ static double SilenceNaN(double x)
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return (double&)bits;
|
||||
}
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||||
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||||
static float SilenceNaN(float x)
|
||||
{
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||||
return static_cast<float>(SilenceNaN(static_cast<double>(x)));
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}
|
||||
|
||||
static void SetHostRoundingMode(u32 rn)
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||||
{
|
||||
switch (rn)
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|
|
@ -91,7 +97,6 @@ private:
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|||
public:
|
||||
PPUInterpreter(PPUThread& cpu) : CPU(cpu)
|
||||
{
|
||||
InitRotateMask();
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}
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private:
|
||||
|
|
@ -2445,6 +2450,11 @@ private:
|
|||
if(oe) CPU.SetOV((~RA>>63 == RB>>63) && (~RA>>63 != CPU.GPR[rd]>>63));
|
||||
if(rc) CPU.UpdateCR0<s64>(CPU.GPR[rd]);
|
||||
}
|
||||
void MULHDU(u32 rd, u32 ra, u32 rb, bool rc)
|
||||
{
|
||||
CPU.GPR[rd] = __umulh(CPU.GPR[ra], CPU.GPR[rb]);
|
||||
if(rc) CPU.UpdateCR0<s64>(CPU.GPR[rd]);
|
||||
}
|
||||
void ADDC(u32 rd, u32 ra, u32 rb, u32 oe, bool rc)
|
||||
{
|
||||
const u64 RA = CPU.GPR[ra];
|
||||
|
|
@ -2454,11 +2464,6 @@ private:
|
|||
if(oe) CPU.SetOV((RA>>63 == RB>>63) && (RA>>63 != CPU.GPR[rd]>>63));
|
||||
if(rc) CPU.UpdateCR0<s64>(CPU.GPR[rd]);
|
||||
}
|
||||
void MULHDU(u32 rd, u32 ra, u32 rb, bool rc)
|
||||
{
|
||||
CPU.GPR[rd] = __umulh(CPU.GPR[ra], CPU.GPR[rb]);
|
||||
if(rc) CPU.UpdateCR0<s64>(CPU.GPR[rd]);
|
||||
}
|
||||
void MULHWU(u32 rd, u32 ra, u32 rb, bool rc)
|
||||
{
|
||||
u32 a = (u32)CPU.GPR[ra];
|
||||
|
|
@ -2644,7 +2649,8 @@ private:
|
|||
}
|
||||
void LVX(u32 vd, u32 ra, u32 rb)
|
||||
{
|
||||
CPU.VPR[vd] = vm::read128((u64)((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~0xfULL));
|
||||
const u64 addr = (ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~0xfull;
|
||||
CPU.VPR[vd] = vm::read128(vm::cast(addr));
|
||||
}
|
||||
void NEG(u32 rd, u32 ra, u32 oe, bool rc)
|
||||
{
|
||||
|
|
@ -2780,14 +2786,6 @@ private:
|
|||
const u8 eb = (addr & 0xf) >> 2;
|
||||
vm::write32(vm::cast(addr), CPU.VPR[vs]._u32[3 - eb]);
|
||||
}
|
||||
void ADDZE(u32 rd, u32 ra, u32 oe, bool rc)
|
||||
{
|
||||
const u64 RA = CPU.GPR[ra];
|
||||
CPU.GPR[rd] = RA + CPU.XER.CA;
|
||||
CPU.XER.CA = CPU.IsCarry(RA, CPU.XER.CA);
|
||||
if(oe) CPU.SetOV((RA>>63 == 0) && (RA>>63 != CPU.GPR[rd]>>63));
|
||||
if(rc) CPU.UpdateCR0<s64>(CPU.GPR[rd]);
|
||||
}
|
||||
void SUBFZE(u32 rd, u32 ra, u32 oe, bool rc)
|
||||
{
|
||||
const u64 RA = CPU.GPR[ra];
|
||||
|
|
@ -2796,6 +2794,14 @@ private:
|
|||
if(oe) CPU.SetOV((~RA>>63 == 0) && (~RA>>63 != CPU.GPR[rd]>>63));
|
||||
if(rc) CPU.UpdateCR0<s64>(CPU.GPR[rd]);
|
||||
}
|
||||
void ADDZE(u32 rd, u32 ra, u32 oe, bool rc)
|
||||
{
|
||||
const u64 RA = CPU.GPR[ra];
|
||||
CPU.GPR[rd] = RA + CPU.XER.CA;
|
||||
CPU.XER.CA = CPU.IsCarry(RA, CPU.XER.CA);
|
||||
if(oe) CPU.SetOV((RA>>63 == 0) && (RA>>63 != CPU.GPR[rd]>>63));
|
||||
if(rc) CPU.UpdateCR0<s64>(CPU.GPR[rd]);
|
||||
}
|
||||
void STDCX_(u32 rs, u32 ra, u32 rb)
|
||||
{
|
||||
const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb];
|
||||
|
|
@ -2810,15 +2816,8 @@ private:
|
|||
}
|
||||
void STVX(u32 vs, u32 ra, u32 rb)
|
||||
{
|
||||
vm::write128((u64)((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~0xfULL), CPU.VPR[vs]);
|
||||
}
|
||||
void SUBFME(u32 rd, u32 ra, u32 oe, bool rc)
|
||||
{
|
||||
const u64 RA = CPU.GPR[ra];
|
||||
CPU.GPR[rd] = ~RA + CPU.XER.CA + ~0ULL;
|
||||
CPU.XER.CA = CPU.IsCarry(~RA, CPU.XER.CA, ~0ULL);
|
||||
if(oe) CPU.SetOV((~RA>>63 == 1) && (~RA>>63 != CPU.GPR[rd]>>63));
|
||||
if(rc) CPU.UpdateCR0<s64>(CPU.GPR[rd]);
|
||||
const u64 addr = (ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~0xfull;
|
||||
vm::write128(vm::cast(addr), CPU.VPR[vs]);
|
||||
}
|
||||
void MULLD(u32 rd, u32 ra, u32 rb, u32 oe, bool rc)
|
||||
{
|
||||
|
|
@ -2832,6 +2831,14 @@ private:
|
|||
}
|
||||
if(rc) CPU.UpdateCR0<s64>(CPU.GPR[rd]);
|
||||
}
|
||||
void SUBFME(u32 rd, u32 ra, u32 oe, bool rc)
|
||||
{
|
||||
const u64 RA = CPU.GPR[ra];
|
||||
CPU.GPR[rd] = ~RA + CPU.XER.CA + ~0ULL;
|
||||
CPU.XER.CA = CPU.IsCarry(~RA, CPU.XER.CA, ~0ULL);
|
||||
if(oe) CPU.SetOV((~RA>>63 == 1) && (~RA>>63 != CPU.GPR[rd]>>63));
|
||||
if(rc) CPU.UpdateCR0<s64>(CPU.GPR[rd]);
|
||||
}
|
||||
void ADDME(u32 rd, u32 ra, u32 oe, bool rc)
|
||||
{
|
||||
const s64 RA = CPU.GPR[ra];
|
||||
|
|
@ -2911,7 +2918,8 @@ private:
|
|||
}
|
||||
void LVXL(u32 vd, u32 ra, u32 rb)
|
||||
{
|
||||
CPU.VPR[vd] = vm::read128((u64)((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~0xfULL));
|
||||
const u64 addr = (ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~0xfull;
|
||||
CPU.VPR[vd] = vm::read128(vm::cast(addr));
|
||||
}
|
||||
void MFTB(u32 rd, u32 spr)
|
||||
{
|
||||
|
|
@ -3016,7 +3024,8 @@ private:
|
|||
}
|
||||
void STVXL(u32 vs, u32 ra, u32 rb)
|
||||
{
|
||||
vm::write128((u64)((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~0xfULL), CPU.VPR[vs]);
|
||||
const u64 addr = (ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~0xfull;
|
||||
vm::write128(vm::cast(addr), CPU.VPR[vs]);
|
||||
}
|
||||
void DIVD(u32 rd, u32 ra, u32 rb, u32 oe, bool rc)
|
||||
{
|
||||
|
|
@ -3238,7 +3247,7 @@ private:
|
|||
{
|
||||
u64 bits = (u64&)val;
|
||||
u32 bits32 = (bits>>32 & 0x80000000) | (bits>>29 & 0x7fffffff);
|
||||
vm::get_ref<be_t<u32>>(vm::cast(addr)) = (float)bits32;
|
||||
vm::get_ref<be_t<u32>>(vm::cast(addr)) = bits32;
|
||||
}
|
||||
}
|
||||
void STVRX(u32 vs, u32 ra, u32 rb)
|
||||
|
|
@ -3260,7 +3269,7 @@ private:
|
|||
{
|
||||
u64 bits = (u64&)val;
|
||||
u32 bits32 = (bits>>32 & 0x80000000) | (bits>>29 & 0x7fffffff);
|
||||
vm::get_ref<be_t<u32>>(vm::cast(addr)) = (float)bits32;
|
||||
vm::get_ref<be_t<u32>>(vm::cast(addr)) = bits32;
|
||||
}
|
||||
CPU.GPR[ra] = addr;
|
||||
}
|
||||
|
|
@ -3432,9 +3441,7 @@ private:
|
|||
{
|
||||
const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb];
|
||||
|
||||
auto const cache_line = vm::get_ptr<u8>(vm::cast(addr) & ~127);
|
||||
if (cache_line)
|
||||
memset(cache_line, 0, 128);
|
||||
memset(vm::get_ptr<u8>(vm::cast(addr) & ~127), 0, 128);
|
||||
}
|
||||
void LWZ(u32 rd, u32 ra, s32 d)
|
||||
{
|
||||
|
|
@ -3581,7 +3588,7 @@ private:
|
|||
{
|
||||
u64 bits = (u64&)val;
|
||||
u32 bits32 = (bits>>32 & 0x80000000) | (bits>>29 & 0x7fffffff);
|
||||
vm::get_ref<be_t<u32>>(vm::cast(addr)) = (float)bits32;
|
||||
vm::get_ref<be_t<u32>>(vm::cast(addr)) = bits32;
|
||||
}
|
||||
}
|
||||
void STFSU(u32 frs, u32 ra, s32 d)
|
||||
|
|
@ -3596,7 +3603,7 @@ private:
|
|||
{
|
||||
u64 bits = (u64&)val;
|
||||
u32 bits32 = (bits>>32 & 0x80000000) | (bits>>29 & 0x7fffffff);
|
||||
vm::get_ref<be_t<u32>>(vm::cast(addr)) = (float)bits32;
|
||||
vm::get_ref<be_t<u32>>(vm::cast(addr)) = bits32;
|
||||
}
|
||||
CPU.GPR[ra] = addr;
|
||||
}
|
||||
|
|
@ -3618,7 +3625,6 @@ private:
|
|||
}
|
||||
void LDU(u32 rd, u32 ra, s32 ds)
|
||||
{
|
||||
//if(ra == 0 || rt == ra) return;
|
||||
const u64 addr = CPU.GPR[ra] + ds;
|
||||
CPU.GPR[rd] = vm::read64(vm::cast(addr));
|
||||
CPU.GPR[ra] = addr;
|
||||
|
|
@ -3684,15 +3690,14 @@ private:
|
|||
}
|
||||
void STDU(u32 rs, u32 ra, s32 ds)
|
||||
{
|
||||
//if(ra == 0 || rs == ra) return;
|
||||
const u64 addr = CPU.GPR[ra] + ds;
|
||||
vm::write64(vm::cast(addr), CPU.GPR[rs]);
|
||||
CPU.GPR[ra] = addr;
|
||||
}
|
||||
void MTFSB1(u32 crbd, bool rc)
|
||||
{
|
||||
u64 mask = (1ULL << (31 - crbd));
|
||||
if ((crbd >= 3 && crbd <= 6) && !(CPU.FPSCR.FPSCR & mask)) mask |= 1ULL << 31; //FPSCR.FX
|
||||
u32 mask = 1 << (31 - crbd);
|
||||
if ((crbd >= 3 && crbd <= 6) && !(CPU.FPSCR.FPSCR & mask)) mask |= 1 << 31; //FPSCR.FX
|
||||
if ((crbd == 29) && !CPU.FPSCR.NI) LOG_WARNING(PPU, "Non-IEEE mode enabled");
|
||||
CPU.SetFPSCR(CPU.FPSCR.FPSCR | mask);
|
||||
|
||||
|
|
@ -3706,7 +3711,7 @@ private:
|
|||
}
|
||||
void MTFSB0(u32 crbd, bool rc)
|
||||
{
|
||||
u64 mask = (1ULL << (31 - crbd));
|
||||
u32 mask = 1 << (31 - crbd);
|
||||
if ((crbd == 29) && !CPU.FPSCR.NI) LOG_WARNING(PPU, "Non-IEEE mode disabled");
|
||||
CPU.SetFPSCR(CPU.FPSCR.FPSCR & ~mask);
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,953 @@
|
|||
#pragma once
|
||||
#include "PPUOpcodes.h"
|
||||
|
||||
class PPUThread;
|
||||
|
||||
union ppu_opcode_t
|
||||
{
|
||||
u32 opcode;
|
||||
|
||||
struct
|
||||
{
|
||||
u32 : 1; // 31
|
||||
u32 shh : 1; // 30
|
||||
u32 : 3; // 27..29
|
||||
u32 mbmeh : 1; // 26
|
||||
u32 mbmel : 5; // 21..25
|
||||
u32 shl : 5; // 16..20
|
||||
u32 vuimm : 5; // 11..15
|
||||
u32 vs : 5; // 6..10
|
||||
u32 : 6;
|
||||
};
|
||||
|
||||
struct
|
||||
{
|
||||
u32 : 6; // 26..31
|
||||
u32 vsh : 4; // 22..25
|
||||
u32 oe : 1; // 21
|
||||
u32 spr : 10; // 11..20
|
||||
u32 : 11;
|
||||
};
|
||||
|
||||
struct
|
||||
{
|
||||
u32 : 6; // 26..31
|
||||
u32 vc : 5; // 21..25
|
||||
u32 vb : 5; // 16..20
|
||||
u32 va : 5; // 11..15
|
||||
u32 vd : 5; // 6..10
|
||||
u32 : 6;
|
||||
};
|
||||
|
||||
struct
|
||||
{
|
||||
u32 lk : 1; // 31
|
||||
u32 aa : 1; // 30
|
||||
u32 : 4; // 26..29
|
||||
u32 : 5; // 21..25
|
||||
u32 rb : 5; // 16..20
|
||||
u32 ra : 5; // 11..15
|
||||
u32 rd : 5; // 6..10
|
||||
u32 : 6;
|
||||
};
|
||||
|
||||
struct
|
||||
{
|
||||
u32 uimm16 : 16; // 16..31
|
||||
u32 : 4; // 12..15
|
||||
u32 l11 : 1; // 11
|
||||
u32 rs : 5; // 6..10
|
||||
u32 : 6;
|
||||
};
|
||||
|
||||
struct
|
||||
{
|
||||
s32 simm16 : 16; // 16..31
|
||||
s32 vsimm : 5; // 11..15
|
||||
s32 : 11;
|
||||
};
|
||||
|
||||
struct
|
||||
{
|
||||
s32 ll : 26; // 6..31
|
||||
s32 : 6;
|
||||
};
|
||||
|
||||
struct
|
||||
{
|
||||
u32 : 5; // 27..31
|
||||
u32 lev : 7; // 20..26
|
||||
u32 i : 4; // 16..19
|
||||
u32 : 2; // 14..15
|
||||
u32 crfs : 3; // 11..13
|
||||
u32 l10 : 1; // 10
|
||||
u32 : 1; // 9
|
||||
u32 crfd : 3; // 6..8
|
||||
u32 : 6;
|
||||
};
|
||||
|
||||
struct
|
||||
{
|
||||
u32 : 1; // 31
|
||||
u32 : 1; // 30
|
||||
u32 : 4; // 26..29
|
||||
u32 : 5; // 21..25
|
||||
u32 crbb : 5; // 16..20
|
||||
u32 crba : 5; // 11..15
|
||||
u32 crbd : 5; // 6..10
|
||||
u32 : 6;
|
||||
};
|
||||
|
||||
struct
|
||||
{
|
||||
u32 rc : 1; // 31
|
||||
u32 me : 5; // 26..30
|
||||
u32 mb : 5; // 21..25
|
||||
u32 sh : 5; // 16..20
|
||||
u32 bi : 5; // 11..15
|
||||
u32 bo : 5; // 6..10
|
||||
u32 : 6;
|
||||
};
|
||||
|
||||
struct
|
||||
{
|
||||
u32 : 6; // 26..31
|
||||
u32 frc : 5; // 21..25
|
||||
u32 frb : 5; // 16..20
|
||||
u32 fra : 5; // 11..15
|
||||
u32 frd : 5; // 6..10
|
||||
u32 : 6;
|
||||
};
|
||||
|
||||
struct
|
||||
{
|
||||
u32 : 12; // 20..31
|
||||
u32 crm : 8; // 12..19
|
||||
u32 : 1; // 11
|
||||
u32 frs : 5; // 6..10
|
||||
u32 : 6;
|
||||
};
|
||||
|
||||
struct
|
||||
{
|
||||
u32 : 17; // 15..31
|
||||
u32 flm : 8; // 7..14
|
||||
u32 : 7;
|
||||
};
|
||||
};
|
||||
|
||||
using ppu_inter_func_t = void(*)(PPUThread& CPU, ppu_opcode_t opcode);
|
||||
|
||||
namespace ppu_interpreter
|
||||
{
|
||||
void NULL_OP(PPUThread& CPU, ppu_opcode_t op);
|
||||
void NOP(PPUThread& CPU, ppu_opcode_t op);
|
||||
|
||||
void TDI(PPUThread& CPU, ppu_opcode_t op);
|
||||
void TWI(PPUThread& CPU, ppu_opcode_t op);
|
||||
|
||||
void MFVSCR(PPUThread& CPU, ppu_opcode_t op);
|
||||
void MTVSCR(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VADDCUW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VADDFP(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VADDSBS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VADDSHS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VADDSWS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VADDUBM(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VADDUBS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VADDUHM(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VADDUHS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VADDUWM(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VADDUWS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VAND(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VANDC(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VAVGSB(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VAVGSH(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VAVGSW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VAVGUB(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VAVGUH(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VAVGUW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCFSX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCFUX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCMPBFP(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCMPBFP_(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCMPEQFP(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCMPEQFP_(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCMPEQUB(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCMPEQUB_(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCMPEQUH(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCMPEQUH_(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCMPEQUW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCMPEQUW_(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCMPGEFP(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCMPGEFP_(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCMPGTFP(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCMPGTFP_(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCMPGTSB(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCMPGTSB_(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCMPGTSH(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCMPGTSH_(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCMPGTSW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCMPGTSW_(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCMPGTUB(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCMPGTUB_(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCMPGTUH(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCMPGTUH_(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCMPGTUW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCMPGTUW_(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCTSXS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VCTUXS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VEXPTEFP(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VLOGEFP(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMADDFP(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMAXFP(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMAXSB(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMAXSH(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMAXSW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMAXUB(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMAXUH(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMAXUW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMHADDSHS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMHRADDSHS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMINFP(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMINSB(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMINSH(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMINSW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMINUB(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMINUH(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMINUW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMLADDUHM(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMRGHB(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMRGHH(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMRGHW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMRGLB(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMRGLH(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMRGLW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMSUMMBM(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMSUMSHM(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMSUMSHS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMSUMUBM(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMSUMUHM(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMSUMUHS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMULESB(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMULESH(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMULEUB(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMULEUH(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMULOSB(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMULOSH(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMULOUB(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VMULOUH(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VNMSUBFP(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VNOR(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VOR(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VPERM(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VPKPX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VPKSHSS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VPKSHUS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VPKSWSS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VPKSWUS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VPKUHUM(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VPKUHUS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VPKUWUM(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VPKUWUS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VREFP(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VRFIM(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VRFIN(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VRFIP(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VRFIZ(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VRLB(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VRLH(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VRLW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VRSQRTEFP(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSEL(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSL(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSLB(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSLDOI(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSLH(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSLO(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSLW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSPLTB(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSPLTH(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSPLTISB(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSPLTISH(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSPLTISW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSPLTW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSR(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSRAB(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSRAH(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSRAW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSRB(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSRH(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSRO(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSRW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSUBCUW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSUBFP(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSUBSBS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSUBSHS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSUBSWS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSUBUBM(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSUBUBS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSUBUHM(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSUBUHS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSUBUWM(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSUBUWS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSUMSWS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSUM2SWS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSUM4SBS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSUM4SHS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VSUM4UBS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VUPKHPX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VUPKHSB(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VUPKHSH(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VUPKLPX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VUPKLSB(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VUPKLSH(PPUThread& CPU, ppu_opcode_t op);
|
||||
void VXOR(PPUThread& CPU, ppu_opcode_t op);
|
||||
void MULLI(PPUThread& CPU, ppu_opcode_t op);
|
||||
void SUBFIC(PPUThread& CPU, ppu_opcode_t op);
|
||||
void CMPLI(PPUThread& CPU, ppu_opcode_t op);
|
||||
void CMPI(PPUThread& CPU, ppu_opcode_t op);
|
||||
void ADDIC(PPUThread& CPU, ppu_opcode_t op);
|
||||
void ADDIC_(PPUThread& CPU, ppu_opcode_t op);
|
||||
void ADDI(PPUThread& CPU, ppu_opcode_t op);
|
||||
void ADDIS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void BC(PPUThread& CPU, ppu_opcode_t op);
|
||||
void HACK(PPUThread& CPU, ppu_opcode_t op);
|
||||
void SC(PPUThread& CPU, ppu_opcode_t op);
|
||||
void B(PPUThread& CPU, ppu_opcode_t op);
|
||||
void MCRF(PPUThread& CPU, ppu_opcode_t op);
|
||||
void BCLR(PPUThread& CPU, ppu_opcode_t op);
|
||||
void CRNOR(PPUThread& CPU, ppu_opcode_t op);
|
||||
void CRANDC(PPUThread& CPU, ppu_opcode_t op);
|
||||
void ISYNC(PPUThread& CPU, ppu_opcode_t op);
|
||||
void CRXOR(PPUThread& CPU, ppu_opcode_t op);
|
||||
void CRNAND(PPUThread& CPU, ppu_opcode_t op);
|
||||
void CRAND(PPUThread& CPU, ppu_opcode_t op);
|
||||
void CREQV(PPUThread& CPU, ppu_opcode_t op);
|
||||
void CRORC(PPUThread& CPU, ppu_opcode_t op);
|
||||
void CROR(PPUThread& CPU, ppu_opcode_t op);
|
||||
void BCCTR(PPUThread& CPU, ppu_opcode_t op);
|
||||
void RLWIMI(PPUThread& CPU, ppu_opcode_t op);
|
||||
void RLWINM(PPUThread& CPU, ppu_opcode_t op);
|
||||
void RLWNM(PPUThread& CPU, ppu_opcode_t op);
|
||||
void ORI(PPUThread& CPU, ppu_opcode_t op);
|
||||
void ORIS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void XORI(PPUThread& CPU, ppu_opcode_t op);
|
||||
void XORIS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void ANDI_(PPUThread& CPU, ppu_opcode_t op);
|
||||
void ANDIS_(PPUThread& CPU, ppu_opcode_t op);
|
||||
void RLDICL(PPUThread& CPU, ppu_opcode_t op);
|
||||
void RLDICR(PPUThread& CPU, ppu_opcode_t op);
|
||||
void RLDIC(PPUThread& CPU, ppu_opcode_t op);
|
||||
void RLDIMI(PPUThread& CPU, ppu_opcode_t op);
|
||||
void RLDC_LR(PPUThread& CPU, ppu_opcode_t op);
|
||||
void CMP(PPUThread& CPU, ppu_opcode_t op);
|
||||
void TW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LVSL(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LVEBX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void SUBFC(PPUThread& CPU, ppu_opcode_t op);
|
||||
void MULHDU(PPUThread& CPU, ppu_opcode_t op);
|
||||
void ADDC(PPUThread& CPU, ppu_opcode_t op);
|
||||
void MULHWU(PPUThread& CPU, ppu_opcode_t op);
|
||||
void MFOCRF(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LWARX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LDX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LWZX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void SLW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void CNTLZW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void SLD(PPUThread& CPU, ppu_opcode_t op);
|
||||
void AND(PPUThread& CPU, ppu_opcode_t op);
|
||||
void CMPL(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LVSR(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LVEHX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void SUBF(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LDUX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void DCBST(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LWZUX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void CNTLZD(PPUThread& CPU, ppu_opcode_t op);
|
||||
void ANDC(PPUThread& CPU, ppu_opcode_t op);
|
||||
void TD(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LVEWX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void MULHD(PPUThread& CPU, ppu_opcode_t op);
|
||||
void MULHW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LDARX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void DCBF(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LBZX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LVX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void NEG(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LBZUX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void NOR(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STVEBX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void SUBFE(PPUThread& CPU, ppu_opcode_t op);
|
||||
void ADDE(PPUThread& CPU, ppu_opcode_t op);
|
||||
void MTOCRF(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STDX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STWCX_(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STWX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STVEHX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STDUX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STWUX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STVEWX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void SUBFZE(PPUThread& CPU, ppu_opcode_t op);
|
||||
void ADDZE(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STDCX_(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STBX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STVX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void MULLD(PPUThread& CPU, ppu_opcode_t op);
|
||||
void SUBFME(PPUThread& CPU, ppu_opcode_t op);
|
||||
void ADDME(PPUThread& CPU, ppu_opcode_t op);
|
||||
void MULLW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void DCBTST(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STBUX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void ADD(PPUThread& CPU, ppu_opcode_t op);
|
||||
void DCBT(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LHZX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void EQV(PPUThread& CPU, ppu_opcode_t op);
|
||||
void ECIWX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LHZUX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void XOR(PPUThread& CPU, ppu_opcode_t op);
|
||||
void MFSPR(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LWAX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void DST(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LHAX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LVXL(PPUThread& CPU, ppu_opcode_t op);
|
||||
void MFTB(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LWAUX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void DSTST(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LHAUX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STHX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void ORC(PPUThread& CPU, ppu_opcode_t op);
|
||||
void ECOWX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STHUX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void OR(PPUThread& CPU, ppu_opcode_t op);
|
||||
void DIVDU(PPUThread& CPU, ppu_opcode_t op);
|
||||
void DIVWU(PPUThread& CPU, ppu_opcode_t op);
|
||||
void MTSPR(PPUThread& CPU, ppu_opcode_t op);
|
||||
void DCBI(PPUThread& CPU, ppu_opcode_t op);
|
||||
void NAND(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STVXL(PPUThread& CPU, ppu_opcode_t op);
|
||||
void DIVD(PPUThread& CPU, ppu_opcode_t op);
|
||||
void DIVW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LVLX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LDBRX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LSWX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LWBRX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LFSX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void SRW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void SRD(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LVRX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LSWI(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LFSUX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void SYNC(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LFDX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LFDUX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STVLX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STDBRX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STSWX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STWBRX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STFSX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STVRX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STFSUX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STSWI(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STFDX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STFDUX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LVLXL(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LHBRX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void SRAW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void SRAD(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LVRXL(PPUThread& CPU, ppu_opcode_t op);
|
||||
void DSS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void SRAWI(PPUThread& CPU, ppu_opcode_t op);
|
||||
void SRADI(PPUThread& CPU, ppu_opcode_t op);
|
||||
void EIEIO(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STVLXL(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STHBRX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void EXTSH(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STVRXL(PPUThread& CPU, ppu_opcode_t op);
|
||||
void EXTSB(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STFIWX(PPUThread& CPU, ppu_opcode_t op);
|
||||
void EXTSW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void ICBI(PPUThread& CPU, ppu_opcode_t op);
|
||||
void DCBZ(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LWZ(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LWZU(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LBZ(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LBZU(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STWU(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STB(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STBU(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LHZ(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LHZU(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LHA(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LHAU(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STH(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STHU(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LMW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STMW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LFS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LFSU(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LFD(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LFDU(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STFS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STFSU(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STFD(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STFDU(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LD(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LDU(PPUThread& CPU, ppu_opcode_t op);
|
||||
void LWA(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FDIVS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FSUBS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FADDS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FSQRTS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FRES(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FMULS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FMADDS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FMSUBS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FNMSUBS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FNMADDS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STD(PPUThread& CPU, ppu_opcode_t op);
|
||||
void STDU(PPUThread& CPU, ppu_opcode_t op);
|
||||
void MTFSB1(PPUThread& CPU, ppu_opcode_t op);
|
||||
void MCRFS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void MTFSB0(PPUThread& CPU, ppu_opcode_t op);
|
||||
void MTFSFI(PPUThread& CPU, ppu_opcode_t op);
|
||||
void MFFS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void MTFSF(PPUThread& CPU, ppu_opcode_t op);
|
||||
|
||||
void FCMPU(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FRSP(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FCTIW(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FCTIWZ(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FDIV(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FSUB(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FADD(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FSQRT(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FSEL(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FMUL(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FRSQRTE(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FMSUB(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FMADD(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FNMSUB(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FNMADD(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FCMPO(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FNEG(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FMR(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FNABS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FABS(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FCTID(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FCTIDZ(PPUThread& CPU, ppu_opcode_t op);
|
||||
void FCFID(PPUThread& CPU, ppu_opcode_t op);
|
||||
|
||||
void UNK(PPUThread& CPU, ppu_opcode_t op);
|
||||
}
|
||||
|
||||
class PPUInterpreter2 : public PPUOpcodes
|
||||
{
|
||||
public:
|
||||
virtual ~PPUInterpreter2() {}
|
||||
|
||||
ppu_inter_func_t func;
|
||||
|
||||
virtual void NULL_OP() { func = ppu_interpreter::NULL_OP; }
|
||||
virtual void NOP() { func = ppu_interpreter::NOP; }
|
||||
|
||||
virtual void TDI(u32 to, u32 ra, s32 simm16) { func = ppu_interpreter::TDI; }
|
||||
virtual void TWI(u32 to, u32 ra, s32 simm16) { func = ppu_interpreter::TWI; }
|
||||
|
||||
virtual void MFVSCR(u32 vd) { func = ppu_interpreter::MFVSCR; }
|
||||
virtual void MTVSCR(u32 vb) { func = ppu_interpreter::MTVSCR; }
|
||||
virtual void VADDCUW(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VADDCUW; }
|
||||
virtual void VADDFP(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VADDFP; }
|
||||
virtual void VADDSBS(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VADDSBS; }
|
||||
virtual void VADDSHS(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VADDSHS; }
|
||||
virtual void VADDSWS(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VADDSWS; }
|
||||
virtual void VADDUBM(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VADDUBM; }
|
||||
virtual void VADDUBS(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VADDUBS; }
|
||||
virtual void VADDUHM(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VADDUHM; }
|
||||
virtual void VADDUHS(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VADDUHS; }
|
||||
virtual void VADDUWM(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VADDUWM; }
|
||||
virtual void VADDUWS(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VADDUWS; }
|
||||
virtual void VAND(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VAND; }
|
||||
virtual void VANDC(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VANDC; }
|
||||
virtual void VAVGSB(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VAVGSB; }
|
||||
virtual void VAVGSH(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VAVGSH; }
|
||||
virtual void VAVGSW(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VAVGSW; }
|
||||
virtual void VAVGUB(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VAVGUB; }
|
||||
virtual void VAVGUH(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VAVGUH; }
|
||||
virtual void VAVGUW(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VAVGUW; }
|
||||
virtual void VCFSX(u32 vd, u32 uimm5, u32 vb) { func = ppu_interpreter::VCFSX; }
|
||||
virtual void VCFUX(u32 vd, u32 uimm5, u32 vb) { func = ppu_interpreter::VCFUX; }
|
||||
virtual void VCMPBFP(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VCMPBFP; }
|
||||
virtual void VCMPBFP_(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VCMPBFP_; }
|
||||
virtual void VCMPEQFP(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VCMPEQFP; }
|
||||
virtual void VCMPEQFP_(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VCMPEQFP_; }
|
||||
virtual void VCMPEQUB(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VCMPEQUB; }
|
||||
virtual void VCMPEQUB_(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VCMPEQUB_; }
|
||||
virtual void VCMPEQUH(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VCMPEQUH; }
|
||||
virtual void VCMPEQUH_(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VCMPEQUH_; }
|
||||
virtual void VCMPEQUW(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VCMPEQUW; }
|
||||
virtual void VCMPEQUW_(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VCMPEQUW_; }
|
||||
virtual void VCMPGEFP(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VCMPGEFP; }
|
||||
virtual void VCMPGEFP_(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VCMPGEFP_; }
|
||||
virtual void VCMPGTFP(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VCMPGTFP; }
|
||||
virtual void VCMPGTFP_(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VCMPGTFP_; }
|
||||
virtual void VCMPGTSB(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VCMPGTSB; }
|
||||
virtual void VCMPGTSB_(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VCMPGTSB_; }
|
||||
virtual void VCMPGTSH(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VCMPGTSH; }
|
||||
virtual void VCMPGTSH_(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VCMPGTSH_; }
|
||||
virtual void VCMPGTSW(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VCMPGTSW; }
|
||||
virtual void VCMPGTSW_(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VCMPGTSW_; }
|
||||
virtual void VCMPGTUB(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VCMPGTUB; }
|
||||
virtual void VCMPGTUB_(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VCMPGTUB_; }
|
||||
virtual void VCMPGTUH(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VCMPGTUH; }
|
||||
virtual void VCMPGTUH_(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VCMPGTUH_; }
|
||||
virtual void VCMPGTUW(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VCMPGTUW; }
|
||||
virtual void VCMPGTUW_(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VCMPGTUW_; }
|
||||
virtual void VCTSXS(u32 vd, u32 uimm5, u32 vb) { func = ppu_interpreter::VCTSXS; }
|
||||
virtual void VCTUXS(u32 vd, u32 uimm5, u32 vb) { func = ppu_interpreter::VCTUXS; }
|
||||
virtual void VEXPTEFP(u32 vd, u32 vb) { func = ppu_interpreter::VEXPTEFP; }
|
||||
virtual void VLOGEFP(u32 vd, u32 vb) { func = ppu_interpreter::VLOGEFP; }
|
||||
virtual void VMADDFP(u32 vd, u32 va, u32 vc, u32 vb) { func = ppu_interpreter::VMADDFP; }
|
||||
virtual void VMAXFP(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VMAXFP; }
|
||||
virtual void VMAXSB(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VMAXSB; }
|
||||
virtual void VMAXSH(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VMAXSH; }
|
||||
virtual void VMAXSW(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VMAXSW; }
|
||||
virtual void VMAXUB(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VMAXUB; }
|
||||
virtual void VMAXUH(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VMAXUH; }
|
||||
virtual void VMAXUW(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VMAXUW; }
|
||||
virtual void VMHADDSHS(u32 vd, u32 va, u32 vb, u32 vc) { func = ppu_interpreter::VMHADDSHS; }
|
||||
virtual void VMHRADDSHS(u32 vd, u32 va, u32 vb, u32 vc) { func = ppu_interpreter::VMHRADDSHS; }
|
||||
virtual void VMINFP(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VMINFP; }
|
||||
virtual void VMINSB(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VMINSB; }
|
||||
virtual void VMINSH(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VMINSH; }
|
||||
virtual void VMINSW(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VMINSW; }
|
||||
virtual void VMINUB(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VMINUB; }
|
||||
virtual void VMINUH(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VMINUH; }
|
||||
virtual void VMINUW(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VMINUW; }
|
||||
virtual void VMLADDUHM(u32 vd, u32 va, u32 vb, u32 vc) { func = ppu_interpreter::VMLADDUHM; }
|
||||
virtual void VMRGHB(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VMRGHB; }
|
||||
virtual void VMRGHH(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VMRGHH; }
|
||||
virtual void VMRGHW(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VMRGHW; }
|
||||
virtual void VMRGLB(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VMRGLB; }
|
||||
virtual void VMRGLH(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VMRGLH; }
|
||||
virtual void VMRGLW(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VMRGLW; }
|
||||
virtual void VMSUMMBM(u32 vd, u32 va, u32 vb, u32 vc) { func = ppu_interpreter::VMSUMMBM; }
|
||||
virtual void VMSUMSHM(u32 vd, u32 va, u32 vb, u32 vc) { func = ppu_interpreter::VMSUMSHM; }
|
||||
virtual void VMSUMSHS(u32 vd, u32 va, u32 vb, u32 vc) { func = ppu_interpreter::VMSUMSHS; }
|
||||
virtual void VMSUMUBM(u32 vd, u32 va, u32 vb, u32 vc) { func = ppu_interpreter::VMSUMUBM; }
|
||||
virtual void VMSUMUHM(u32 vd, u32 va, u32 vb, u32 vc) { func = ppu_interpreter::VMSUMUHM; }
|
||||
virtual void VMSUMUHS(u32 vd, u32 va, u32 vb, u32 vc) { func = ppu_interpreter::VMSUMUHS; }
|
||||
virtual void VMULESB(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VMULESB; }
|
||||
virtual void VMULESH(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VMULESH; }
|
||||
virtual void VMULEUB(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VMULEUB; }
|
||||
virtual void VMULEUH(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VMULEUH; }
|
||||
virtual void VMULOSB(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VMULOSB; }
|
||||
virtual void VMULOSH(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VMULOSH; }
|
||||
virtual void VMULOUB(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VMULOUB; }
|
||||
virtual void VMULOUH(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VMULOUH; }
|
||||
virtual void VNMSUBFP(u32 vd, u32 va, u32 vc, u32 vb) { func = ppu_interpreter::VNMSUBFP; }
|
||||
virtual void VNOR(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VNOR; }
|
||||
virtual void VOR(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VOR; }
|
||||
virtual void VPERM(u32 vd, u32 va, u32 vb, u32 vc) { func = ppu_interpreter::VPERM; }
|
||||
virtual void VPKPX(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VPKPX; }
|
||||
virtual void VPKSHSS(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VPKSHSS; }
|
||||
virtual void VPKSHUS(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VPKSHUS; }
|
||||
virtual void VPKSWSS(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VPKSWSS; }
|
||||
virtual void VPKSWUS(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VPKSWUS; }
|
||||
virtual void VPKUHUM(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VPKUHUM; }
|
||||
virtual void VPKUHUS(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VPKUHUS; }
|
||||
virtual void VPKUWUM(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VPKUWUM; }
|
||||
virtual void VPKUWUS(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VPKUWUS; }
|
||||
virtual void VREFP(u32 vd, u32 vb) { func = ppu_interpreter::VREFP; }
|
||||
virtual void VRFIM(u32 vd, u32 vb) { func = ppu_interpreter::VRFIM; }
|
||||
virtual void VRFIN(u32 vd, u32 vb) { func = ppu_interpreter::VRFIN; }
|
||||
virtual void VRFIP(u32 vd, u32 vb) { func = ppu_interpreter::VRFIP; }
|
||||
virtual void VRFIZ(u32 vd, u32 vb) { func = ppu_interpreter::VRFIZ; }
|
||||
virtual void VRLB(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VRLB; }
|
||||
virtual void VRLH(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VRLH; }
|
||||
virtual void VRLW(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VRLW; }
|
||||
virtual void VRSQRTEFP(u32 vd, u32 vb) { func = ppu_interpreter::VRSQRTEFP; }
|
||||
virtual void VSEL(u32 vd, u32 va, u32 vb, u32 vc) { func = ppu_interpreter::VSEL; }
|
||||
virtual void VSL(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VSL; }
|
||||
virtual void VSLB(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VSLB; }
|
||||
virtual void VSLDOI(u32 vd, u32 va, u32 vb, u32 sh) { func = ppu_interpreter::VSLDOI; }
|
||||
virtual void VSLH(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VSLH; }
|
||||
virtual void VSLO(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VSLO; }
|
||||
virtual void VSLW(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VSLW; }
|
||||
virtual void VSPLTB(u32 vd, u32 uimm5, u32 vb) { func = ppu_interpreter::VSPLTB; }
|
||||
virtual void VSPLTH(u32 vd, u32 uimm5, u32 vb) { func = ppu_interpreter::VSPLTH; }
|
||||
virtual void VSPLTISB(u32 vd, s32 simm5) { func = ppu_interpreter::VSPLTISB; }
|
||||
virtual void VSPLTISH(u32 vd, s32 simm5) { func = ppu_interpreter::VSPLTISH; }
|
||||
virtual void VSPLTISW(u32 vd, s32 simm5) { func = ppu_interpreter::VSPLTISW; }
|
||||
virtual void VSPLTW(u32 vd, u32 uimm5, u32 vb) { func = ppu_interpreter::VSPLTW; }
|
||||
virtual void VSR(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VSR; }
|
||||
virtual void VSRAB(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VSRAB; }
|
||||
virtual void VSRAH(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VSRAH; }
|
||||
virtual void VSRAW(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VSRAW; }
|
||||
virtual void VSRB(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VSRB; }
|
||||
virtual void VSRH(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VSRH; }
|
||||
virtual void VSRO(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VSRO; }
|
||||
virtual void VSRW(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VSRW; }
|
||||
virtual void VSUBCUW(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VSUBCUW; }
|
||||
virtual void VSUBFP(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VSUBFP; }
|
||||
virtual void VSUBSBS(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VSUBSBS; }
|
||||
virtual void VSUBSHS(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VSUBSHS; }
|
||||
virtual void VSUBSWS(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VSUBSWS; }
|
||||
virtual void VSUBUBM(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VSUBUBM; }
|
||||
virtual void VSUBUBS(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VSUBUBS; }
|
||||
virtual void VSUBUHM(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VSUBUHM; }
|
||||
virtual void VSUBUHS(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VSUBUHS; }
|
||||
virtual void VSUBUWM(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VSUBUWM; }
|
||||
virtual void VSUBUWS(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VSUBUWS; }
|
||||
virtual void VSUMSWS(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VSUMSWS; }
|
||||
virtual void VSUM2SWS(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VSUM2SWS; }
|
||||
virtual void VSUM4SBS(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VSUM4SBS; }
|
||||
virtual void VSUM4SHS(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VSUM4SHS; }
|
||||
virtual void VSUM4UBS(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VSUM4UBS; }
|
||||
virtual void VUPKHPX(u32 vd, u32 vb) { func = ppu_interpreter::VUPKHPX; }
|
||||
virtual void VUPKHSB(u32 vd, u32 vb) { func = ppu_interpreter::VUPKHSB; }
|
||||
virtual void VUPKHSH(u32 vd, u32 vb) { func = ppu_interpreter::VUPKHSH; }
|
||||
virtual void VUPKLPX(u32 vd, u32 vb) { func = ppu_interpreter::VUPKLPX; }
|
||||
virtual void VUPKLSB(u32 vd, u32 vb) { func = ppu_interpreter::VUPKLSB; }
|
||||
virtual void VUPKLSH(u32 vd, u32 vb) { func = ppu_interpreter::VUPKLSH; }
|
||||
virtual void VXOR(u32 vd, u32 va, u32 vb) { func = ppu_interpreter::VXOR; }
|
||||
virtual void MULLI(u32 rd, u32 ra, s32 simm16) { func = ppu_interpreter::MULLI; }
|
||||
virtual void SUBFIC(u32 rd, u32 ra, s32 simm16) { func = ppu_interpreter::SUBFIC; }
|
||||
virtual void CMPLI(u32 bf, u32 l, u32 ra, u32 uimm16) { func = ppu_interpreter::CMPLI; }
|
||||
virtual void CMPI(u32 bf, u32 l, u32 ra, s32 simm16) { func = ppu_interpreter::CMPI; }
|
||||
virtual void ADDIC(u32 rd, u32 ra, s32 simm16) { func = ppu_interpreter::ADDIC; }
|
||||
virtual void ADDIC_(u32 rd, u32 ra, s32 simm16) { func = ppu_interpreter::ADDIC_; }
|
||||
virtual void ADDI(u32 rd, u32 ra, s32 simm16) { func = ppu_interpreter::ADDI; }
|
||||
virtual void ADDIS(u32 rd, u32 ra, s32 simm16) { func = ppu_interpreter::ADDIS; }
|
||||
virtual void BC(u32 bo, u32 bi, s32 bd, u32 aa, u32 lk) { func = ppu_interpreter::BC; }
|
||||
virtual void HACK(u32 index) { func = ppu_interpreter::HACK; }
|
||||
virtual void SC(u32 lev) { func = ppu_interpreter::SC; }
|
||||
virtual void B(s32 ll, u32 aa, u32 lk) { func = ppu_interpreter::B; }
|
||||
virtual void MCRF(u32 crfd, u32 crfs) { func = ppu_interpreter::MCRF; }
|
||||
virtual void BCLR(u32 bo, u32 bi, u32 bh, u32 lk) { func = ppu_interpreter::BCLR; }
|
||||
virtual void CRNOR(u32 bt, u32 ba, u32 bb) { func = ppu_interpreter::CRNOR; }
|
||||
virtual void CRANDC(u32 bt, u32 ba, u32 bb) { func = ppu_interpreter::CRANDC; }
|
||||
virtual void ISYNC() { func = ppu_interpreter::ISYNC; }
|
||||
virtual void CRXOR(u32 bt, u32 ba, u32 bb) { func = ppu_interpreter::CRXOR; }
|
||||
virtual void CRNAND(u32 bt, u32 ba, u32 bb) { func = ppu_interpreter::CRNAND; }
|
||||
virtual void CRAND(u32 bt, u32 ba, u32 bb) { func = ppu_interpreter::CRAND; }
|
||||
virtual void CREQV(u32 bt, u32 ba, u32 bb) { func = ppu_interpreter::CREQV; }
|
||||
virtual void CRORC(u32 bt, u32 ba, u32 bb) { func = ppu_interpreter::CRORC; }
|
||||
virtual void CROR(u32 bt, u32 ba, u32 bb) { func = ppu_interpreter::CROR; }
|
||||
virtual void BCCTR(u32 bo, u32 bi, u32 bh, u32 lk) { func = ppu_interpreter::BCCTR; }
|
||||
virtual void RLWIMI(u32 ra, u32 rs, u32 sh, u32 mb, u32 me, bool rc) { func = ppu_interpreter::RLWIMI; }
|
||||
virtual void RLWINM(u32 ra, u32 rs, u32 sh, u32 mb, u32 me, bool rc) { func = ppu_interpreter::RLWINM; }
|
||||
virtual void RLWNM(u32 ra, u32 rs, u32 rb, u32 MB, u32 ME, bool rc) { func = ppu_interpreter::RLWNM; }
|
||||
virtual void ORI(u32 rs, u32 ra, u32 uimm16) { func = ppu_interpreter::ORI; }
|
||||
virtual void ORIS(u32 rs, u32 ra, u32 uimm16) { func = ppu_interpreter::ORIS; }
|
||||
virtual void XORI(u32 ra, u32 rs, u32 uimm16) { func = ppu_interpreter::XORI; }
|
||||
virtual void XORIS(u32 ra, u32 rs, u32 uimm16) { func = ppu_interpreter::XORIS; }
|
||||
virtual void ANDI_(u32 ra, u32 rs, u32 uimm16) { func = ppu_interpreter::ANDI_; }
|
||||
virtual void ANDIS_(u32 ra, u32 rs, u32 uimm16) { func = ppu_interpreter::ANDIS_; }
|
||||
virtual void RLDICL(u32 ra, u32 rs, u32 sh, u32 mb, bool rc) { func = ppu_interpreter::RLDICL; }
|
||||
virtual void RLDICR(u32 ra, u32 rs, u32 sh, u32 me, bool rc) { func = ppu_interpreter::RLDICR; }
|
||||
virtual void RLDIC(u32 ra, u32 rs, u32 sh, u32 mb, bool rc) { func = ppu_interpreter::RLDIC; }
|
||||
virtual void RLDIMI(u32 ra, u32 rs, u32 sh, u32 mb, bool rc) { func = ppu_interpreter::RLDIMI; }
|
||||
virtual void RLDC_LR(u32 ra, u32 rs, u32 rb, u32 m_eb, bool is_r, bool rc) { func = ppu_interpreter::RLDC_LR; }
|
||||
virtual void CMP(u32 crfd, u32 l, u32 ra, u32 rb) { func = ppu_interpreter::CMP; }
|
||||
virtual void TW(u32 to, u32 ra, u32 rb) { func = ppu_interpreter::TW; }
|
||||
virtual void LVSL(u32 vd, u32 ra, u32 rb) { func = ppu_interpreter::LVSL; }
|
||||
virtual void LVEBX(u32 vd, u32 ra, u32 rb) { func = ppu_interpreter::LVEBX; }
|
||||
virtual void SUBFC(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) { func = ppu_interpreter::SUBFC; }
|
||||
virtual void MULHDU(u32 rd, u32 ra, u32 rb, bool rc) { func = ppu_interpreter::MULHDU; }
|
||||
virtual void ADDC(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) { func = ppu_interpreter::ADDC; }
|
||||
virtual void MULHWU(u32 rd, u32 ra, u32 rb, bool rc) { func = ppu_interpreter::MULHWU; }
|
||||
virtual void MFOCRF(u32 a, u32 rd, u32 crm) { func = ppu_interpreter::MFOCRF; }
|
||||
virtual void LWARX(u32 rd, u32 ra, u32 rb) { func = ppu_interpreter::LWARX; }
|
||||
virtual void LDX(u32 ra, u32 rs, u32 rb) { func = ppu_interpreter::LDX; }
|
||||
virtual void LWZX(u32 rd, u32 ra, u32 rb) { func = ppu_interpreter::LWZX; }
|
||||
virtual void SLW(u32 ra, u32 rs, u32 rb, bool rc) { func = ppu_interpreter::SLW; }
|
||||
virtual void CNTLZW(u32 ra, u32 rs, bool rc) { func = ppu_interpreter::CNTLZW; }
|
||||
virtual void SLD(u32 ra, u32 rs, u32 rb, bool rc) { func = ppu_interpreter::SLD; }
|
||||
virtual void AND(u32 ra, u32 rs, u32 rb, bool rc) { func = ppu_interpreter::AND; }
|
||||
virtual void CMPL(u32 bf, u32 l, u32 ra, u32 rb) { func = ppu_interpreter::CMPL; }
|
||||
virtual void LVSR(u32 vd, u32 ra, u32 rb) { func = ppu_interpreter::LVSR; }
|
||||
virtual void LVEHX(u32 vd, u32 ra, u32 rb) { func = ppu_interpreter::LVEHX; }
|
||||
virtual void SUBF(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) { func = ppu_interpreter::SUBF; }
|
||||
virtual void LDUX(u32 rd, u32 ra, u32 rb) { func = ppu_interpreter::LDUX; }
|
||||
virtual void DCBST(u32 ra, u32 rb) { func = ppu_interpreter::DCBST; }
|
||||
virtual void LWZUX(u32 rd, u32 ra, u32 rb) { func = ppu_interpreter::LWZUX; }
|
||||
virtual void CNTLZD(u32 ra, u32 rs, bool rc) { func = ppu_interpreter::CNTLZD; }
|
||||
virtual void ANDC(u32 ra, u32 rs, u32 rb, bool rc) { func = ppu_interpreter::ANDC; }
|
||||
virtual void TD(u32 to, u32 ra, u32 rb) { func = ppu_interpreter::TD; }
|
||||
virtual void LVEWX(u32 vd, u32 ra, u32 rb) { func = ppu_interpreter::LVEWX; }
|
||||
virtual void MULHD(u32 rd, u32 ra, u32 rb, bool rc) { func = ppu_interpreter::MULHD; }
|
||||
virtual void MULHW(u32 rd, u32 ra, u32 rb, bool rc) { func = ppu_interpreter::MULHW; }
|
||||
virtual void LDARX(u32 rd, u32 ra, u32 rb) { func = ppu_interpreter::LDARX; }
|
||||
virtual void DCBF(u32 ra, u32 rb) { func = ppu_interpreter::DCBF; }
|
||||
virtual void LBZX(u32 rd, u32 ra, u32 rb) { func = ppu_interpreter::LBZX; }
|
||||
virtual void LVX(u32 vd, u32 ra, u32 rb) { func = ppu_interpreter::LVX; }
|
||||
virtual void NEG(u32 rd, u32 ra, u32 oe, bool rc) { func = ppu_interpreter::NEG; }
|
||||
virtual void LBZUX(u32 rd, u32 ra, u32 rb) { func = ppu_interpreter::LBZUX; }
|
||||
virtual void NOR(u32 ra, u32 rs, u32 rb, bool rc) { func = ppu_interpreter::NOR; }
|
||||
virtual void STVEBX(u32 vs, u32 ra, u32 rb) { func = ppu_interpreter::STVEBX; }
|
||||
virtual void SUBFE(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) { func = ppu_interpreter::SUBFE; }
|
||||
virtual void ADDE(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) { func = ppu_interpreter::ADDE; }
|
||||
virtual void MTOCRF(u32 l, u32 crm, u32 rs) { func = ppu_interpreter::MTOCRF; }
|
||||
virtual void STDX(u32 rs, u32 ra, u32 rb) { func = ppu_interpreter::STDX; }
|
||||
virtual void STWCX_(u32 rs, u32 ra, u32 rb) { func = ppu_interpreter::STWCX_; }
|
||||
virtual void STWX(u32 rs, u32 ra, u32 rb) { func = ppu_interpreter::STWX; }
|
||||
virtual void STVEHX(u32 vs, u32 ra, u32 rb) { func = ppu_interpreter::STVEHX; }
|
||||
virtual void STDUX(u32 rs, u32 ra, u32 rb) { func = ppu_interpreter::STDUX; }
|
||||
virtual void STWUX(u32 rs, u32 ra, u32 rb) { func = ppu_interpreter::STWUX; }
|
||||
virtual void STVEWX(u32 vs, u32 ra, u32 rb) { func = ppu_interpreter::STVEWX; }
|
||||
virtual void SUBFZE(u32 rd, u32 ra, u32 oe, bool rc) { func = ppu_interpreter::SUBFZE; }
|
||||
virtual void ADDZE(u32 rd, u32 ra, u32 oe, bool rc) { func = ppu_interpreter::ADDZE; }
|
||||
virtual void STDCX_(u32 rs, u32 ra, u32 rb) { func = ppu_interpreter::STDCX_; }
|
||||
virtual void STBX(u32 rs, u32 ra, u32 rb) { func = ppu_interpreter::STBX; }
|
||||
virtual void STVX(u32 vs, u32 ra, u32 rb) { func = ppu_interpreter::STVX; }
|
||||
virtual void MULLD(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) { func = ppu_interpreter::MULLD; }
|
||||
virtual void SUBFME(u32 rd, u32 ra, u32 oe, bool rc) { func = ppu_interpreter::SUBFME; }
|
||||
virtual void ADDME(u32 rd, u32 ra, u32 oe, bool rc) { func = ppu_interpreter::ADDME; }
|
||||
virtual void MULLW(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) { func = ppu_interpreter::MULLW; }
|
||||
virtual void DCBTST(u32 ra, u32 rb, u32 th) { func = ppu_interpreter::DCBTST; }
|
||||
virtual void STBUX(u32 rs, u32 ra, u32 rb) { func = ppu_interpreter::STBUX; }
|
||||
virtual void ADD(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) { func = ppu_interpreter::ADD; }
|
||||
virtual void DCBT(u32 ra, u32 rb, u32 th) { func = ppu_interpreter::DCBT; }
|
||||
virtual void LHZX(u32 rd, u32 ra, u32 rb) { func = ppu_interpreter::LHZX; }
|
||||
virtual void EQV(u32 ra, u32 rs, u32 rb, bool rc) { func = ppu_interpreter::EQV; }
|
||||
virtual void ECIWX(u32 rd, u32 ra, u32 rb) { func = ppu_interpreter::ECIWX; }
|
||||
virtual void LHZUX(u32 rd, u32 ra, u32 rb) { func = ppu_interpreter::LHZUX; }
|
||||
virtual void XOR(u32 rs, u32 ra, u32 rb, bool rc) { func = ppu_interpreter::XOR; }
|
||||
virtual void MFSPR(u32 rd, u32 spr) { func = ppu_interpreter::MFSPR; }
|
||||
virtual void LWAX(u32 rd, u32 ra, u32 rb) { func = ppu_interpreter::LWAX; }
|
||||
virtual void DST(u32 ra, u32 rb, u32 strm, u32 t) { func = ppu_interpreter::DST; }
|
||||
virtual void LHAX(u32 rd, u32 ra, u32 rb) { func = ppu_interpreter::LHAX; }
|
||||
virtual void LVXL(u32 vd, u32 ra, u32 rb) { func = ppu_interpreter::LVXL; }
|
||||
virtual void MFTB(u32 rd, u32 spr) { func = ppu_interpreter::MFTB; }
|
||||
virtual void LWAUX(u32 rd, u32 ra, u32 rb) { func = ppu_interpreter::LWAUX; }
|
||||
virtual void DSTST(u32 ra, u32 rb, u32 strm, u32 t) { func = ppu_interpreter::DSTST; }
|
||||
virtual void LHAUX(u32 rd, u32 ra, u32 rb) { func = ppu_interpreter::LHAUX; }
|
||||
virtual void STHX(u32 rs, u32 ra, u32 rb) { func = ppu_interpreter::STHX; }
|
||||
virtual void ORC(u32 rs, u32 ra, u32 rb, bool rc) { func = ppu_interpreter::ORC; }
|
||||
virtual void ECOWX(u32 rs, u32 ra, u32 rb) { func = ppu_interpreter::ECOWX; }
|
||||
virtual void STHUX(u32 rs, u32 ra, u32 rb) { func = ppu_interpreter::STHUX; }
|
||||
virtual void OR(u32 ra, u32 rs, u32 rb, bool rc) { func = ppu_interpreter::OR; }
|
||||
virtual void DIVDU(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) { func = ppu_interpreter::DIVDU; }
|
||||
virtual void DIVWU(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) { func = ppu_interpreter::DIVWU; }
|
||||
virtual void MTSPR(u32 spr, u32 rs) { func = ppu_interpreter::MTSPR; }
|
||||
virtual void DCBI(u32 ra, u32 rb) { func = ppu_interpreter::DCBI; }
|
||||
virtual void NAND(u32 ra, u32 rs, u32 rb, bool rc) { func = ppu_interpreter::NAND; }
|
||||
virtual void STVXL(u32 vs, u32 ra, u32 rb) { func = ppu_interpreter::STVXL; }
|
||||
virtual void DIVD(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) { func = ppu_interpreter::DIVD; }
|
||||
virtual void DIVW(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) { func = ppu_interpreter::DIVW; }
|
||||
virtual void LVLX(u32 vd, u32 ra, u32 rb) { func = ppu_interpreter::LVLX; }
|
||||
virtual void LDBRX(u32 rd, u32 ra, u32 rb) { func = ppu_interpreter::LDBRX; }
|
||||
virtual void LSWX(u32 rd, u32 ra, u32 rb) { func = ppu_interpreter::LSWX; }
|
||||
virtual void LWBRX(u32 rd, u32 ra, u32 rb) { func = ppu_interpreter::LWBRX; }
|
||||
virtual void LFSX(u32 frd, u32 ra, u32 rb) { func = ppu_interpreter::LFSX; }
|
||||
virtual void SRW(u32 ra, u32 rs, u32 rb, bool rc) { func = ppu_interpreter::SRW; }
|
||||
virtual void SRD(u32 ra, u32 rs, u32 rb, bool rc) { func = ppu_interpreter::SRD; }
|
||||
virtual void LVRX(u32 vd, u32 ra, u32 rb) { func = ppu_interpreter::LVRX; }
|
||||
virtual void LSWI(u32 rd, u32 ra, u32 nb) { func = ppu_interpreter::LSWI; }
|
||||
virtual void LFSUX(u32 frd, u32 ra, u32 rb) { func = ppu_interpreter::LFSUX; }
|
||||
virtual void SYNC(u32 l) { func = ppu_interpreter::SYNC; }
|
||||
virtual void LFDX(u32 frd, u32 ra, u32 rb) { func = ppu_interpreter::LFDX; }
|
||||
virtual void LFDUX(u32 frd, u32 ra, u32 rb) { func = ppu_interpreter::LFDUX; }
|
||||
virtual void STVLX(u32 vs, u32 ra, u32 rb) { func = ppu_interpreter::STVLX; }
|
||||
virtual void STDBRX(u32 rs, u32 ra, u32 rb) { func = ppu_interpreter::STDBRX; }
|
||||
virtual void STSWX(u32 rs, u32 ra, u32 rb) { func = ppu_interpreter::STSWX; }
|
||||
virtual void STWBRX(u32 rs, u32 ra, u32 rb) { func = ppu_interpreter::STWBRX; }
|
||||
virtual void STFSX(u32 frs, u32 ra, u32 rb) { func = ppu_interpreter::STFSX; }
|
||||
virtual void STVRX(u32 vs, u32 ra, u32 rb) { func = ppu_interpreter::STVRX; }
|
||||
virtual void STFSUX(u32 frs, u32 ra, u32 rb) { func = ppu_interpreter::STFSUX; }
|
||||
virtual void STSWI(u32 rd, u32 ra, u32 nb) { func = ppu_interpreter::STSWI; }
|
||||
virtual void STFDX(u32 frs, u32 ra, u32 rb) { func = ppu_interpreter::STFDX; }
|
||||
virtual void STFDUX(u32 frs, u32 ra, u32 rb) { func = ppu_interpreter::STFDUX; }
|
||||
virtual void LVLXL(u32 vd, u32 ra, u32 rb) { func = ppu_interpreter::LVLXL; }
|
||||
virtual void LHBRX(u32 rd, u32 ra, u32 rb) { func = ppu_interpreter::LHBRX; }
|
||||
virtual void SRAW(u32 ra, u32 rs, u32 rb, bool rc) { func = ppu_interpreter::SRAW; }
|
||||
virtual void SRAD(u32 ra, u32 rs, u32 rb, bool rc) { func = ppu_interpreter::SRAD; }
|
||||
virtual void LVRXL(u32 vd, u32 ra, u32 rb) { func = ppu_interpreter::LVRXL; }
|
||||
virtual void DSS(u32 strm, u32 a) { func = ppu_interpreter::DSS; }
|
||||
virtual void SRAWI(u32 ra, u32 rs, u32 sh, bool rc) { func = ppu_interpreter::SRAWI; }
|
||||
virtual void SRADI1(u32 ra, u32 rs, u32 sh, bool rc) { func = ppu_interpreter::SRADI; }
|
||||
virtual void SRADI2(u32 ra, u32 rs, u32 sh, bool rc) { func = ppu_interpreter::SRADI; }
|
||||
virtual void EIEIO() { func = ppu_interpreter::EIEIO; }
|
||||
virtual void STVLXL(u32 vs, u32 ra, u32 rb) { func = ppu_interpreter::STVLXL; }
|
||||
virtual void STHBRX(u32 rs, u32 ra, u32 rb) { func = ppu_interpreter::STHBRX; }
|
||||
virtual void EXTSH(u32 ra, u32 rs, bool rc) { func = ppu_interpreter::EXTSH; }
|
||||
virtual void STVRXL(u32 sd, u32 ra, u32 rb) { func = ppu_interpreter::STVRXL; }
|
||||
virtual void EXTSB(u32 ra, u32 rs, bool rc) { func = ppu_interpreter::EXTSB; }
|
||||
virtual void STFIWX(u32 frs, u32 ra, u32 rb) { func = ppu_interpreter::STFIWX; }
|
||||
virtual void EXTSW(u32 ra, u32 rs, bool rc) { func = ppu_interpreter::EXTSW; }
|
||||
virtual void ICBI(u32 ra, u32 rb) { func = ppu_interpreter::ICBI; }
|
||||
virtual void DCBZ(u32 ra, u32 rb) { func = ppu_interpreter::DCBZ; }
|
||||
virtual void LWZ(u32 rd, u32 ra, s32 d) { func = ppu_interpreter::LWZ; }
|
||||
virtual void LWZU(u32 rd, u32 ra, s32 d) { func = ppu_interpreter::LWZU; }
|
||||
virtual void LBZ(u32 rd, u32 ra, s32 d) { func = ppu_interpreter::LBZ; }
|
||||
virtual void LBZU(u32 rd, u32 ra, s32 d) { func = ppu_interpreter::LBZU; }
|
||||
virtual void STW(u32 rs, u32 ra, s32 d) { func = ppu_interpreter::STW; }
|
||||
virtual void STWU(u32 rs, u32 ra, s32 d) { func = ppu_interpreter::STWU; }
|
||||
virtual void STB(u32 rs, u32 ra, s32 d) { func = ppu_interpreter::STB; }
|
||||
virtual void STBU(u32 rs, u32 ra, s32 d) { func = ppu_interpreter::STBU; }
|
||||
virtual void LHZ(u32 rd, u32 ra, s32 d) { func = ppu_interpreter::LHZ; }
|
||||
virtual void LHZU(u32 rd, u32 ra, s32 d) { func = ppu_interpreter::LHZU; }
|
||||
virtual void LHA(u32 rs, u32 ra, s32 d) { func = ppu_interpreter::LHA; }
|
||||
virtual void LHAU(u32 rs, u32 ra, s32 d) { func = ppu_interpreter::LHAU; }
|
||||
virtual void STH(u32 rs, u32 ra, s32 d) { func = ppu_interpreter::STH; }
|
||||
virtual void STHU(u32 rs, u32 ra, s32 d) { func = ppu_interpreter::STHU; }
|
||||
virtual void LMW(u32 rd, u32 ra, s32 d) { func = ppu_interpreter::LMW; }
|
||||
virtual void STMW(u32 rs, u32 ra, s32 d) { func = ppu_interpreter::STMW; }
|
||||
virtual void LFS(u32 frd, u32 ra, s32 d) { func = ppu_interpreter::LFS; }
|
||||
virtual void LFSU(u32 frd, u32 ra, s32 d) { func = ppu_interpreter::LFSU; }
|
||||
virtual void LFD(u32 frd, u32 ra, s32 d) { func = ppu_interpreter::LFD; }
|
||||
virtual void LFDU(u32 frd, u32 ra, s32 d) { func = ppu_interpreter::LFDU; }
|
||||
virtual void STFS(u32 frs, u32 ra, s32 d) { func = ppu_interpreter::STFS; }
|
||||
virtual void STFSU(u32 frs, u32 ra, s32 d) { func = ppu_interpreter::STFSU; }
|
||||
virtual void STFD(u32 frs, u32 ra, s32 d) { func = ppu_interpreter::STFD; }
|
||||
virtual void STFDU(u32 frs, u32 ra, s32 d) { func = ppu_interpreter::STFDU; }
|
||||
virtual void LD(u32 rd, u32 ra, s32 ds) { func = ppu_interpreter::LD; }
|
||||
virtual void LDU(u32 rd, u32 ra, s32 ds) { func = ppu_interpreter::LDU; }
|
||||
virtual void LWA(u32 rd, u32 ra, s32 ds) { func = ppu_interpreter::LWA; }
|
||||
virtual void FDIVS(u32 frd, u32 fra, u32 frb, bool rc) { func = ppu_interpreter::FDIVS; }
|
||||
virtual void FSUBS(u32 frd, u32 fra, u32 frb, bool rc) { func = ppu_interpreter::FSUBS; }
|
||||
virtual void FADDS(u32 frd, u32 fra, u32 frb, bool rc) { func = ppu_interpreter::FADDS; }
|
||||
virtual void FSQRTS(u32 frd, u32 frb, bool rc) { func = ppu_interpreter::FSQRTS; }
|
||||
virtual void FRES(u32 frd, u32 frb, bool rc) { func = ppu_interpreter::FRES; }
|
||||
virtual void FMULS(u32 frd, u32 fra, u32 frc, bool rc) { func = ppu_interpreter::FMULS; }
|
||||
virtual void FMADDS(u32 frd, u32 fra, u32 frc, u32 frb, bool rc) { func = ppu_interpreter::FMADDS; }
|
||||
virtual void FMSUBS(u32 frd, u32 fra, u32 frc, u32 frb, bool rc) { func = ppu_interpreter::FMSUBS; }
|
||||
virtual void FNMSUBS(u32 frd, u32 fra, u32 frc, u32 frb, bool rc) { func = ppu_interpreter::FNMSUBS; }
|
||||
virtual void FNMADDS(u32 frd, u32 fra, u32 frc, u32 frb, bool rc) { func = ppu_interpreter::FNMADDS; }
|
||||
virtual void STD(u32 rs, u32 ra, s32 ds) { func = ppu_interpreter::STD; }
|
||||
virtual void STDU(u32 rs, u32 ra, s32 ds) { func = ppu_interpreter::STDU; }
|
||||
virtual void MTFSB1(u32 bt, bool rc) { func = ppu_interpreter::MTFSB1; }
|
||||
virtual void MCRFS(u32 bf, u32 bfa) { func = ppu_interpreter::MCRFS; }
|
||||
virtual void MTFSB0(u32 bt, bool rc) { func = ppu_interpreter::MTFSB0; }
|
||||
virtual void MTFSFI(u32 crfd, u32 i, bool rc) { func = ppu_interpreter::MTFSFI; }
|
||||
virtual void MFFS(u32 frd, bool rc) { func = ppu_interpreter::MFFS; }
|
||||
virtual void MTFSF(u32 flm, u32 frb, bool rc) { func = ppu_interpreter::MTFSF; }
|
||||
|
||||
virtual void FCMPU(u32 bf, u32 fra, u32 frb) { func = ppu_interpreter::FCMPU; }
|
||||
virtual void FRSP(u32 frd, u32 frb, bool rc) { func = ppu_interpreter::FRSP; }
|
||||
virtual void FCTIW(u32 frd, u32 frb, bool rc) { func = ppu_interpreter::FCTIW; }
|
||||
virtual void FCTIWZ(u32 frd, u32 frb, bool rc) { func = ppu_interpreter::FCTIWZ; }
|
||||
virtual void FDIV(u32 frd, u32 fra, u32 frb, bool rc) { func = ppu_interpreter::FDIV; }
|
||||
virtual void FSUB(u32 frd, u32 fra, u32 frb, bool rc) { func = ppu_interpreter::FSUB; }
|
||||
virtual void FADD(u32 frd, u32 fra, u32 frb, bool rc) { func = ppu_interpreter::FADD; }
|
||||
virtual void FSQRT(u32 frd, u32 frb, bool rc) { func = ppu_interpreter::FSQRT; }
|
||||
virtual void FSEL(u32 frd, u32 fra, u32 frc, u32 frb, bool rc) { func = ppu_interpreter::FSEL; }
|
||||
virtual void FMUL(u32 frd, u32 fra, u32 frc, bool rc) { func = ppu_interpreter::FMUL; }
|
||||
virtual void FRSQRTE(u32 frd, u32 frb, bool rc) { func = ppu_interpreter::FRSQRTE; }
|
||||
virtual void FMSUB(u32 frd, u32 fra, u32 frc, u32 frb, bool rc) { func = ppu_interpreter::FMSUB; }
|
||||
virtual void FMADD(u32 frd, u32 fra, u32 frc, u32 frb, bool rc) { func = ppu_interpreter::FMADD; }
|
||||
virtual void FNMSUB(u32 frd, u32 fra, u32 frc, u32 frb, bool rc) { func = ppu_interpreter::FNMSUB; }
|
||||
virtual void FNMADD(u32 frd, u32 fra, u32 frc, u32 frb, bool rc) { func = ppu_interpreter::FNMADD; }
|
||||
virtual void FCMPO(u32 crfd, u32 fra, u32 frb) { func = ppu_interpreter::FCMPO; }
|
||||
virtual void FNEG(u32 frd, u32 frb, bool rc) { func = ppu_interpreter::FNEG; }
|
||||
virtual void FMR(u32 frd, u32 frb, bool rc) { func = ppu_interpreter::FMR; }
|
||||
virtual void FNABS(u32 frd, u32 frb, bool rc) { func = ppu_interpreter::FNABS; }
|
||||
virtual void FABS(u32 frd, u32 frb, bool rc) { func = ppu_interpreter::FABS; }
|
||||
virtual void FCTID(u32 frd, u32 frb, bool rc) { func = ppu_interpreter::FCTID; }
|
||||
virtual void FCTIDZ(u32 frd, u32 frb, bool rc) { func = ppu_interpreter::FCTIDZ; }
|
||||
virtual void FCFID(u32 frd, u32 frb, bool rc) { func = ppu_interpreter::FCFID; }
|
||||
|
||||
virtual void UNK(const u32 code, const u32 opcode, const u32 gcode) { func = ppu_interpreter::UNK; }
|
||||
};
|
||||
|
|
@ -8,15 +8,487 @@
|
|||
#include "Emu/SysCalls/Modules.h"
|
||||
#include "Emu/Cell/PPUDecoder.h"
|
||||
#include "Emu/Cell/PPUInterpreter.h"
|
||||
#include "Emu/Cell/PPUInterpreter2.h"
|
||||
#include "Emu/Cell/PPULLVMRecompiler.h"
|
||||
//#include "Emu/Cell/PPURecompiler.h"
|
||||
#include "Emu/CPU/CPUThreadManager.h"
|
||||
|
||||
#ifdef _WIN32
|
||||
#include <Windows.h>
|
||||
#else
|
||||
#include <sys/mman.h>
|
||||
#include <sys/stat.h>
|
||||
#endif
|
||||
|
||||
u64 rotate_mask[64][64];
|
||||
|
||||
const ppu_inter_func_t g_ppu_inter_func_list[] =
|
||||
{
|
||||
ppu_interpreter::NULL_OP,
|
||||
ppu_interpreter::NOP,
|
||||
|
||||
ppu_interpreter::TDI,
|
||||
ppu_interpreter::TWI,
|
||||
|
||||
ppu_interpreter::MFVSCR,
|
||||
ppu_interpreter::MTVSCR,
|
||||
ppu_interpreter::VADDCUW,
|
||||
ppu_interpreter::VADDFP,
|
||||
ppu_interpreter::VADDSBS,
|
||||
ppu_interpreter::VADDSHS,
|
||||
ppu_interpreter::VADDSWS,
|
||||
ppu_interpreter::VADDUBM,
|
||||
ppu_interpreter::VADDUBS,
|
||||
ppu_interpreter::VADDUHM,
|
||||
ppu_interpreter::VADDUHS,
|
||||
ppu_interpreter::VADDUWM,
|
||||
ppu_interpreter::VADDUWS,
|
||||
ppu_interpreter::VAND,
|
||||
ppu_interpreter::VANDC,
|
||||
ppu_interpreter::VAVGSB,
|
||||
ppu_interpreter::VAVGSH,
|
||||
ppu_interpreter::VAVGSW,
|
||||
ppu_interpreter::VAVGUB,
|
||||
ppu_interpreter::VAVGUH,
|
||||
ppu_interpreter::VAVGUW,
|
||||
ppu_interpreter::VCFSX,
|
||||
ppu_interpreter::VCFUX,
|
||||
ppu_interpreter::VCMPBFP,
|
||||
ppu_interpreter::VCMPBFP_,
|
||||
ppu_interpreter::VCMPEQFP,
|
||||
ppu_interpreter::VCMPEQFP_,
|
||||
ppu_interpreter::VCMPEQUB,
|
||||
ppu_interpreter::VCMPEQUB_,
|
||||
ppu_interpreter::VCMPEQUH,
|
||||
ppu_interpreter::VCMPEQUH_,
|
||||
ppu_interpreter::VCMPEQUW,
|
||||
ppu_interpreter::VCMPEQUW_,
|
||||
ppu_interpreter::VCMPGEFP,
|
||||
ppu_interpreter::VCMPGEFP_,
|
||||
ppu_interpreter::VCMPGTFP,
|
||||
ppu_interpreter::VCMPGTFP_,
|
||||
ppu_interpreter::VCMPGTSB,
|
||||
ppu_interpreter::VCMPGTSB_,
|
||||
ppu_interpreter::VCMPGTSH,
|
||||
ppu_interpreter::VCMPGTSH_,
|
||||
ppu_interpreter::VCMPGTSW,
|
||||
ppu_interpreter::VCMPGTSW_,
|
||||
ppu_interpreter::VCMPGTUB,
|
||||
ppu_interpreter::VCMPGTUB_,
|
||||
ppu_interpreter::VCMPGTUH,
|
||||
ppu_interpreter::VCMPGTUH_,
|
||||
ppu_interpreter::VCMPGTUW,
|
||||
ppu_interpreter::VCMPGTUW_,
|
||||
ppu_interpreter::VCTSXS,
|
||||
ppu_interpreter::VCTUXS,
|
||||
ppu_interpreter::VEXPTEFP,
|
||||
ppu_interpreter::VLOGEFP,
|
||||
ppu_interpreter::VMADDFP,
|
||||
ppu_interpreter::VMAXFP,
|
||||
ppu_interpreter::VMAXSB,
|
||||
ppu_interpreter::VMAXSH,
|
||||
ppu_interpreter::VMAXSW,
|
||||
ppu_interpreter::VMAXUB,
|
||||
ppu_interpreter::VMAXUH,
|
||||
ppu_interpreter::VMAXUW,
|
||||
ppu_interpreter::VMHADDSHS,
|
||||
ppu_interpreter::VMHRADDSHS,
|
||||
ppu_interpreter::VMINFP,
|
||||
ppu_interpreter::VMINSB,
|
||||
ppu_interpreter::VMINSH,
|
||||
ppu_interpreter::VMINSW,
|
||||
ppu_interpreter::VMINUB,
|
||||
ppu_interpreter::VMINUH,
|
||||
ppu_interpreter::VMINUW,
|
||||
ppu_interpreter::VMLADDUHM,
|
||||
ppu_interpreter::VMRGHB,
|
||||
ppu_interpreter::VMRGHH,
|
||||
ppu_interpreter::VMRGHW,
|
||||
ppu_interpreter::VMRGLB,
|
||||
ppu_interpreter::VMRGLH,
|
||||
ppu_interpreter::VMRGLW,
|
||||
ppu_interpreter::VMSUMMBM,
|
||||
ppu_interpreter::VMSUMSHM,
|
||||
ppu_interpreter::VMSUMSHS,
|
||||
ppu_interpreter::VMSUMUBM,
|
||||
ppu_interpreter::VMSUMUHM,
|
||||
ppu_interpreter::VMSUMUHS,
|
||||
ppu_interpreter::VMULESB,
|
||||
ppu_interpreter::VMULESH,
|
||||
ppu_interpreter::VMULEUB,
|
||||
ppu_interpreter::VMULEUH,
|
||||
ppu_interpreter::VMULOSB,
|
||||
ppu_interpreter::VMULOSH,
|
||||
ppu_interpreter::VMULOUB,
|
||||
ppu_interpreter::VMULOUH,
|
||||
ppu_interpreter::VNMSUBFP,
|
||||
ppu_interpreter::VNOR,
|
||||
ppu_interpreter::VOR,
|
||||
ppu_interpreter::VPERM,
|
||||
ppu_interpreter::VPKPX,
|
||||
ppu_interpreter::VPKSHSS,
|
||||
ppu_interpreter::VPKSHUS,
|
||||
ppu_interpreter::VPKSWSS,
|
||||
ppu_interpreter::VPKSWUS,
|
||||
ppu_interpreter::VPKUHUM,
|
||||
ppu_interpreter::VPKUHUS,
|
||||
ppu_interpreter::VPKUWUM,
|
||||
ppu_interpreter::VPKUWUS,
|
||||
ppu_interpreter::VREFP,
|
||||
ppu_interpreter::VRFIM,
|
||||
ppu_interpreter::VRFIN,
|
||||
ppu_interpreter::VRFIP,
|
||||
ppu_interpreter::VRFIZ,
|
||||
ppu_interpreter::VRLB,
|
||||
ppu_interpreter::VRLH,
|
||||
ppu_interpreter::VRLW,
|
||||
ppu_interpreter::VRSQRTEFP,
|
||||
ppu_interpreter::VSEL,
|
||||
ppu_interpreter::VSL,
|
||||
ppu_interpreter::VSLB,
|
||||
ppu_interpreter::VSLDOI,
|
||||
ppu_interpreter::VSLH,
|
||||
ppu_interpreter::VSLO,
|
||||
ppu_interpreter::VSLW,
|
||||
ppu_interpreter::VSPLTB,
|
||||
ppu_interpreter::VSPLTH,
|
||||
ppu_interpreter::VSPLTISB,
|
||||
ppu_interpreter::VSPLTISH,
|
||||
ppu_interpreter::VSPLTISW,
|
||||
ppu_interpreter::VSPLTW,
|
||||
ppu_interpreter::VSR,
|
||||
ppu_interpreter::VSRAB,
|
||||
ppu_interpreter::VSRAH,
|
||||
ppu_interpreter::VSRAW,
|
||||
ppu_interpreter::VSRB,
|
||||
ppu_interpreter::VSRH,
|
||||
ppu_interpreter::VSRO,
|
||||
ppu_interpreter::VSRW,
|
||||
ppu_interpreter::VSUBCUW,
|
||||
ppu_interpreter::VSUBFP,
|
||||
ppu_interpreter::VSUBSBS,
|
||||
ppu_interpreter::VSUBSHS,
|
||||
ppu_interpreter::VSUBSWS,
|
||||
ppu_interpreter::VSUBUBM,
|
||||
ppu_interpreter::VSUBUBS,
|
||||
ppu_interpreter::VSUBUHM,
|
||||
ppu_interpreter::VSUBUHS,
|
||||
ppu_interpreter::VSUBUWM,
|
||||
ppu_interpreter::VSUBUWS,
|
||||
ppu_interpreter::VSUMSWS,
|
||||
ppu_interpreter::VSUM2SWS,
|
||||
ppu_interpreter::VSUM4SBS,
|
||||
ppu_interpreter::VSUM4SHS,
|
||||
ppu_interpreter::VSUM4UBS,
|
||||
ppu_interpreter::VUPKHPX,
|
||||
ppu_interpreter::VUPKHSB,
|
||||
ppu_interpreter::VUPKHSH,
|
||||
ppu_interpreter::VUPKLPX,
|
||||
ppu_interpreter::VUPKLSB,
|
||||
ppu_interpreter::VUPKLSH,
|
||||
ppu_interpreter::VXOR,
|
||||
ppu_interpreter::MULLI,
|
||||
ppu_interpreter::SUBFIC,
|
||||
ppu_interpreter::CMPLI,
|
||||
ppu_interpreter::CMPI,
|
||||
ppu_interpreter::ADDIC,
|
||||
ppu_interpreter::ADDIC_,
|
||||
ppu_interpreter::ADDI,
|
||||
ppu_interpreter::ADDIS,
|
||||
ppu_interpreter::BC,
|
||||
ppu_interpreter::HACK,
|
||||
ppu_interpreter::SC,
|
||||
ppu_interpreter::B,
|
||||
ppu_interpreter::MCRF,
|
||||
ppu_interpreter::BCLR,
|
||||
ppu_interpreter::CRNOR,
|
||||
ppu_interpreter::CRANDC,
|
||||
ppu_interpreter::ISYNC,
|
||||
ppu_interpreter::CRXOR,
|
||||
ppu_interpreter::CRNAND,
|
||||
ppu_interpreter::CRAND,
|
||||
ppu_interpreter::CREQV,
|
||||
ppu_interpreter::CRORC,
|
||||
ppu_interpreter::CROR,
|
||||
ppu_interpreter::BCCTR,
|
||||
ppu_interpreter::RLWIMI,
|
||||
ppu_interpreter::RLWINM,
|
||||
ppu_interpreter::RLWNM,
|
||||
ppu_interpreter::ORI,
|
||||
ppu_interpreter::ORIS,
|
||||
ppu_interpreter::XORI,
|
||||
ppu_interpreter::XORIS,
|
||||
ppu_interpreter::ANDI_,
|
||||
ppu_interpreter::ANDIS_,
|
||||
ppu_interpreter::RLDICL,
|
||||
ppu_interpreter::RLDICR,
|
||||
ppu_interpreter::RLDIC,
|
||||
ppu_interpreter::RLDIMI,
|
||||
ppu_interpreter::RLDC_LR,
|
||||
ppu_interpreter::CMP,
|
||||
ppu_interpreter::TW,
|
||||
ppu_interpreter::LVSL,
|
||||
ppu_interpreter::LVEBX,
|
||||
ppu_interpreter::SUBFC,
|
||||
ppu_interpreter::MULHDU,
|
||||
ppu_interpreter::ADDC,
|
||||
ppu_interpreter::MULHWU,
|
||||
ppu_interpreter::MFOCRF,
|
||||
ppu_interpreter::LWARX,
|
||||
ppu_interpreter::LDX,
|
||||
ppu_interpreter::LWZX,
|
||||
ppu_interpreter::SLW,
|
||||
ppu_interpreter::CNTLZW,
|
||||
ppu_interpreter::SLD,
|
||||
ppu_interpreter::AND,
|
||||
ppu_interpreter::CMPL,
|
||||
ppu_interpreter::LVSR,
|
||||
ppu_interpreter::LVEHX,
|
||||
ppu_interpreter::SUBF,
|
||||
ppu_interpreter::LDUX,
|
||||
ppu_interpreter::DCBST,
|
||||
ppu_interpreter::LWZUX,
|
||||
ppu_interpreter::CNTLZD,
|
||||
ppu_interpreter::ANDC,
|
||||
ppu_interpreter::TD,
|
||||
ppu_interpreter::LVEWX,
|
||||
ppu_interpreter::MULHD,
|
||||
ppu_interpreter::MULHW,
|
||||
ppu_interpreter::LDARX,
|
||||
ppu_interpreter::DCBF,
|
||||
ppu_interpreter::LBZX,
|
||||
ppu_interpreter::LVX,
|
||||
ppu_interpreter::NEG,
|
||||
ppu_interpreter::LBZUX,
|
||||
ppu_interpreter::NOR,
|
||||
ppu_interpreter::STVEBX,
|
||||
ppu_interpreter::SUBFE,
|
||||
ppu_interpreter::ADDE,
|
||||
ppu_interpreter::MTOCRF,
|
||||
ppu_interpreter::STDX,
|
||||
ppu_interpreter::STWCX_,
|
||||
ppu_interpreter::STWX,
|
||||
ppu_interpreter::STVEHX,
|
||||
ppu_interpreter::STDUX,
|
||||
ppu_interpreter::STWUX,
|
||||
ppu_interpreter::STVEWX,
|
||||
ppu_interpreter::SUBFZE,
|
||||
ppu_interpreter::ADDZE,
|
||||
ppu_interpreter::STDCX_,
|
||||
ppu_interpreter::STBX,
|
||||
ppu_interpreter::STVX,
|
||||
ppu_interpreter::MULLD,
|
||||
ppu_interpreter::SUBFME,
|
||||
ppu_interpreter::ADDME,
|
||||
ppu_interpreter::MULLW,
|
||||
ppu_interpreter::DCBTST,
|
||||
ppu_interpreter::STBUX,
|
||||
ppu_interpreter::ADD,
|
||||
ppu_interpreter::DCBT,
|
||||
ppu_interpreter::LHZX,
|
||||
ppu_interpreter::EQV,
|
||||
ppu_interpreter::ECIWX,
|
||||
ppu_interpreter::LHZUX,
|
||||
ppu_interpreter::XOR,
|
||||
ppu_interpreter::MFSPR,
|
||||
ppu_interpreter::LWAX,
|
||||
ppu_interpreter::DST,
|
||||
ppu_interpreter::LHAX,
|
||||
ppu_interpreter::LVXL,
|
||||
ppu_interpreter::MFTB,
|
||||
ppu_interpreter::LWAUX,
|
||||
ppu_interpreter::DSTST,
|
||||
ppu_interpreter::LHAUX,
|
||||
ppu_interpreter::STHX,
|
||||
ppu_interpreter::ORC,
|
||||
ppu_interpreter::ECOWX,
|
||||
ppu_interpreter::STHUX,
|
||||
ppu_interpreter::OR,
|
||||
ppu_interpreter::DIVDU,
|
||||
ppu_interpreter::DIVWU,
|
||||
ppu_interpreter::MTSPR,
|
||||
ppu_interpreter::DCBI,
|
||||
ppu_interpreter::NAND,
|
||||
ppu_interpreter::STVXL,
|
||||
ppu_interpreter::DIVD,
|
||||
ppu_interpreter::DIVW,
|
||||
ppu_interpreter::LVLX,
|
||||
ppu_interpreter::LDBRX,
|
||||
ppu_interpreter::LSWX,
|
||||
ppu_interpreter::LWBRX,
|
||||
ppu_interpreter::LFSX,
|
||||
ppu_interpreter::SRW,
|
||||
ppu_interpreter::SRD,
|
||||
ppu_interpreter::LVRX,
|
||||
ppu_interpreter::LSWI,
|
||||
ppu_interpreter::LFSUX,
|
||||
ppu_interpreter::SYNC,
|
||||
ppu_interpreter::LFDX,
|
||||
ppu_interpreter::LFDUX,
|
||||
ppu_interpreter::STVLX,
|
||||
ppu_interpreter::STDBRX,
|
||||
ppu_interpreter::STSWX,
|
||||
ppu_interpreter::STWBRX,
|
||||
ppu_interpreter::STFSX,
|
||||
ppu_interpreter::STVRX,
|
||||
ppu_interpreter::STFSUX,
|
||||
ppu_interpreter::STSWI,
|
||||
ppu_interpreter::STFDX,
|
||||
ppu_interpreter::STFDUX,
|
||||
ppu_interpreter::LVLXL,
|
||||
ppu_interpreter::LHBRX,
|
||||
ppu_interpreter::SRAW,
|
||||
ppu_interpreter::SRAD,
|
||||
ppu_interpreter::LVRXL,
|
||||
ppu_interpreter::DSS,
|
||||
ppu_interpreter::SRAWI,
|
||||
ppu_interpreter::SRADI,
|
||||
ppu_interpreter::EIEIO,
|
||||
ppu_interpreter::STVLXL,
|
||||
ppu_interpreter::STHBRX,
|
||||
ppu_interpreter::EXTSH,
|
||||
ppu_interpreter::STVRXL,
|
||||
ppu_interpreter::EXTSB,
|
||||
ppu_interpreter::STFIWX,
|
||||
ppu_interpreter::EXTSW,
|
||||
ppu_interpreter::ICBI,
|
||||
ppu_interpreter::DCBZ,
|
||||
ppu_interpreter::LWZ,
|
||||
ppu_interpreter::LWZU,
|
||||
ppu_interpreter::LBZ,
|
||||
ppu_interpreter::LBZU,
|
||||
ppu_interpreter::STW,
|
||||
ppu_interpreter::STWU,
|
||||
ppu_interpreter::STB,
|
||||
ppu_interpreter::STBU,
|
||||
ppu_interpreter::LHZ,
|
||||
ppu_interpreter::LHZU,
|
||||
ppu_interpreter::LHA,
|
||||
ppu_interpreter::LHAU,
|
||||
ppu_interpreter::STH,
|
||||
ppu_interpreter::STHU,
|
||||
ppu_interpreter::LMW,
|
||||
ppu_interpreter::STMW,
|
||||
ppu_interpreter::LFS,
|
||||
ppu_interpreter::LFSU,
|
||||
ppu_interpreter::LFD,
|
||||
ppu_interpreter::LFDU,
|
||||
ppu_interpreter::STFS,
|
||||
ppu_interpreter::STFSU,
|
||||
ppu_interpreter::STFD,
|
||||
ppu_interpreter::STFDU,
|
||||
ppu_interpreter::LD,
|
||||
ppu_interpreter::LDU,
|
||||
ppu_interpreter::LWA,
|
||||
ppu_interpreter::FDIVS,
|
||||
ppu_interpreter::FSUBS,
|
||||
ppu_interpreter::FADDS,
|
||||
ppu_interpreter::FSQRTS,
|
||||
ppu_interpreter::FRES,
|
||||
ppu_interpreter::FMULS,
|
||||
ppu_interpreter::FMADDS,
|
||||
ppu_interpreter::FMSUBS,
|
||||
ppu_interpreter::FNMSUBS,
|
||||
ppu_interpreter::FNMADDS,
|
||||
ppu_interpreter::STD,
|
||||
ppu_interpreter::STDU,
|
||||
ppu_interpreter::MTFSB1,
|
||||
ppu_interpreter::MCRFS,
|
||||
ppu_interpreter::MTFSB0,
|
||||
ppu_interpreter::MTFSFI,
|
||||
ppu_interpreter::MFFS,
|
||||
ppu_interpreter::MTFSF,
|
||||
|
||||
ppu_interpreter::FCMPU,
|
||||
ppu_interpreter::FRSP,
|
||||
ppu_interpreter::FCTIW,
|
||||
ppu_interpreter::FCTIWZ,
|
||||
ppu_interpreter::FDIV,
|
||||
ppu_interpreter::FSUB,
|
||||
ppu_interpreter::FADD,
|
||||
ppu_interpreter::FSQRT,
|
||||
ppu_interpreter::FSEL,
|
||||
ppu_interpreter::FMUL,
|
||||
ppu_interpreter::FRSQRTE,
|
||||
ppu_interpreter::FMSUB,
|
||||
ppu_interpreter::FMADD,
|
||||
ppu_interpreter::FNMSUB,
|
||||
ppu_interpreter::FNMADD,
|
||||
ppu_interpreter::FCMPO,
|
||||
ppu_interpreter::FNEG,
|
||||
ppu_interpreter::FMR,
|
||||
ppu_interpreter::FNABS,
|
||||
ppu_interpreter::FABS,
|
||||
ppu_interpreter::FCTID,
|
||||
ppu_interpreter::FCTIDZ,
|
||||
ppu_interpreter::FCFID,
|
||||
|
||||
ppu_interpreter::UNK,
|
||||
};
|
||||
|
||||
extern u32 ppu_get_tls(u32 thread);
|
||||
extern void ppu_free_tls(u32 thread);
|
||||
|
||||
void* g_ppu_exec_map = nullptr;
|
||||
|
||||
void finalize_ppu_exec_map()
|
||||
{
|
||||
if (g_ppu_exec_map)
|
||||
{
|
||||
#ifdef _WIN32
|
||||
VirtualFree(g_ppu_exec_map, 0, MEM_RELEASE);
|
||||
#else
|
||||
munmap(g_ppu_exec_map, 0x100000000);
|
||||
#endif
|
||||
g_ppu_exec_map = nullptr;
|
||||
}
|
||||
}
|
||||
|
||||
void initialize_ppu_exec_map()
|
||||
{
|
||||
finalize_ppu_exec_map();
|
||||
|
||||
#ifdef _WIN32
|
||||
g_ppu_exec_map = VirtualAlloc(NULL, 0x100000000, MEM_RESERVE, PAGE_NOACCESS);
|
||||
#else
|
||||
g_ppu_exec_map = mmap(nullptr, 0x100000000, PROT_NONE, MAP_ANON | MAP_PRIVATE, -1, 0);
|
||||
#endif
|
||||
}
|
||||
|
||||
void fill_ppu_exec_map(u32 addr, u32 size)
|
||||
{
|
||||
#ifdef _WIN32
|
||||
VirtualAlloc((u8*)g_ppu_exec_map + addr, size, MEM_COMMIT, PAGE_READWRITE);
|
||||
#else
|
||||
mprotect((u8*)g_ppu_exec_map + addr, size, PROT_READ | PROT_WRITE);
|
||||
#endif
|
||||
|
||||
PPUInterpreter2* inter;
|
||||
PPUDecoder dec(inter = new PPUInterpreter2);
|
||||
|
||||
for (u32 pos = addr; pos < addr + size; pos += 4)
|
||||
{
|
||||
inter->func = ppu_interpreter::NULL_OP;
|
||||
|
||||
// decode PPU opcode
|
||||
dec.Decode(vm::read32(pos));
|
||||
|
||||
u32 index = 0;
|
||||
|
||||
// find function index
|
||||
for (; index < sizeof(g_ppu_inter_func_list) / sizeof(ppu_inter_func_t); index++)
|
||||
{
|
||||
if (inter->func == g_ppu_inter_func_list[index])
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
// write index in memory
|
||||
*(u32*)((u8*)g_ppu_exec_map + pos) = index;
|
||||
}
|
||||
}
|
||||
|
||||
PPUThread& GetCurrentPPUThread()
|
||||
{
|
||||
CPUThread* thread = GetCurrentCPUThread();
|
||||
|
|
@ -29,6 +501,7 @@ PPUThread& GetCurrentPPUThread()
|
|||
PPUThread::PPUThread() : CPUThread(CPU_THREAD_PPU)
|
||||
{
|
||||
Reset();
|
||||
InitRotateMask();
|
||||
}
|
||||
|
||||
PPUThread::~PPUThread()
|
||||
|
|
@ -94,18 +567,21 @@ void PPUThread::CloseStack()
|
|||
|
||||
void PPUThread::DoRun()
|
||||
{
|
||||
switch(Ini.CPUDecoderMode.GetValue())
|
||||
{
|
||||
case 0:
|
||||
//m_dec = new PPUDecoder(*new PPUDisAsm());
|
||||
break;
|
||||
m_dec = nullptr;
|
||||
|
||||
case 1:
|
||||
switch (auto mode = Ini.CPUDecoderMode.GetValue())
|
||||
{
|
||||
case 0: // original interpreter
|
||||
{
|
||||
auto ppui = new PPUInterpreter(*this);
|
||||
m_dec = new PPUDecoder(ppui);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
case 1: // alternative interpreter
|
||||
{
|
||||
break;
|
||||
}
|
||||
|
||||
case 2:
|
||||
#ifdef PPU_LLVM_RECOMPILER
|
||||
|
|
@ -122,9 +598,11 @@ void PPUThread::DoRun()
|
|||
//case 3: m_dec = new PPURecompiler(*this); break;
|
||||
|
||||
default:
|
||||
LOG_ERROR(PPU, "Invalid CPU decoder mode: %d", Ini.CPUDecoderMode.GetValue());
|
||||
{
|
||||
LOG_ERROR(PPU, "Invalid CPU decoder mode: %d", mode);
|
||||
Emu.Pause();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void PPUThread::DoResume()
|
||||
|
|
@ -189,14 +667,16 @@ void PPUThread::FastCall2(u32 addr, u32 rtoc)
|
|||
auto old_rtoc = GPR[2];
|
||||
auto old_LR = LR;
|
||||
auto old_thread = GetCurrentNamedThread();
|
||||
auto old_task = decltype(custom_task)();
|
||||
|
||||
m_status = Running;
|
||||
PC = addr;
|
||||
GPR[2] = rtoc;
|
||||
LR = Emu.GetCPUThreadStop();
|
||||
SetCurrentNamedThread(this);
|
||||
custom_task.swap(old_task);
|
||||
|
||||
CPUThread::Task();
|
||||
Task();
|
||||
|
||||
m_status = old_status;
|
||||
PC = old_PC;
|
||||
|
|
@ -204,22 +684,58 @@ void PPUThread::FastCall2(u32 addr, u32 rtoc)
|
|||
GPR[2] = old_rtoc;
|
||||
LR = old_LR;
|
||||
SetCurrentNamedThread(old_thread);
|
||||
custom_task.swap(old_task);
|
||||
}
|
||||
|
||||
void PPUThread::FastStop()
|
||||
{
|
||||
m_status = Stopped;
|
||||
m_events |= CPU_EVENT_STOP;
|
||||
}
|
||||
|
||||
void PPUThread::Task()
|
||||
{
|
||||
SetHostRoundingMode(FPSCR_RN_NEAR);
|
||||
|
||||
if (custom_task)
|
||||
{
|
||||
custom_task(*this);
|
||||
return custom_task(*this);
|
||||
}
|
||||
else
|
||||
|
||||
if (m_dec)
|
||||
{
|
||||
CPUThread::Task();
|
||||
return CPUThread::Task();
|
||||
}
|
||||
|
||||
while (true)
|
||||
{
|
||||
// get interpreter function
|
||||
const auto func = g_ppu_inter_func_list[*(u32*)((u8*)g_ppu_exec_map + PC)];
|
||||
|
||||
if (m_events)
|
||||
{
|
||||
// process events
|
||||
if (Emu.IsStopped())
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
if (m_events & CPU_EVENT_STOP && (IsStopped() || IsPaused()))
|
||||
{
|
||||
m_events &= ~CPU_EVENT_STOP;
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
// read opcode
|
||||
const ppu_opcode_t opcode = { vm::read32(PC) };
|
||||
|
||||
// call interpreter function
|
||||
func(*this, opcode);
|
||||
|
||||
// next instruction
|
||||
//PC += 4;
|
||||
NextPc(4);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -315,11 +315,9 @@ private:
|
|||
}
|
||||
void BIZ(u32 intr, u32 rt, u32 ra)
|
||||
{
|
||||
switch (intr)
|
||||
switch (intr & 0x30)
|
||||
{
|
||||
case 0: break;
|
||||
case 0x10: break; // enable interrupts
|
||||
case 0x20: break; // disable interrupts
|
||||
default: UNIMPLEMENTED(); return;
|
||||
}
|
||||
|
||||
|
|
@ -336,11 +334,9 @@ private:
|
|||
}
|
||||
void BINZ(u32 intr, u32 rt, u32 ra)
|
||||
{
|
||||
switch (intr)
|
||||
switch (intr & 0x30)
|
||||
{
|
||||
case 0: break;
|
||||
case 0x10: break; // enable interrupts
|
||||
case 0x20: break; // disable interrupts
|
||||
default: UNIMPLEMENTED(); return;
|
||||
}
|
||||
|
||||
|
|
@ -357,11 +353,9 @@ private:
|
|||
}
|
||||
void BIHZ(u32 intr, u32 rt, u32 ra)
|
||||
{
|
||||
switch (intr)
|
||||
switch (intr & 0x30)
|
||||
{
|
||||
case 0: break;
|
||||
case 0x10: break; // enable interrupts
|
||||
case 0x20: break; // disable interrupts
|
||||
default: UNIMPLEMENTED(); return;
|
||||
}
|
||||
|
||||
|
|
@ -378,11 +372,9 @@ private:
|
|||
}
|
||||
void BIHNZ(u32 intr, u32 rt, u32 ra)
|
||||
{
|
||||
switch (intr)
|
||||
switch (intr & 0x30)
|
||||
{
|
||||
case 0: break;
|
||||
case 0x10: break; // enable interrupts
|
||||
case 0x20: break; // disable interrupts
|
||||
default: UNIMPLEMENTED(); return;
|
||||
}
|
||||
|
||||
|
|
@ -409,11 +401,9 @@ private:
|
|||
}
|
||||
void BI(u32 intr, u32 ra)
|
||||
{
|
||||
switch (intr)
|
||||
switch (intr & 0x30)
|
||||
{
|
||||
case 0: break;
|
||||
case 0x10: break; // enable interrupts
|
||||
case 0x20: break; // disable interrupts
|
||||
default: UNIMPLEMENTED(); return;
|
||||
}
|
||||
|
||||
|
|
@ -423,11 +413,9 @@ private:
|
|||
}
|
||||
void BISL(u32 intr, u32 rt, u32 ra)
|
||||
{
|
||||
switch (intr)
|
||||
switch (intr & 0x30)
|
||||
{
|
||||
case 0: break;
|
||||
case 0x10: break; // enable interrupts
|
||||
case 0x20: break; // disable interrupts
|
||||
default: UNIMPLEMENTED(); return;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,512 @@
|
|||
#pragma once
|
||||
|
||||
class SPUThread;
|
||||
|
||||
union spu_opcode_t
|
||||
{
|
||||
u32 opcode;
|
||||
|
||||
struct
|
||||
{
|
||||
u32 rt : 7; // 25..31, it's actually RC in 4-op instructions
|
||||
u32 ra : 7; // 18..24
|
||||
u32 rb : 7; // 11..17
|
||||
u32 rc : 7; // 4..10, it's actually RT in 4-op instructions
|
||||
};
|
||||
|
||||
struct
|
||||
{
|
||||
u32 : 14; // 18..31
|
||||
u32 i7 : 7; // 11..17
|
||||
};
|
||||
|
||||
struct
|
||||
{
|
||||
u32 : 14; // 18..31
|
||||
u32 i8 : 8; // 10..17
|
||||
};
|
||||
|
||||
struct
|
||||
{
|
||||
u32 : 14; // 18..31
|
||||
u32 i10 : 10; // 8..17
|
||||
};
|
||||
|
||||
struct
|
||||
{
|
||||
u32 : 7; // 25..31
|
||||
u32 i16 : 16; // 9..24
|
||||
};
|
||||
|
||||
struct
|
||||
{
|
||||
u32 : 7; // 25..31
|
||||
u32 i18 : 18; // 7..24
|
||||
};
|
||||
|
||||
struct
|
||||
{
|
||||
s32 : 14; // 18..31
|
||||
s32 si7 : 7; // 11..17
|
||||
};
|
||||
|
||||
struct
|
||||
{
|
||||
s32 : 14; // 18..31
|
||||
s32 si8 : 8; // 10..17
|
||||
};
|
||||
|
||||
struct
|
||||
{
|
||||
s32 : 14; // 18..31
|
||||
s32 si10 : 10; // 8..17
|
||||
};
|
||||
|
||||
struct
|
||||
{
|
||||
s32 : 7; // 25..31
|
||||
s32 si16 : 16; // 9..24
|
||||
};
|
||||
|
||||
struct
|
||||
{
|
||||
s32 : 7; // 25..31
|
||||
s32 si18 : 18; // 7..24
|
||||
};
|
||||
|
||||
struct
|
||||
{
|
||||
u32 : 18; // 14..31
|
||||
u32 e : 1; // 13, "enable interrupts" bit
|
||||
u32 d : 1; // 12, "disable interrupts" bit
|
||||
};
|
||||
};
|
||||
|
||||
using spu_inter_func_t = void(*)(SPUThread& CPU, spu_opcode_t opcode);
|
||||
|
||||
namespace spu_interpreter
|
||||
{
|
||||
void DEFAULT(SPUThread& CPU, spu_opcode_t op);
|
||||
|
||||
void STOP(SPUThread& CPU, spu_opcode_t op);
|
||||
void LNOP(SPUThread& CPU, spu_opcode_t op);
|
||||
void SYNC(SPUThread& CPU, spu_opcode_t op);
|
||||
void DSYNC(SPUThread& CPU, spu_opcode_t op);
|
||||
void MFSPR(SPUThread& CPU, spu_opcode_t op);
|
||||
void RDCH(SPUThread& CPU, spu_opcode_t op);
|
||||
void RCHCNT(SPUThread& CPU, spu_opcode_t op);
|
||||
void SF(SPUThread& CPU, spu_opcode_t op);
|
||||
void OR(SPUThread& CPU, spu_opcode_t op);
|
||||
void BG(SPUThread& CPU, spu_opcode_t op);
|
||||
void SFH(SPUThread& CPU, spu_opcode_t op);
|
||||
void NOR(SPUThread& CPU, spu_opcode_t op);
|
||||
void ABSDB(SPUThread& CPU, spu_opcode_t op);
|
||||
void ROT(SPUThread& CPU, spu_opcode_t op);
|
||||
void ROTM(SPUThread& CPU, spu_opcode_t op);
|
||||
void ROTMA(SPUThread& CPU, spu_opcode_t op);
|
||||
void SHL(SPUThread& CPU, spu_opcode_t op);
|
||||
void ROTH(SPUThread& CPU, spu_opcode_t op);
|
||||
void ROTHM(SPUThread& CPU, spu_opcode_t op);
|
||||
void ROTMAH(SPUThread& CPU, spu_opcode_t op);
|
||||
void SHLH(SPUThread& CPU, spu_opcode_t op);
|
||||
void ROTI(SPUThread& CPU, spu_opcode_t op);
|
||||
void ROTMI(SPUThread& CPU, spu_opcode_t op);
|
||||
void ROTMAI(SPUThread& CPU, spu_opcode_t op);
|
||||
void SHLI(SPUThread& CPU, spu_opcode_t op);
|
||||
void ROTHI(SPUThread& CPU, spu_opcode_t op);
|
||||
void ROTHMI(SPUThread& CPU, spu_opcode_t op);
|
||||
void ROTMAHI(SPUThread& CPU, spu_opcode_t op);
|
||||
void SHLHI(SPUThread& CPU, spu_opcode_t op);
|
||||
void A(SPUThread& CPU, spu_opcode_t op);
|
||||
void AND(SPUThread& CPU, spu_opcode_t op);
|
||||
void CG(SPUThread& CPU, spu_opcode_t op);
|
||||
void AH(SPUThread& CPU, spu_opcode_t op);
|
||||
void NAND(SPUThread& CPU, spu_opcode_t op);
|
||||
void AVGB(SPUThread& CPU, spu_opcode_t op);
|
||||
void MTSPR(SPUThread& CPU, spu_opcode_t op);
|
||||
void WRCH(SPUThread& CPU, spu_opcode_t op);
|
||||
void BIZ(SPUThread& CPU, spu_opcode_t op);
|
||||
void BINZ(SPUThread& CPU, spu_opcode_t op);
|
||||
void BIHZ(SPUThread& CPU, spu_opcode_t op);
|
||||
void BIHNZ(SPUThread& CPU, spu_opcode_t op);
|
||||
void STOPD(SPUThread& CPU, spu_opcode_t op);
|
||||
void STQX(SPUThread& CPU, spu_opcode_t op);
|
||||
void BI(SPUThread& CPU, spu_opcode_t op);
|
||||
void BISL(SPUThread& CPU, spu_opcode_t op);
|
||||
void IRET(SPUThread& CPU, spu_opcode_t op);
|
||||
void BISLED(SPUThread& CPU, spu_opcode_t op);
|
||||
void HBR(SPUThread& CPU, spu_opcode_t op);
|
||||
void GB(SPUThread& CPU, spu_opcode_t op);
|
||||
void GBH(SPUThread& CPU, spu_opcode_t op);
|
||||
void GBB(SPUThread& CPU, spu_opcode_t op);
|
||||
void FSM(SPUThread& CPU, spu_opcode_t op);
|
||||
void FSMH(SPUThread& CPU, spu_opcode_t op);
|
||||
void FSMB(SPUThread& CPU, spu_opcode_t op);
|
||||
void FREST(SPUThread& CPU, spu_opcode_t op);
|
||||
void FRSQEST(SPUThread& CPU, spu_opcode_t op);
|
||||
void LQX(SPUThread& CPU, spu_opcode_t op);
|
||||
void ROTQBYBI(SPUThread& CPU, spu_opcode_t op);
|
||||
void ROTQMBYBI(SPUThread& CPU, spu_opcode_t op);
|
||||
void SHLQBYBI(SPUThread& CPU, spu_opcode_t op);
|
||||
void CBX(SPUThread& CPU, spu_opcode_t op);
|
||||
void CHX(SPUThread& CPU, spu_opcode_t op);
|
||||
void CWX(SPUThread& CPU, spu_opcode_t op);
|
||||
void CDX(SPUThread& CPU, spu_opcode_t op);
|
||||
void ROTQBI(SPUThread& CPU, spu_opcode_t op);
|
||||
void ROTQMBI(SPUThread& CPU, spu_opcode_t op);
|
||||
void SHLQBI(SPUThread& CPU, spu_opcode_t op);
|
||||
void ROTQBY(SPUThread& CPU, spu_opcode_t op);
|
||||
void ROTQMBY(SPUThread& CPU, spu_opcode_t op);
|
||||
void SHLQBY(SPUThread& CPU, spu_opcode_t op);
|
||||
void ORX(SPUThread& CPU, spu_opcode_t op);
|
||||
void CBD(SPUThread& CPU, spu_opcode_t op);
|
||||
void CHD(SPUThread& CPU, spu_opcode_t op);
|
||||
void CWD(SPUThread& CPU, spu_opcode_t op);
|
||||
void CDD(SPUThread& CPU, spu_opcode_t op);
|
||||
void ROTQBII(SPUThread& CPU, spu_opcode_t op);
|
||||
void ROTQMBII(SPUThread& CPU, spu_opcode_t op);
|
||||
void SHLQBII(SPUThread& CPU, spu_opcode_t op);
|
||||
void ROTQBYI(SPUThread& CPU, spu_opcode_t op);
|
||||
void ROTQMBYI(SPUThread& CPU, spu_opcode_t op);
|
||||
void SHLQBYI(SPUThread& CPU, spu_opcode_t op);
|
||||
void NOP(SPUThread& CPU, spu_opcode_t op);
|
||||
void CGT(SPUThread& CPU, spu_opcode_t op);
|
||||
void XOR(SPUThread& CPU, spu_opcode_t op);
|
||||
void CGTH(SPUThread& CPU, spu_opcode_t op);
|
||||
void EQV(SPUThread& CPU, spu_opcode_t op);
|
||||
void CGTB(SPUThread& CPU, spu_opcode_t op);
|
||||
void SUMB(SPUThread& CPU, spu_opcode_t op);
|
||||
void HGT(SPUThread& CPU, spu_opcode_t op);
|
||||
void CLZ(SPUThread& CPU, spu_opcode_t op);
|
||||
void XSWD(SPUThread& CPU, spu_opcode_t op);
|
||||
void XSHW(SPUThread& CPU, spu_opcode_t op);
|
||||
void CNTB(SPUThread& CPU, spu_opcode_t op);
|
||||
void XSBH(SPUThread& CPU, spu_opcode_t op);
|
||||
void CLGT(SPUThread& CPU, spu_opcode_t op);
|
||||
void ANDC(SPUThread& CPU, spu_opcode_t op);
|
||||
void FCGT(SPUThread& CPU, spu_opcode_t op);
|
||||
void DFCGT(SPUThread& CPU, spu_opcode_t op);
|
||||
void FA(SPUThread& CPU, spu_opcode_t op);
|
||||
void FS(SPUThread& CPU, spu_opcode_t op);
|
||||
void FM(SPUThread& CPU, spu_opcode_t op);
|
||||
void CLGTH(SPUThread& CPU, spu_opcode_t op);
|
||||
void ORC(SPUThread& CPU, spu_opcode_t op);
|
||||
void FCMGT(SPUThread& CPU, spu_opcode_t op);
|
||||
void DFCMGT(SPUThread& CPU, spu_opcode_t op);
|
||||
void DFA(SPUThread& CPU, spu_opcode_t op);
|
||||
void DFS(SPUThread& CPU, spu_opcode_t op);
|
||||
void DFM(SPUThread& CPU, spu_opcode_t op);
|
||||
void CLGTB(SPUThread& CPU, spu_opcode_t op);
|
||||
void HLGT(SPUThread& CPU, spu_opcode_t op);
|
||||
void DFMA(SPUThread& CPU, spu_opcode_t op);
|
||||
void DFMS(SPUThread& CPU, spu_opcode_t op);
|
||||
void DFNMS(SPUThread& CPU, spu_opcode_t op);
|
||||
void DFNMA(SPUThread& CPU, spu_opcode_t op);
|
||||
void CEQ(SPUThread& CPU, spu_opcode_t op);
|
||||
void MPYHHU(SPUThread& CPU, spu_opcode_t op);
|
||||
void ADDX(SPUThread& CPU, spu_opcode_t op);
|
||||
void SFX(SPUThread& CPU, spu_opcode_t op);
|
||||
void CGX(SPUThread& CPU, spu_opcode_t op);
|
||||
void BGX(SPUThread& CPU, spu_opcode_t op);
|
||||
void MPYHHA(SPUThread& CPU, spu_opcode_t op);
|
||||
void MPYHHAU(SPUThread& CPU, spu_opcode_t op);
|
||||
void FSCRRD(SPUThread& CPU, spu_opcode_t op);
|
||||
void FESD(SPUThread& CPU, spu_opcode_t op);
|
||||
void FRDS(SPUThread& CPU, spu_opcode_t op);
|
||||
void FSCRWR(SPUThread& CPU, spu_opcode_t op);
|
||||
void DFTSV(SPUThread& CPU, spu_opcode_t op);
|
||||
void FCEQ(SPUThread& CPU, spu_opcode_t op);
|
||||
void DFCEQ(SPUThread& CPU, spu_opcode_t op);
|
||||
void MPY(SPUThread& CPU, spu_opcode_t op);
|
||||
void MPYH(SPUThread& CPU, spu_opcode_t op);
|
||||
void MPYHH(SPUThread& CPU, spu_opcode_t op);
|
||||
void MPYS(SPUThread& CPU, spu_opcode_t op);
|
||||
void CEQH(SPUThread& CPU, spu_opcode_t op);
|
||||
void FCMEQ(SPUThread& CPU, spu_opcode_t op);
|
||||
void DFCMEQ(SPUThread& CPU, spu_opcode_t op);
|
||||
void MPYU(SPUThread& CPU, spu_opcode_t op);
|
||||
void CEQB(SPUThread& CPU, spu_opcode_t op);
|
||||
void FI(SPUThread& CPU, spu_opcode_t op);
|
||||
void HEQ(SPUThread& CPU, spu_opcode_t op);
|
||||
|
||||
void CFLTS(SPUThread& CPU, spu_opcode_t op);
|
||||
void CFLTU(SPUThread& CPU, spu_opcode_t op);
|
||||
void CSFLT(SPUThread& CPU, spu_opcode_t op);
|
||||
void CUFLT(SPUThread& CPU, spu_opcode_t op);
|
||||
|
||||
void BRZ(SPUThread& CPU, spu_opcode_t op);
|
||||
void STQA(SPUThread& CPU, spu_opcode_t op);
|
||||
void BRNZ(SPUThread& CPU, spu_opcode_t op);
|
||||
void BRHZ(SPUThread& CPU, spu_opcode_t op);
|
||||
void BRHNZ(SPUThread& CPU, spu_opcode_t op);
|
||||
void STQR(SPUThread& CPU, spu_opcode_t op);
|
||||
void BRA(SPUThread& CPU, spu_opcode_t op);
|
||||
void LQA(SPUThread& CPU, spu_opcode_t op);
|
||||
void BRASL(SPUThread& CPU, spu_opcode_t op);
|
||||
void BR(SPUThread& CPU, spu_opcode_t op);
|
||||
void FSMBI(SPUThread& CPU, spu_opcode_t op);
|
||||
void BRSL(SPUThread& CPU, spu_opcode_t op);
|
||||
void LQR(SPUThread& CPU, spu_opcode_t op);
|
||||
void IL(SPUThread& CPU, spu_opcode_t op);
|
||||
void ILHU(SPUThread& CPU, spu_opcode_t op);
|
||||
void ILH(SPUThread& CPU, spu_opcode_t op);
|
||||
void IOHL(SPUThread& CPU, spu_opcode_t op);
|
||||
|
||||
void ORI(SPUThread& CPU, spu_opcode_t op);
|
||||
void ORHI(SPUThread& CPU, spu_opcode_t op);
|
||||
void ORBI(SPUThread& CPU, spu_opcode_t op);
|
||||
void SFI(SPUThread& CPU, spu_opcode_t op);
|
||||
void SFHI(SPUThread& CPU, spu_opcode_t op);
|
||||
void ANDI(SPUThread& CPU, spu_opcode_t op);
|
||||
void ANDHI(SPUThread& CPU, spu_opcode_t op);
|
||||
void ANDBI(SPUThread& CPU, spu_opcode_t op);
|
||||
void AI(SPUThread& CPU, spu_opcode_t op);
|
||||
void AHI(SPUThread& CPU, spu_opcode_t op);
|
||||
void STQD(SPUThread& CPU, spu_opcode_t op);
|
||||
void LQD(SPUThread& CPU, spu_opcode_t op);
|
||||
void XORI(SPUThread& CPU, spu_opcode_t op);
|
||||
void XORHI(SPUThread& CPU, spu_opcode_t op);
|
||||
void XORBI(SPUThread& CPU, spu_opcode_t op);
|
||||
void CGTI(SPUThread& CPU, spu_opcode_t op);
|
||||
void CGTHI(SPUThread& CPU, spu_opcode_t op);
|
||||
void CGTBI(SPUThread& CPU, spu_opcode_t op);
|
||||
void HGTI(SPUThread& CPU, spu_opcode_t op);
|
||||
void CLGTI(SPUThread& CPU, spu_opcode_t op);
|
||||
void CLGTHI(SPUThread& CPU, spu_opcode_t op);
|
||||
void CLGTBI(SPUThread& CPU, spu_opcode_t op);
|
||||
void HLGTI(SPUThread& CPU, spu_opcode_t op);
|
||||
void MPYI(SPUThread& CPU, spu_opcode_t op);
|
||||
void MPYUI(SPUThread& CPU, spu_opcode_t op);
|
||||
void CEQI(SPUThread& CPU, spu_opcode_t op);
|
||||
void CEQHI(SPUThread& CPU, spu_opcode_t op);
|
||||
void CEQBI(SPUThread& CPU, spu_opcode_t op);
|
||||
void HEQI(SPUThread& CPU, spu_opcode_t op);
|
||||
|
||||
void HBRA(SPUThread& CPU, spu_opcode_t op);
|
||||
void HBRR(SPUThread& CPU, spu_opcode_t op);
|
||||
void ILA(SPUThread& CPU, spu_opcode_t op);
|
||||
|
||||
void SELB(SPUThread& CPU, spu_opcode_t op);
|
||||
void SHUFB(SPUThread& CPU, spu_opcode_t op);
|
||||
void MPYA(SPUThread& CPU, spu_opcode_t op);
|
||||
void FNMS(SPUThread& CPU, spu_opcode_t op);
|
||||
void FMA(SPUThread& CPU, spu_opcode_t op);
|
||||
void FMS(SPUThread& CPU, spu_opcode_t op);
|
||||
|
||||
void UNK(SPUThread& CPU, spu_opcode_t op);
|
||||
}
|
||||
|
||||
class SPUInterpreter2 : public SPUOpcodes
|
||||
{
|
||||
public:
|
||||
virtual ~SPUInterpreter2() {}
|
||||
|
||||
spu_inter_func_t func;
|
||||
|
||||
virtual void STOP(u32 code) { func = spu_interpreter::STOP; }
|
||||
virtual void LNOP() { func = spu_interpreter::LNOP; }
|
||||
virtual void SYNC(u32 Cbit) { func = spu_interpreter::SYNC; }
|
||||
virtual void DSYNC() { func = spu_interpreter::DSYNC; }
|
||||
virtual void MFSPR(u32 rt, u32 sa) { func = spu_interpreter::MFSPR; }
|
||||
virtual void RDCH(u32 rt, u32 ra) { func = spu_interpreter::RDCH; }
|
||||
virtual void RCHCNT(u32 rt, u32 ra) { func = spu_interpreter::RCHCNT; }
|
||||
virtual void SF(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::SF; }
|
||||
virtual void OR(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::OR; }
|
||||
virtual void BG(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::BG; }
|
||||
virtual void SFH(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::SFH; }
|
||||
virtual void NOR(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::NOR; }
|
||||
virtual void ABSDB(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::ABSDB; }
|
||||
virtual void ROT(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::ROT; }
|
||||
virtual void ROTM(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::ROTM; }
|
||||
virtual void ROTMA(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::ROTMA; }
|
||||
virtual void SHL(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::SHL; }
|
||||
virtual void ROTH(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::ROTH; }
|
||||
virtual void ROTHM(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::ROTHM; }
|
||||
virtual void ROTMAH(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::ROTMAH; }
|
||||
virtual void SHLH(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::SHLH; }
|
||||
virtual void ROTI(u32 rt, u32 ra, s32 i7) { func = spu_interpreter::ROTI; }
|
||||
virtual void ROTMI(u32 rt, u32 ra, s32 i7) { func = spu_interpreter::ROTMI; }
|
||||
virtual void ROTMAI(u32 rt, u32 ra, s32 i7) { func = spu_interpreter::ROTMAI; }
|
||||
virtual void SHLI(u32 rt, u32 ra, s32 i7) { func = spu_interpreter::SHLI; }
|
||||
virtual void ROTHI(u32 rt, u32 ra, s32 i7) { func = spu_interpreter::ROTHI; }
|
||||
virtual void ROTHMI(u32 rt, u32 ra, s32 i7) { func = spu_interpreter::ROTHMI; }
|
||||
virtual void ROTMAHI(u32 rt, u32 ra, s32 i7) { func = spu_interpreter::ROTMAHI; }
|
||||
virtual void SHLHI(u32 rt, u32 ra, s32 i7) { func = spu_interpreter::SHLHI; }
|
||||
virtual void A(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::A; }
|
||||
virtual void AND(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::AND; }
|
||||
virtual void CG(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::CG; }
|
||||
virtual void AH(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::AH; }
|
||||
virtual void NAND(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::NAND; }
|
||||
virtual void AVGB(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::AVGB; }
|
||||
virtual void MTSPR(u32 rt, u32 sa) { func = spu_interpreter::MTSPR; }
|
||||
virtual void WRCH(u32 ra, u32 rt) { func = spu_interpreter::WRCH; }
|
||||
virtual void BIZ(u32 intr, u32 rt, u32 ra) { func = spu_interpreter::BIZ; }
|
||||
virtual void BINZ(u32 intr, u32 rt, u32 ra) { func = spu_interpreter::BINZ; }
|
||||
virtual void BIHZ(u32 intr, u32 rt, u32 ra) { func = spu_interpreter::BIHZ; }
|
||||
virtual void BIHNZ(u32 intr, u32 rt, u32 ra) { func = spu_interpreter::BIHNZ; }
|
||||
virtual void STOPD(u32 rc, u32 ra, u32 rb) { func = spu_interpreter::STOPD; }
|
||||
virtual void STQX(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::STQX; }
|
||||
virtual void BI(u32 intr, u32 ra) { func = spu_interpreter::BI; }
|
||||
virtual void BISL(u32 intr, u32 rt, u32 ra) { func = spu_interpreter::BISL; }
|
||||
virtual void IRET(u32 ra) { func = spu_interpreter::IRET; }
|
||||
virtual void BISLED(u32 intr, u32 rt, u32 ra) { func = spu_interpreter::BISLED; }
|
||||
virtual void HBR(u32 p, u32 ro, u32 ra) { func = spu_interpreter::HBR; }
|
||||
virtual void GB(u32 rt, u32 ra) { func = spu_interpreter::GB; }
|
||||
virtual void GBH(u32 rt, u32 ra) { func = spu_interpreter::GBH; }
|
||||
virtual void GBB(u32 rt, u32 ra) { func = spu_interpreter::GBB; }
|
||||
virtual void FSM(u32 rt, u32 ra) { func = spu_interpreter::FSM; }
|
||||
virtual void FSMH(u32 rt, u32 ra) { func = spu_interpreter::FSMH; }
|
||||
virtual void FSMB(u32 rt, u32 ra) { func = spu_interpreter::FSMB; }
|
||||
virtual void FREST(u32 rt, u32 ra) { func = spu_interpreter::FREST; }
|
||||
virtual void FRSQEST(u32 rt, u32 ra) { func = spu_interpreter::FRSQEST; }
|
||||
virtual void LQX(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::LQX; }
|
||||
virtual void ROTQBYBI(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::ROTQBYBI; }
|
||||
virtual void ROTQMBYBI(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::ROTQMBYBI; }
|
||||
virtual void SHLQBYBI(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::SHLQBYBI; }
|
||||
virtual void CBX(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::CBX; }
|
||||
virtual void CHX(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::CHX; }
|
||||
virtual void CWX(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::CWX; }
|
||||
virtual void CDX(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::CDX; }
|
||||
virtual void ROTQBI(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::ROTQBI; }
|
||||
virtual void ROTQMBI(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::ROTQMBI; }
|
||||
virtual void SHLQBI(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::SHLQBI; }
|
||||
virtual void ROTQBY(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::ROTQBY; }
|
||||
virtual void ROTQMBY(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::ROTQMBY; }
|
||||
virtual void SHLQBY(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::SHLQBY; }
|
||||
virtual void ORX(u32 rt, u32 ra) { func = spu_interpreter::ORX; }
|
||||
virtual void CBD(u32 rt, u32 ra, s32 i7) { func = spu_interpreter::CBD; }
|
||||
virtual void CHD(u32 rt, u32 ra, s32 i7) { func = spu_interpreter::CHD; }
|
||||
virtual void CWD(u32 rt, u32 ra, s32 i7) { func = spu_interpreter::CWD; }
|
||||
virtual void CDD(u32 rt, u32 ra, s32 i7) { func = spu_interpreter::CDD; }
|
||||
virtual void ROTQBII(u32 rt, u32 ra, s32 i7) { func = spu_interpreter::ROTQBII; }
|
||||
virtual void ROTQMBII(u32 rt, u32 ra, s32 i7) { func = spu_interpreter::ROTQMBII; }
|
||||
virtual void SHLQBII(u32 rt, u32 ra, s32 i7) { func = spu_interpreter::SHLQBII; }
|
||||
virtual void ROTQBYI(u32 rt, u32 ra, s32 i7) { func = spu_interpreter::ROTQBYI; }
|
||||
virtual void ROTQMBYI(u32 rt, u32 ra, s32 i7) { func = spu_interpreter::ROTQMBYI; }
|
||||
virtual void SHLQBYI(u32 rt, u32 ra, s32 i7) { func = spu_interpreter::SHLQBYI; }
|
||||
virtual void NOP(u32 rt) { func = spu_interpreter::NOP; }
|
||||
virtual void CGT(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::CGT; }
|
||||
virtual void XOR(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::XOR; }
|
||||
virtual void CGTH(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::CGTH; }
|
||||
virtual void EQV(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::EQV; }
|
||||
virtual void CGTB(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::CGTB; }
|
||||
virtual void SUMB(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::SUMB; }
|
||||
virtual void HGT(u32 rt, s32 ra, s32 rb) { func = spu_interpreter::HGT; }
|
||||
virtual void CLZ(u32 rt, u32 ra) { func = spu_interpreter::CLZ; }
|
||||
virtual void XSWD(u32 rt, u32 ra) { func = spu_interpreter::XSWD; }
|
||||
virtual void XSHW(u32 rt, u32 ra) { func = spu_interpreter::XSHW; }
|
||||
virtual void CNTB(u32 rt, u32 ra) { func = spu_interpreter::CNTB; }
|
||||
virtual void XSBH(u32 rt, u32 ra) { func = spu_interpreter::XSBH; }
|
||||
virtual void CLGT(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::CLGT; }
|
||||
virtual void ANDC(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::ANDC; }
|
||||
virtual void FCGT(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::FCGT; }
|
||||
virtual void DFCGT(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::DFCGT; }
|
||||
virtual void FA(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::FA; }
|
||||
virtual void FS(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::FS; }
|
||||
virtual void FM(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::FM; }
|
||||
virtual void CLGTH(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::CLGTH; }
|
||||
virtual void ORC(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::ORC; }
|
||||
virtual void FCMGT(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::FCMGT; }
|
||||
virtual void DFCMGT(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::DFCMGT; }
|
||||
virtual void DFA(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::DFA; }
|
||||
virtual void DFS(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::DFS; }
|
||||
virtual void DFM(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::DFM; }
|
||||
virtual void CLGTB(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::CLGTB; }
|
||||
virtual void HLGT(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::HLGT; }
|
||||
virtual void DFMA(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::DFMA; }
|
||||
virtual void DFMS(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::DFMS; }
|
||||
virtual void DFNMS(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::DFNMS; }
|
||||
virtual void DFNMA(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::DFNMA; }
|
||||
virtual void CEQ(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::CEQ; }
|
||||
virtual void MPYHHU(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::MPYHHU; }
|
||||
virtual void ADDX(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::ADDX; }
|
||||
virtual void SFX(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::SFX; }
|
||||
virtual void CGX(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::CGX; }
|
||||
virtual void BGX(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::BGX; }
|
||||
virtual void MPYHHA(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::MPYHHA; }
|
||||
virtual void MPYHHAU(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::MPYHHAU; }
|
||||
virtual void FSCRRD(u32 rt) { func = spu_interpreter::FSCRRD; }
|
||||
virtual void FESD(u32 rt, u32 ra) { func = spu_interpreter::FESD; }
|
||||
virtual void FRDS(u32 rt, u32 ra) { func = spu_interpreter::FRDS; }
|
||||
virtual void FSCRWR(u32 rt, u32 ra) { func = spu_interpreter::FSCRWR; }
|
||||
virtual void DFTSV(u32 rt, u32 ra, s32 i7) { func = spu_interpreter::DFTSV; }
|
||||
virtual void FCEQ(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::FCEQ; }
|
||||
virtual void DFCEQ(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::DFCEQ; }
|
||||
virtual void MPY(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::MPY; }
|
||||
virtual void MPYH(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::MPYH; }
|
||||
virtual void MPYHH(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::MPYHH; }
|
||||
virtual void MPYS(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::MPYS; }
|
||||
virtual void CEQH(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::CEQH; }
|
||||
virtual void FCMEQ(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::FCMEQ; }
|
||||
virtual void DFCMEQ(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::DFCMEQ; }
|
||||
virtual void MPYU(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::MPYU; }
|
||||
virtual void CEQB(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::CEQB; }
|
||||
virtual void FI(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::FI; }
|
||||
virtual void HEQ(u32 rt, u32 ra, u32 rb) { func = spu_interpreter::HEQ; }
|
||||
|
||||
virtual void CFLTS(u32 rt, u32 ra, s32 i8) { func = spu_interpreter::CFLTS; }
|
||||
virtual void CFLTU(u32 rt, u32 ra, s32 i8) { func = spu_interpreter::CFLTU; }
|
||||
virtual void CSFLT(u32 rt, u32 ra, s32 i8) { func = spu_interpreter::CSFLT; }
|
||||
virtual void CUFLT(u32 rt, u32 ra, s32 i8) { func = spu_interpreter::CUFLT; }
|
||||
|
||||
virtual void BRZ(u32 rt, s32 i16) { func = spu_interpreter::BRZ; }
|
||||
virtual void STQA(u32 rt, s32 i16) { func = spu_interpreter::STQA; }
|
||||
virtual void BRNZ(u32 rt, s32 i16) { func = spu_interpreter::BRNZ; }
|
||||
virtual void BRHZ(u32 rt, s32 i16) { func = spu_interpreter::BRHZ; }
|
||||
virtual void BRHNZ(u32 rt, s32 i16) { func = spu_interpreter::BRHNZ; }
|
||||
virtual void STQR(u32 rt, s32 i16) { func = spu_interpreter::STQR; }
|
||||
virtual void BRA(s32 i16) { func = spu_interpreter::BRA; }
|
||||
virtual void LQA(u32 rt, s32 i16) { func = spu_interpreter::LQA; }
|
||||
virtual void BRASL(u32 rt, s32 i16) { func = spu_interpreter::BRASL; }
|
||||
virtual void BR(s32 i16) { func = spu_interpreter::BR; }
|
||||
virtual void FSMBI(u32 rt, s32 i16) { func = spu_interpreter::FSMBI; }
|
||||
virtual void BRSL(u32 rt, s32 i16) { func = spu_interpreter::BRSL; }
|
||||
virtual void LQR(u32 rt, s32 i16) { func = spu_interpreter::LQR; }
|
||||
virtual void IL(u32 rt, s32 i16) { func = spu_interpreter::IL; }
|
||||
virtual void ILHU(u32 rt, s32 i16) { func = spu_interpreter::ILHU; }
|
||||
virtual void ILH(u32 rt, s32 i16) { func = spu_interpreter::ILH; }
|
||||
virtual void IOHL(u32 rt, s32 i16) { func = spu_interpreter::IOHL; }
|
||||
|
||||
virtual void ORI(u32 rt, u32 ra, s32 i10) { func = spu_interpreter::ORI; }
|
||||
virtual void ORHI(u32 rt, u32 ra, s32 i10) { func = spu_interpreter::ORHI; }
|
||||
virtual void ORBI(u32 rt, u32 ra, s32 i10) { func = spu_interpreter::ORBI; }
|
||||
virtual void SFI(u32 rt, u32 ra, s32 i10) { func = spu_interpreter::SFI; }
|
||||
virtual void SFHI(u32 rt, u32 ra, s32 i10) { func = spu_interpreter::SFHI; }
|
||||
virtual void ANDI(u32 rt, u32 ra, s32 i10) { func = spu_interpreter::ANDI; }
|
||||
virtual void ANDHI(u32 rt, u32 ra, s32 i10) { func = spu_interpreter::ANDHI; }
|
||||
virtual void ANDBI(u32 rt, u32 ra, s32 i10) { func = spu_interpreter::ANDBI; }
|
||||
virtual void AI(u32 rt, u32 ra, s32 i10) { func = spu_interpreter::AI; }
|
||||
virtual void AHI(u32 rt, u32 ra, s32 i10) { func = spu_interpreter::AHI; }
|
||||
virtual void STQD(u32 rt, s32 i10, u32 ra) { func = spu_interpreter::STQD; }
|
||||
virtual void LQD(u32 rt, s32 i10, u32 ra) { func = spu_interpreter::LQD; }
|
||||
virtual void XORI(u32 rt, u32 ra, s32 i10) { func = spu_interpreter::XORI; }
|
||||
virtual void XORHI(u32 rt, u32 ra, s32 i10) { func = spu_interpreter::XORHI; }
|
||||
virtual void XORBI(u32 rt, u32 ra, s32 i10) { func = spu_interpreter::XORBI; }
|
||||
virtual void CGTI(u32 rt, u32 ra, s32 i10) { func = spu_interpreter::CGTI; }
|
||||
virtual void CGTHI(u32 rt, u32 ra, s32 i10) { func = spu_interpreter::CGTHI; }
|
||||
virtual void CGTBI(u32 rt, u32 ra, s32 i10) { func = spu_interpreter::CGTBI; }
|
||||
virtual void HGTI(u32 rt, u32 ra, s32 i10) { func = spu_interpreter::HGTI; }
|
||||
virtual void CLGTI(u32 rt, u32 ra, s32 i10) { func = spu_interpreter::CLGTI; }
|
||||
virtual void CLGTHI(u32 rt, u32 ra, s32 i10) { func = spu_interpreter::CLGTHI; }
|
||||
virtual void CLGTBI(u32 rt, u32 ra, s32 i10) { func = spu_interpreter::CLGTBI; }
|
||||
virtual void HLGTI(u32 rt, u32 ra, s32 i10) { func = spu_interpreter::HLGTI; }
|
||||
virtual void MPYI(u32 rt, u32 ra, s32 i10) { func = spu_interpreter::MPYI; }
|
||||
virtual void MPYUI(u32 rt, u32 ra, s32 i10) { func = spu_interpreter::MPYUI; }
|
||||
virtual void CEQI(u32 rt, u32 ra, s32 i10) { func = spu_interpreter::CEQI; }
|
||||
virtual void CEQHI(u32 rt, u32 ra, s32 i10) { func = spu_interpreter::CEQHI; }
|
||||
virtual void CEQBI(u32 rt, u32 ra, s32 i10) { func = spu_interpreter::CEQBI; }
|
||||
virtual void HEQI(u32 rt, u32 ra, s32 i10) { func = spu_interpreter::HEQI; }
|
||||
|
||||
virtual void HBRA(s32 ro, s32 i16) { func = spu_interpreter::HBRA; }
|
||||
virtual void HBRR(s32 ro, s32 i16) { func = spu_interpreter::HBRR; }
|
||||
virtual void ILA(u32 rt, u32 i18) { func = spu_interpreter::ILA; }
|
||||
|
||||
virtual void SELB(u32 rc, u32 ra, u32 rb, u32 rt) { func = spu_interpreter::SELB; }
|
||||
virtual void SHUFB(u32 rc, u32 ra, u32 rb, u32 rt) { func = spu_interpreter::SHUFB; }
|
||||
virtual void MPYA(u32 rc, u32 ra, u32 rb, u32 rt) { func = spu_interpreter::MPYA; }
|
||||
virtual void FNMS(u32 rc, u32 ra, u32 rb, u32 rt) { func = spu_interpreter::FNMS; }
|
||||
virtual void FMA(u32 rc, u32 ra, u32 rb, u32 rt) { func = spu_interpreter::FMA; }
|
||||
virtual void FMS(u32 rc, u32 ra, u32 rb, u32 rt) { func = spu_interpreter::FMS; }
|
||||
|
||||
virtual void UNK(u32 code, u32 opcode, u32 gcode) { func = spu_interpreter::UNK; }
|
||||
};
|
||||
|
|
@ -1073,11 +1073,9 @@ private:
|
|||
}
|
||||
void BIZ(u32 intr, u32 rt, u32 ra)
|
||||
{
|
||||
switch (intr)
|
||||
switch (intr & 0x30)
|
||||
{
|
||||
case 0: break;
|
||||
case 0x10: break; // enable interrupts
|
||||
case 0x20: break; // disable interrupts
|
||||
default: UNIMPLEMENTED(); return;
|
||||
}
|
||||
|
||||
|
|
@ -1094,11 +1092,9 @@ private:
|
|||
}
|
||||
void BINZ(u32 intr, u32 rt, u32 ra)
|
||||
{
|
||||
switch (intr)
|
||||
switch (intr & 0x30)
|
||||
{
|
||||
case 0: break;
|
||||
case 0x10: break; // enable interrupts
|
||||
case 0x20: break; // disable interrupts
|
||||
default: UNIMPLEMENTED(); return;
|
||||
}
|
||||
|
||||
|
|
@ -1115,11 +1111,9 @@ private:
|
|||
}
|
||||
void BIHZ(u32 intr, u32 rt, u32 ra)
|
||||
{
|
||||
switch (intr)
|
||||
switch (intr & 0x30)
|
||||
{
|
||||
case 0: break;
|
||||
case 0x10: break; // enable interrupts
|
||||
case 0x20: break; // disable interrupts
|
||||
default: UNIMPLEMENTED(); return;
|
||||
}
|
||||
|
||||
|
|
@ -1136,11 +1130,9 @@ private:
|
|||
}
|
||||
void BIHNZ(u32 intr, u32 rt, u32 ra)
|
||||
{
|
||||
switch (intr)
|
||||
switch (intr & 0x30)
|
||||
{
|
||||
case 0: break;
|
||||
case 0x10: break; // enable interrupts
|
||||
case 0x20: break; // disable interrupts
|
||||
default: UNIMPLEMENTED(); return;
|
||||
}
|
||||
|
||||
|
|
@ -1188,11 +1180,9 @@ private:
|
|||
}
|
||||
void BI(u32 intr, u32 ra)
|
||||
{
|
||||
switch (intr)
|
||||
switch (intr & 0x30)
|
||||
{
|
||||
case 0: break;
|
||||
case 0x10: break; // enable interrupts
|
||||
case 0x20: break; // disable interrupts
|
||||
default: UNIMPLEMENTED(); return;
|
||||
}
|
||||
|
||||
|
|
@ -1206,11 +1196,9 @@ private:
|
|||
}
|
||||
void BISL(u32 intr, u32 rt, u32 ra)
|
||||
{
|
||||
switch (intr)
|
||||
switch (intr & 0x30)
|
||||
{
|
||||
case 0: break;
|
||||
case 0x10: break; // enable interrupts
|
||||
case 0x20: break; // disable interrupts
|
||||
default: UNIMPLEMENTED(); return;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -17,10 +17,38 @@
|
|||
#include "Emu/Cell/SPUThread.h"
|
||||
#include "Emu/Cell/SPUDecoder.h"
|
||||
#include "Emu/Cell/SPUInterpreter.h"
|
||||
#include "Emu/Cell/SPUInterpreter2.h"
|
||||
#include "Emu/Cell/SPURecompiler.h"
|
||||
|
||||
#include <cfenv>
|
||||
|
||||
class spu_inter_func_list_t
|
||||
{
|
||||
std::array<spu_inter_func_t, 2048> funcs;
|
||||
|
||||
public:
|
||||
spu_inter_func_list_t()
|
||||
{
|
||||
auto inter = new SPUInterpreter2;
|
||||
SPUDecoder dec(*inter);
|
||||
|
||||
for (u32 i = 0; i < funcs.size(); i++)
|
||||
{
|
||||
inter->func = spu_interpreter::DEFAULT;
|
||||
|
||||
dec.Decode(i << 21);
|
||||
|
||||
funcs[i] = inter->func;
|
||||
}
|
||||
}
|
||||
|
||||
__forceinline spu_inter_func_t operator [] (u32 opcode) const
|
||||
{
|
||||
return funcs[opcode >> 21];
|
||||
}
|
||||
}
|
||||
const g_spu_inter_func_list;
|
||||
|
||||
SPUThread& GetCurrentSPUThread()
|
||||
{
|
||||
CPUThread* thread = GetCurrentCPUThread();
|
||||
|
|
@ -46,23 +74,48 @@ SPUThread::~SPUThread()
|
|||
|
||||
void SPUThread::Task()
|
||||
{
|
||||
const int round = std::fegetround();
|
||||
std::fesetround(FE_TOWARDZERO);
|
||||
|
||||
if (m_custom_task)
|
||||
{
|
||||
m_custom_task(*this);
|
||||
}
|
||||
else
|
||||
{
|
||||
CPUThread::Task();
|
||||
return m_custom_task(*this);
|
||||
}
|
||||
|
||||
if (std::fegetround() != FE_TOWARDZERO)
|
||||
if (m_dec)
|
||||
{
|
||||
LOG_ERROR(SPU, "Rounding mode has changed(%d)", std::fegetround());
|
||||
return CPUThread::Task();
|
||||
}
|
||||
|
||||
while (true)
|
||||
{
|
||||
// read opcode
|
||||
const spu_opcode_t opcode = { vm::read32(PC + offset) };
|
||||
|
||||
// get interpreter function
|
||||
const auto func = g_spu_inter_func_list[opcode.opcode];
|
||||
|
||||
if (m_events)
|
||||
{
|
||||
// process events
|
||||
if (Emu.IsStopped())
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
if (m_events & CPU_EVENT_STOP && (IsStopped() || IsPaused()))
|
||||
{
|
||||
m_events &= ~CPU_EVENT_STOP;
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
// call interpreter function
|
||||
func(*this, opcode);
|
||||
|
||||
// next instruction
|
||||
//PC += 4;
|
||||
NextPc(4);
|
||||
}
|
||||
std::fesetround(round);
|
||||
}
|
||||
|
||||
void SPUThread::DoReset()
|
||||
|
|
@ -122,19 +175,33 @@ void SPUThread::CloseStack()
|
|||
|
||||
void SPUThread::DoRun()
|
||||
{
|
||||
switch(Ini.SPUDecoderMode.GetValue())
|
||||
m_dec = nullptr;
|
||||
|
||||
switch (auto mode = Ini.SPUDecoderMode.GetValue())
|
||||
{
|
||||
case 0: // original interpreter
|
||||
{
|
||||
case 1:
|
||||
m_dec = new SPUDecoder(*new SPUInterpreter(*this));
|
||||
break;
|
||||
}
|
||||
|
||||
case 1: // alternative interpreter
|
||||
{
|
||||
break;
|
||||
}
|
||||
|
||||
case 2:
|
||||
{
|
||||
m_dec = new SPURecompilerCore(*this);
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
LOG_ERROR(SPU, "Invalid SPU decoder mode: %d", Ini.SPUDecoderMode.GetValue());
|
||||
{
|
||||
LOG_ERROR(SPU, "Invalid SPU decoder mode: %d", mode);
|
||||
Emu.Pause();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void SPUThread::DoResume()
|
||||
|
|
@ -163,21 +230,25 @@ void SPUThread::FastCall(u32 ls_addr)
|
|||
auto old_PC = PC;
|
||||
auto old_LR = GPR[0]._u32[3];
|
||||
auto old_stack = GPR[1]._u32[3]; // only saved and restored (may be wrong)
|
||||
auto old_task = decltype(m_custom_task)();
|
||||
|
||||
m_status = Running;
|
||||
PC = ls_addr;
|
||||
GPR[0]._u32[3] = 0x0;
|
||||
m_custom_task.swap(m_custom_task);
|
||||
|
||||
CPUThread::Task();
|
||||
SPUThread::Task();
|
||||
|
||||
PC = old_PC;
|
||||
GPR[0]._u32[3] = old_LR;
|
||||
GPR[1]._u32[3] = old_stack;
|
||||
m_custom_task.swap(m_custom_task);
|
||||
}
|
||||
|
||||
void SPUThread::FastStop()
|
||||
{
|
||||
m_status = Stopped;
|
||||
m_events |= CPU_EVENT_STOP;
|
||||
}
|
||||
|
||||
void SPUThread::FastRun()
|
||||
|
|
|
|||
|
|
@ -230,7 +230,7 @@ s32 sys_lwmutex_lock(PPUThread& CPU, vm::ptr<sys_lwmutex_t> lwmutex, u64 timeout
|
|||
// locking succeeded
|
||||
auto old = lwmutex->owner.exchange(tid);
|
||||
|
||||
if (old.data() != se32(lwmutex_reserved))
|
||||
if (old.data() != se32(lwmutex_reserved) && !Emu.IsStopped())
|
||||
{
|
||||
sysPrxForUser.Fatal("sys_lwmutex_lock(lwmutex=*0x%x): locking failed (owner=0x%x)", lwmutex, old);
|
||||
}
|
||||
|
|
@ -301,7 +301,7 @@ s32 sys_lwmutex_trylock(PPUThread& CPU, vm::ptr<sys_lwmutex_t> lwmutex)
|
|||
// locking succeeded
|
||||
auto old = lwmutex->owner.exchange(tid);
|
||||
|
||||
if (old.data() != se32(lwmutex_reserved))
|
||||
if (old.data() != se32(lwmutex_reserved) && !Emu.IsStopped())
|
||||
{
|
||||
sysPrxForUser.Fatal("sys_lwmutex_trylock(lwmutex=*0x%x): locking failed (owner=0x%x)", lwmutex, old);
|
||||
}
|
||||
|
|
@ -592,7 +592,7 @@ s32 sys_lwcond_wait(PPUThread& CPU, vm::ptr<sys_lwcond_t> lwcond, u64 timeout)
|
|||
const auto old = lwmutex->owner.exchange(tid);
|
||||
lwmutex->recursive_count = recursive_value;
|
||||
|
||||
if (old.data() != se32(lwmutex_reserved))
|
||||
if (old.data() != se32(lwmutex_reserved) && !Emu.IsStopped())
|
||||
{
|
||||
sysPrxForUser.Fatal("sys_lwcond_wait(lwcond=*0x%x): locking failed (lwmutex->owner=0x%x)", lwcond, old);
|
||||
}
|
||||
|
|
@ -621,7 +621,7 @@ s32 sys_lwcond_wait(PPUThread& CPU, vm::ptr<sys_lwcond_t> lwcond, u64 timeout)
|
|||
const auto old = lwmutex->owner.exchange(tid);
|
||||
lwmutex->recursive_count = recursive_value;
|
||||
|
||||
if (old.data() != se32(lwmutex_reserved))
|
||||
if (old.data() != se32(lwmutex_reserved) && !Emu.IsStopped())
|
||||
{
|
||||
sysPrxForUser.Fatal("sys_lwcond_wait(lwcond=*0x%x): locking failed after timeout (lwmutex->owner=0x%x)", lwcond, old);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -30,15 +30,27 @@ s32 sys_process_getppid()
|
|||
return 0;
|
||||
}
|
||||
|
||||
s32 sys_process_exit(s32 errorcode)
|
||||
s32 sys_process_exit(s32 status)
|
||||
{
|
||||
sys_process.Warning("sys_process_exit(%d)", errorcode);
|
||||
Emu.Pause();
|
||||
sys_process.Warning("sys_process_exit(status=0x%x)", status);
|
||||
|
||||
LV2_LOCK;
|
||||
|
||||
if (!Emu.IsStopped())
|
||||
{
|
||||
sys_process.Success("Process finished");
|
||||
|
||||
CallAfter([]()
|
||||
{
|
||||
Emu.Stop();
|
||||
});
|
||||
|
||||
while (!Emu.IsStopped())
|
||||
{
|
||||
std::this_thread::sleep_for(std::chrono::milliseconds(1));
|
||||
}
|
||||
}
|
||||
|
||||
return CELL_OK;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -39,6 +39,8 @@ static const std::string& BreakPointsDBName = "BreakPoints.dat";
|
|||
static const u16 bpdb_version = 0x1000;
|
||||
extern std::atomic<u32> g_thread_count;
|
||||
|
||||
extern void finalize_ppu_exec_map();
|
||||
|
||||
Emulator::Emulator()
|
||||
: m_status(Stopped)
|
||||
, m_mode(DisAsm)
|
||||
|
|
@ -98,40 +100,41 @@ void Emulator::SetTitle(const std::string& title)
|
|||
|
||||
void Emulator::CheckStatus()
|
||||
{
|
||||
//auto& threads = GetCPU().GetThreads();
|
||||
//auto threads = GetCPU().GetThreads();
|
||||
|
||||
//if (!threads.size())
|
||||
//{
|
||||
// Stop();
|
||||
// return;
|
||||
//}
|
||||
|
||||
//bool IsAllPaused = true;
|
||||
//for (u32 i = 0; i < threads.size(); ++i)
|
||||
//bool AllPaused = true;
|
||||
|
||||
//for (auto& t : threads)
|
||||
//{
|
||||
// if (threads[i]->IsPaused()) continue;
|
||||
// IsAllPaused = false;
|
||||
// if (t->IsPaused()) continue;
|
||||
// AllPaused = false;
|
||||
// break;
|
||||
//}
|
||||
|
||||
//if(IsAllPaused)
|
||||
//if (AllPaused)
|
||||
//{
|
||||
// //ConLog.Warning("all paused!");
|
||||
// Pause();
|
||||
// return;
|
||||
//}
|
||||
|
||||
//bool IsAllStoped = true;
|
||||
//for (u32 i = 0; i < threads.size(); ++i)
|
||||
//bool AllStopped = true;
|
||||
|
||||
//for (auto& t : threads)
|
||||
//{
|
||||
// if (threads[i]->IsStopped()) continue;
|
||||
// IsAllStoped = false;
|
||||
// if (t->IsStopped()) continue;
|
||||
// AllStopped = false;
|
||||
// break;
|
||||
//}
|
||||
|
||||
//if (IsAllStoped)
|
||||
//if (AllStopped)
|
||||
//{
|
||||
// //LOG_WARNING(GENERAL, "all stoped!");
|
||||
// Pause(); //Stop();
|
||||
// Pause();
|
||||
//}
|
||||
}
|
||||
|
||||
|
|
@ -327,8 +330,18 @@ void Emulator::Stop()
|
|||
if(IsStopped()) return;
|
||||
|
||||
SendDbgCommand(DID_STOP_EMU);
|
||||
|
||||
m_status = Stopped;
|
||||
|
||||
{
|
||||
auto threads = GetCPU().GetThreads();
|
||||
|
||||
for (auto& t : threads)
|
||||
{
|
||||
t->AddEvent(CPU_EVENT_STOP);
|
||||
}
|
||||
}
|
||||
|
||||
while (g_thread_count)
|
||||
{
|
||||
std::this_thread::sleep_for(std::chrono::milliseconds(1));
|
||||
|
|
@ -371,6 +384,8 @@ void Emulator::Stop()
|
|||
CurGameInfo.Reset();
|
||||
Memory.Close();
|
||||
|
||||
finalize_ppu_exec_map();
|
||||
|
||||
SendDbgCommand(DID_STOPPED_EMU);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -437,9 +437,11 @@ void MainFrame::Config(wxCommandEvent& WXUNUSED(event))
|
|||
wxCheckBox* chbox_dbg_ap_functioncall = new wxCheckBox(p_hle, wxID_ANY, "Auto Pause at Function Call");
|
||||
|
||||
cbox_cpu_decoder->Append("PPU Interpreter");
|
||||
cbox_cpu_decoder->Append("PPU Interpreter 2");
|
||||
cbox_cpu_decoder->Append("PPU JIT (LLVM)");
|
||||
|
||||
cbox_spu_decoder->Append("SPU Interpreter");
|
||||
cbox_spu_decoder->Append("SPU Interpreter 2");
|
||||
cbox_spu_decoder->Append("SPU JIT (ASMJIT)");
|
||||
|
||||
cbox_gs_render->Append("Null");
|
||||
|
|
@ -531,8 +533,8 @@ void MainFrame::Config(wxCommandEvent& WXUNUSED(event))
|
|||
chbox_dbg_ap_systemcall ->SetValue(Ini.DBGAutoPauseSystemCall.GetValue());
|
||||
chbox_dbg_ap_functioncall->SetValue(Ini.DBGAutoPauseFunctionCall.GetValue());
|
||||
|
||||
cbox_cpu_decoder ->SetSelection(Ini.CPUDecoderMode.GetValue() ? Ini.CPUDecoderMode.GetValue() - 1 : 0);
|
||||
cbox_spu_decoder ->SetSelection(Ini.SPUDecoderMode.GetValue() ? Ini.SPUDecoderMode.GetValue() - 1 : 0);
|
||||
cbox_cpu_decoder ->SetSelection(Ini.CPUDecoderMode.GetValue() ? Ini.CPUDecoderMode.GetValue() : 0);
|
||||
cbox_spu_decoder ->SetSelection(Ini.SPUDecoderMode.GetValue() ? Ini.SPUDecoderMode.GetValue() : 0);
|
||||
cbox_gs_render ->SetSelection(Ini.GSRenderMode.GetValue());
|
||||
cbox_gs_resolution ->SetSelection(ResolutionIdToNum(Ini.GSResolution.GetValue()) - 1);
|
||||
cbox_gs_aspect ->SetSelection(Ini.GSAspectRatio.GetValue() - 1);
|
||||
|
|
@ -632,8 +634,8 @@ void MainFrame::Config(wxCommandEvent& WXUNUSED(event))
|
|||
|
||||
if(diag.ShowModal() == wxID_OK)
|
||||
{
|
||||
Ini.CPUDecoderMode.SetValue(cbox_cpu_decoder->GetSelection() + 1);
|
||||
Ini.SPUDecoderMode.SetValue(cbox_spu_decoder->GetSelection() + 1);
|
||||
Ini.CPUDecoderMode.SetValue(cbox_cpu_decoder->GetSelection());
|
||||
Ini.SPUDecoderMode.SetValue(cbox_spu_decoder->GetSelection());
|
||||
Ini.GSRenderMode.SetValue(cbox_gs_render->GetSelection());
|
||||
Ini.GSResolution.SetValue(ResolutionNumToId(cbox_gs_resolution->GetSelection() + 1));
|
||||
Ini.GSAspectRatio.SetValue(cbox_gs_aspect->GetSelection() + 1);
|
||||
|
|
|
|||
|
|
@ -247,8 +247,8 @@ public:
|
|||
void Load()
|
||||
{
|
||||
// Core
|
||||
CPUDecoderMode.Load(1);
|
||||
SPUDecoderMode.Load(1);
|
||||
CPUDecoderMode.Load(0);
|
||||
SPUDecoderMode.Load(0);
|
||||
|
||||
// Graphics
|
||||
GSRenderMode.Load(1);
|
||||
|
|
|
|||
|
|
@ -16,6 +16,9 @@
|
|||
|
||||
using namespace PPU_instr;
|
||||
|
||||
extern void initialize_ppu_exec_map();
|
||||
extern void fill_ppu_exec_map(u32 addr, u32 size);
|
||||
|
||||
namespace loader
|
||||
{
|
||||
namespace handlers
|
||||
|
|
@ -547,6 +550,16 @@ namespace loader
|
|||
main_thread.args({ Emu.GetPath()/*, "-emu"*/ }).run();
|
||||
main_thread.gpr(11, OPD.addr()).gpr(12, Emu.GetMallocPageSize());
|
||||
|
||||
initialize_ppu_exec_map();
|
||||
|
||||
for (u32 page = 0; page < 0x20000000; page += 4096)
|
||||
{
|
||||
if (vm::check_addr(page, 4096))
|
||||
{
|
||||
fill_ppu_exec_map(page, 4096);
|
||||
}
|
||||
}
|
||||
|
||||
return ok;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -37,6 +37,8 @@
|
|||
<ClCompile Include="..\Utilities\SSemaphore.cpp" />
|
||||
<ClCompile Include="..\Utilities\StrFmt.cpp" />
|
||||
<ClCompile Include="..\Utilities\Thread.cpp" />
|
||||
<ClCompile Include="Emu\Cell\PPUInterpreter.cpp" />
|
||||
<ClCompile Include="Emu\Cell\SPUInterpreter.cpp" />
|
||||
<ClCompile Include="Emu\RSX\CgBinaryFragmentProgram.cpp" />
|
||||
<ClCompile Include="Emu\RSX\CgBinaryVertexProgram.cpp" />
|
||||
<ClCompile Include="Emu\SysCalls\lv2\sys_fs.cpp" />
|
||||
|
|
@ -366,6 +368,7 @@
|
|||
<ClInclude Include="Emu\Cell\PPUDisAsm.h" />
|
||||
<ClInclude Include="Emu\Cell\PPUInstrTable.h" />
|
||||
<ClInclude Include="Emu\Cell\PPUInterpreter.h" />
|
||||
<ClInclude Include="Emu\Cell\PPUInterpreter2.h" />
|
||||
<ClInclude Include="Emu\Cell\PPUOpcodes.h" />
|
||||
<ClInclude Include="Emu\Cell\PPUThread.h" />
|
||||
<ClInclude Include="Emu\Cell\RawSPUThread.h" />
|
||||
|
|
@ -374,6 +377,7 @@
|
|||
<ClInclude Include="Emu\Cell\SPUDisAsm.h" />
|
||||
<ClInclude Include="Emu\Cell\SPUInstrTable.h" />
|
||||
<ClInclude Include="Emu\Cell\SPUInterpreter.h" />
|
||||
<ClInclude Include="Emu\Cell\SPUInterpreter2.h" />
|
||||
<ClInclude Include="Emu\Cell\SPUOpcodes.h" />
|
||||
<ClInclude Include="Emu\Cell\SPURecompiler.h" />
|
||||
<ClInclude Include="Emu\Cell\SPURSManager.h" />
|
||||
|
|
|
|||
|
|
@ -860,6 +860,12 @@
|
|||
<ClCompile Include="Emu\SysCalls\Modules\cellFs.cpp">
|
||||
<Filter>Emu\SysCalls\Modules</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="Emu\Cell\PPUInterpreter.cpp">
|
||||
<Filter>Emu\CPU\Cell</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="Emu\Cell\SPUInterpreter.cpp">
|
||||
<Filter>Emu\CPU\Cell</Filter>
|
||||
</ClCompile>
|
||||
</ItemGroup>
|
||||
<ItemGroup>
|
||||
<ClInclude Include="Crypto\aes.h">
|
||||
|
|
@ -1543,5 +1549,11 @@
|
|||
<ClInclude Include="Emu\SysCalls\Modules\cellFs.h">
|
||||
<Filter>Emu\SysCalls\Modules</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="Emu\Cell\PPUInterpreter2.h">
|
||||
<Filter>Emu\CPU\Cell</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="Emu\Cell\SPUInterpreter2.h">
|
||||
<Filter>Emu\CPU\Cell</Filter>
|
||||
</ClInclude>
|
||||
</ItemGroup>
|
||||
</Project>
|
||||
Loading…
Reference in New Issue