mirror of https://github.com/RPCS3/rpcs3.git
SPU LLVM: Additional FCGT optimizations
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@ -7350,17 +7350,32 @@ public:
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{
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{
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v128 data = get_const_vector(cv, m_pos, 5000);
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v128 data = get_const_vector(cv, m_pos, 5000);
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bool safe_int_compare = true;
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bool safe_int_compare = true;
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bool safe_simple_compare = true;
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for (u32 i = 0; i < 4; i++)
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for (u32 i = 0; i < 4; i++)
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{
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{
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const u32 exponent = data._u32[i] & 0x7f800000u;
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const u32 exponent = data._u32[i] & 0x7f800000u;
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const u32 sign_bit = data._u32[i] & 0x80000000u;
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const u32 absolute_float_bits = data._u32[i] & 0x7fffffffu;
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if (data._u32[i] >= 0x7f7fffffu || !exponent)
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if (data._u32[i] >= 0x7f7fffffu || !exponent)
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{
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{
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// Postive or negative zero, Denormal (treated as zero), Negative constant, or Normalized number with exponent +127
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// Postive or negative zero, Denormal (treated as zero), Negative constant, or Normalized number with exponent +127
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// Cannot used signed integer compare safely
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// Cannot used signed integer compare safely
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// Note: Technically this optimization is accurate for any positive value, but due to the fact that
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// we don't produce "extended range" values the same way as real hardware, it's not safe to apply
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// this optimization for values outside of the range of x86 floating point hardware.
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safe_int_compare = false;
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safe_int_compare = false;
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break;
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}
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if (absolute_float_bits < 0x7f7fffffu)
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{
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// Zero or a float in normalized range for x86
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continue;
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}
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else
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{
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safe_simple_compare = false;
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}
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}
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}
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}
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@ -7369,6 +7384,12 @@ public:
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set_vr(op.rt, sext<s32[4]>(bitcast<s32[4]>(a) > bitcast<s32[4]>(b)));
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set_vr(op.rt, sext<s32[4]>(bitcast<s32[4]>(a) > bitcast<s32[4]>(b)));
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return;
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return;
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}
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}
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if (safe_simple_compare)
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{
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set_vr(op.rt, sext<s32[4]>(fcmp_uno(a > b)));
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return;
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}
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}
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}
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if (auto cv = llvm::dyn_cast<llvm::Constant>(a.value))
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if (auto cv = llvm::dyn_cast<llvm::Constant>(a.value))
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