diff --git a/rpcs3/Emu/Cell/SPUThread.cpp b/rpcs3/Emu/Cell/SPUThread.cpp index 37a9c1ec01..48d68d2f17 100644 --- a/rpcs3/Emu/Cell/SPUThread.cpp +++ b/rpcs3/Emu/Cell/SPUThread.cpp @@ -117,13 +117,15 @@ namespace spu std::array, 65536> atomic_instruction_table = {}; constexpr u32 native_jiffy_duration_us = 1500; //About 1ms resolution with a half offset - void acquire_pc_address(u32 pc, u32 timeout_ms = 3) + void acquire_pc_address(spu_thread& spu, u32 pc, u32 timeout_ms = 3) { const u8 max_concurrent_instructions = (u8)g_cfg.core.preferred_spu_threads; const u32 pc_offset = pc >> 2; if (atomic_instruction_table[pc_offset].load(std::memory_order_consume) >= max_concurrent_instructions) { + spu.state += cpu_flag::wait; + if (timeout_ms > 0) { const u64 timeout = timeout_ms * 1000u; //convert to microseconds @@ -150,6 +152,11 @@ namespace spu const auto count = atomic_instruction_table[pc_offset].load(std::memory_order_consume) * 100ull; busy_wait(count); } + + if (spu.test_stopped()) + { + spu_runtime::g_escape(&spu); + } } atomic_instruction_table[pc_offset]++; @@ -172,7 +179,7 @@ namespace spu { if (g_cfg.core.preferred_spu_threads > 0) { - acquire_pc_address(pc, (u32)g_cfg.core.spu_delay_penalty); + acquire_pc_address(spu, pc, (u32)g_cfg.core.spu_delay_penalty); active = true; } } diff --git a/rpcs3/Emu/System.cpp b/rpcs3/Emu/System.cpp index 29e86d1628..1d68c4db70 100644 --- a/rpcs3/Emu/System.cpp +++ b/rpcs3/Emu/System.cpp @@ -942,12 +942,6 @@ void Emulator::Load(const std::string& title_id, bool add_only, bool force_globa LOG_WARNING(GENERAL, "TSX forced by User"); } - if (g_use_rtm && g_cfg.core.preferred_spu_threads) - { - g_cfg.core.preferred_spu_threads.set(0); - LOG_ERROR(GENERAL, "Preferred SPU Threads forcefully disabled - not compatible with TSX in this version."); - } - // Load patches from different locations fxm::check_unlocked()->append(fs::get_config_dir() + "data/" + m_title_id + "/patch.yml");