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remove SH4_FLAG_SET_T

This commit is contained in:
Anthony Pesch 2016-12-30 14:39:30 -08:00
parent 65d7187d9d
commit d658bb2bfe
2 changed files with 37 additions and 38 deletions
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5
src/jit/frontend/sh4/sh4_disasm.h
View File

@ -10,9 +10,8 @@ enum {
SH4_FLAG_BRANCH = 0x4,
SH4_FLAG_CONDITIONAL = 0x8,
SH4_FLAG_DELAYED = 0x10,
SH4_FLAG_SET_T = 0x20,
SH4_FLAG_SET_FPSCR = 0x40,
SH4_FLAG_SET_SR = 0x80,
SH4_FLAG_SET_FPSCR = 0x20,
SH4_FLAG_SET_SR = 0x40,
};
enum sh4_op {

70
src/jit/frontend/sh4/sh4_instr.inc
View File

@ -49,23 +49,23 @@ SH4_INSTR(XTRCT, "xtrct rm, rn", 0010nnnnmmmm1101, 1, 0)
// arithmetric operation instructions
SH4_INSTR(ADD, "add rm, rn", 0011nnnnmmmm1100, 1, 0)
SH4_INSTR(ADDI, "add #imm8, rn", 0111nnnniiiiiiii, 1, 0)
SH4_INSTR(ADDC, "addc rm, rn", 0011nnnnmmmm1110, 1, SH4_FLAG_SET_T)
SH4_INSTR(ADDV, "addv rm, rn", 0011nnnnmmmm1111, 1, SH4_FLAG_SET_T)
SH4_INSTR(CMPEQI, "cmp/eq #imm8, r0", 10001000iiiiiiii, 1, SH4_FLAG_SET_T)
SH4_INSTR(CMPEQ, "cmp/eq rm, rn", 0011nnnnmmmm0000, 1, SH4_FLAG_SET_T)
SH4_INSTR(CMPHS, "cmp/hs rm, rn", 0011nnnnmmmm0010, 1, SH4_FLAG_SET_T)
SH4_INSTR(CMPGE, "cmp/ge rm, rn", 0011nnnnmmmm0011, 1, SH4_FLAG_SET_T)
SH4_INSTR(CMPHI, "cmp/hi rm, rn", 0011nnnnmmmm0110, 1, SH4_FLAG_SET_T)
SH4_INSTR(CMPGT, "cmp/gt rm, rn", 0011nnnnmmmm0111, 1, SH4_FLAG_SET_T)
SH4_INSTR(CMPPZ, "cmp/pz rn", 0100nnnn00010001, 1, SH4_FLAG_SET_T)
SH4_INSTR(CMPPL, "cmp/pl rn", 0100nnnn00010101, 1, SH4_FLAG_SET_T)
SH4_INSTR(CMPSTR, "cmp/str rm, rn", 0010nnnnmmmm1100, 1, SH4_FLAG_SET_T)
SH4_INSTR(DIV0S, "div0s rm, rn", 0010nnnnmmmm0111, 1, SH4_FLAG_SET_T)
SH4_INSTR(DIV0U, "div0u", 0000000000011001, 1, SH4_FLAG_SET_T)
SH4_INSTR(DIV1, "div1 rm, rn", 0011nnnnmmmm0100, 1, SH4_FLAG_SET_T)
SH4_INSTR(ADDC, "addc rm, rn", 0011nnnnmmmm1110, 1, 0)
SH4_INSTR(ADDV, "addv rm, rn", 0011nnnnmmmm1111, 1, 0)
SH4_INSTR(CMPEQI, "cmp/eq #imm8, r0", 10001000iiiiiiii, 1, 0)
SH4_INSTR(CMPEQ, "cmp/eq rm, rn", 0011nnnnmmmm0000, 1, 0)
SH4_INSTR(CMPHS, "cmp/hs rm, rn", 0011nnnnmmmm0010, 1, 0)
SH4_INSTR(CMPGE, "cmp/ge rm, rn", 0011nnnnmmmm0011, 1, 0)
SH4_INSTR(CMPHI, "cmp/hi rm, rn", 0011nnnnmmmm0110, 1, 0)
SH4_INSTR(CMPGT, "cmp/gt rm, rn", 0011nnnnmmmm0111, 1, 0)
SH4_INSTR(CMPPZ, "cmp/pz rn", 0100nnnn00010001, 1, 0)
SH4_INSTR(CMPPL, "cmp/pl rn", 0100nnnn00010101, 1, 0)
SH4_INSTR(CMPSTR, "cmp/str rm, rn", 0010nnnnmmmm1100, 1, 0)
SH4_INSTR(DIV0S, "div0s rm, rn", 0010nnnnmmmm0111, 1, 0)
SH4_INSTR(DIV0U, "div0u", 0000000000011001, 1, 0)
SH4_INSTR(DIV1, "div1 rm, rn", 0011nnnnmmmm0100, 1, 0)
SH4_INSTR(DMULS, "dmuls.l rm, rn", 0011nnnnmmmm1101, 2, 0)
SH4_INSTR(DMULU, "dmulu.l rm, rn", 0011nnnnmmmm0101, 2, 0)
SH4_INSTR(DT, "dt rn", 0100nnnn00010000, 1, SH4_FLAG_SET_T)
SH4_INSTR(DT, "dt rn", 0100nnnn00010000, 1, 0)
SH4_INSTR(EXTSB, "exts.b rm, rn", 0110nnnnmmmm1110, 1, 0)
SH4_INSTR(EXTSW, "exts.w rm, rn", 0110nnnnmmmm1111, 1, 0)
SH4_INSTR(EXTUB, "extu.b rm, rn", 0110nnnnmmmm1100, 1, 0)
@ -76,10 +76,10 @@ SH4_INSTR(MULL, "mul.l rm, rn", 0000nnnnmmmm0111, 2, 0)
SH4_INSTR(MULS, "muls rm, rn", 0010nnnnmmmm1111, 2, 0)
SH4_INSTR(MULU, "mulu rm, rn", 0010nnnnmmmm1110, 2, 0)
SH4_INSTR(NEG, "neg rm, rn", 0110nnnnmmmm1011, 1, 0)
SH4_INSTR(NEGC, "negc rm, rn", 0110nnnnmmmm1010, 1, SH4_FLAG_SET_T)
SH4_INSTR(NEGC, "negc rm, rn", 0110nnnnmmmm1010, 1, 0)
SH4_INSTR(SUB, "sub rm, rn", 0011nnnnmmmm1000, 1, 0)
SH4_INSTR(SUBC, "subc rm, rn", 0011nnnnmmmm1010, 1, SH4_FLAG_SET_T)
SH4_INSTR(SUBV, "subv rm, rn", 0011nnnnmmmm1011, 1, SH4_FLAG_SET_T)
SH4_INSTR(SUBC, "subc rm, rn", 0011nnnnmmmm1010, 1, 0)
SH4_INSTR(SUBV, "subv rm, rn", 0011nnnnmmmm1011, 1, 0)
// logic operation instructions
@ -90,26 +90,26 @@ SH4_INSTR(NOT, "not rm, rn", 0110nnnnmmmm0111, 1, 0)
SH4_INSTR(OR, "or rm, rn", 0010nnnnmmmm1011, 1, 0)
SH4_INSTR(ORI, "or #imm8, r0", 11001011iiiiiiii, 1, 0)
SH4_INSTR(ORB, "or.b #imm8, @(r0,gbr)", 11001111iiiiiiii, 4, SH4_FLAG_STORE)
SH4_INSTR(TAS, "tas.b @rn", 0100nnnn00011011, 5, SH4_FLAG_LOAD | SH4_FLAG_SET_T)
SH4_INSTR(TST, "tst rm, rn", 0010nnnnmmmm1000, 1, SH4_FLAG_SET_T)
SH4_INSTR(TSTI, "tst #imm8, r0", 11001000iiiiiiii, 1, SH4_FLAG_SET_T)
SH4_INSTR(TSTB, "tst.b #imm8, @(r0,gbr)", 11001100iiiiiiii, 3, SH4_FLAG_STORE | SH4_FLAG_SET_T)
SH4_INSTR(TAS, "tas.b @rn", 0100nnnn00011011, 5, SH4_FLAG_LOAD)
SH4_INSTR(TST, "tst rm, rn", 0010nnnnmmmm1000, 1, 0)
SH4_INSTR(TSTI, "tst #imm8, r0", 11001000iiiiiiii, 1, 0)
SH4_INSTR(TSTB, "tst.b #imm8, @(r0,gbr)", 11001100iiiiiiii, 3, SH4_FLAG_STORE)
SH4_INSTR(XOR, "xor rm, rn", 0010nnnnmmmm1010, 1, 0)
SH4_INSTR(XORI, "xor #imm8, r0", 11001010iiiiiiii, 1, 0)
SH4_INSTR(XORB, "xor.b #imm8, @(r0,gbr)", 11001110iiiiiiii, 4, SH4_FLAG_STORE)
// shift instructions
SH4_INSTR(ROTL, "rotl rn", 0100nnnn00000100, 1, SH4_FLAG_SET_T)
SH4_INSTR(ROTR, "rotr rn", 0100nnnn00000101, 1, SH4_FLAG_SET_T)
SH4_INSTR(ROTCL, "rotcl rn", 0100nnnn00100100, 1, SH4_FLAG_SET_T)
SH4_INSTR(ROTCR, "rotcr rn", 0100nnnn00100101, 1, SH4_FLAG_SET_T)
SH4_INSTR(ROTL, "rotl rn", 0100nnnn00000100, 1, 0)
SH4_INSTR(ROTR, "rotr rn", 0100nnnn00000101, 1, 0)
SH4_INSTR(ROTCL, "rotcl rn", 0100nnnn00100100, 1, 0)
SH4_INSTR(ROTCR, "rotcr rn", 0100nnnn00100101, 1, 0)
SH4_INSTR(SHAD, "shad rm, rn", 0100nnnnmmmm1100, 1, 0)
SH4_INSTR(SHAL, "shal rn", 0100nnnn00100000, 1, SH4_FLAG_SET_T)
SH4_INSTR(SHAR, "shar rn", 0100nnnn00100001, 1, SH4_FLAG_SET_T)
SH4_INSTR(SHAL, "shal rn", 0100nnnn00100000, 1, 0)
SH4_INSTR(SHAR, "shar rn", 0100nnnn00100001, 1, 0)
SH4_INSTR(SHLD, "shld rm, rn", 0100nnnnmmmm1101, 1, 0)
SH4_INSTR(SHLL, "shll rn", 0100nnnn00000000, 1, SH4_FLAG_SET_T)
SH4_INSTR(SHLR, "shlr rn", 0100nnnn00000001, 1, SH4_FLAG_SET_T)
SH4_INSTR(SHLL, "shll rn", 0100nnnn00000000, 1, 0)
SH4_INSTR(SHLR, "shlr rn", 0100nnnn00000001, 1, 0)
SH4_INSTR(SHLL2, "shll2 rn", 0100nnnn00001000, 1, 0)
SH4_INSTR(SHLR2, "shlr2 rn", 0100nnnn00001001, 1, 0)
SH4_INSTR(SHLL8, "shll8 rn", 0100nnnn00011000, 1, 0)
@ -137,7 +137,7 @@ SH4_INSTR(RTS, "rts", 0000000000001011, 2, SH4_FLAG_
// system control instructions
SH4_INSTR(CLRMAC, "clrmac", 0000000000101000, 1, 0)
SH4_INSTR(CLRS, "clrs", 0000000001001000, 1, 0)
SH4_INSTR(CLRT, "clrt", 0000000000001000, 1, SH4_FLAG_SET_T)
SH4_INSTR(CLRT, "clrt", 0000000000001000, 1, 0)
SH4_INSTR(LDCSR, "ldc rm, sr", 0100mmmm00001110, 4, SH4_FLAG_SET_SR)
SH4_INSTR(LDCGBR, "ldc rm, gbr", 0100mmmm00011110, 3, 0)
SH4_INSTR(LDCVBR, "ldc rm, vbr", 0100mmmm00101110, 1, 0)
@ -164,9 +164,9 @@ SH4_INSTR(OCBI, "ocbi", 0000nnnn10010011, 1, 0)
SH4_INSTR(OCBP, "ocbp", 0000nnnn10100011, 1, 0)
SH4_INSTR(OCBWB, "ocbwb", 0000nnnn10110011, 1, 0)
SH4_INSTR(PREF, "pref @rn", 0000nnnn10000011, 1, SH4_FLAG_STORE)
SH4_INSTR(RTE, "rte", 0000000000101011, 5, SH4_FLAG_BRANCH | SH4_FLAG_DELAYED)
SH4_INSTR(RTE, "rte", 0000000000101011, 5, SH4_FLAG_BRANCH | SH4_FLAG_DELAYED | SH4_FLAG_SET_SR)
SH4_INSTR(SETS, "sets", 0000000001011000, 1, 0)
SH4_INSTR(SETT, "sett", 0000000000011000, 1, SH4_FLAG_SET_T)
SH4_INSTR(SETT, "sett", 0000000000011000, 1, 0)
SH4_INSTR(SLEEP, "sleep", 0000000000011011, 4, 0)
SH4_INSTR(STCSR, "stc sr, rn", 0000nnnn00000010, 2, 0)
SH4_INSTR(STCGBR, "stc gbr, rn", 0000nnnn00010010, 2, 0)
@ -208,8 +208,8 @@ SH4_INSTR(FSTS, "fsts fpul, frn", 1111nnnn00001101, 1, 0)
SH4_INSTR(FABS, "fabs frn", 1111nnnn01011101, 1, 0)
SH4_INSTR(FSRRA, "fsrra frn", 1111nnnn01111101, 1, 0)
SH4_INSTR(FADD, "fadd frm, frn", 1111nnnnmmmm0000, 1, 0)
SH4_INSTR(FCMPEQ, "fcmp/eq frm, frn", 1111nnnnmmmm0100, 2, SH4_FLAG_SET_T)
SH4_INSTR(FCMPGT, "fcmp/gt frm, frn", 1111nnnnmmmm0101, 2, SH4_FLAG_SET_T)
SH4_INSTR(FCMPEQ, "fcmp/eq frm, frn", 1111nnnnmmmm0100, 2, 0)
SH4_INSTR(FCMPGT, "fcmp/gt frm, frn", 1111nnnnmmmm0101, 2, 0)
SH4_INSTR(FDIV, "fdiv frm, frn", 1111nnnnmmmm0011, 1, 0)
SH4_INSTR(FLOAT, "float fpul, frn", 1111nnnn00101101, 1, 0)
SH4_INSTR(FMAC, "fmac fr0, frm, frn", 1111nnnnmmmm1110, 1, 0)