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disable unused aica regs

This commit is contained in:
Anthony Pesch 2016-01-24 15:24:05 -08:00
parent 57944b3ceb
commit 631a23c11f
5 changed files with 29 additions and 29 deletions
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22
src/hw/aica/aica.cc
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@ -8,7 +8,7 @@ using namespace dvm::hw::holly;
AICA::AICA(Dreamcast *dc) : dc_(dc) {} AICA::AICA(Dreamcast *dc) : dc_(dc) {}
bool AICA::Init() { bool AICA::Init() {
aica_regs_ = dc_->aica_regs(); // aica_regs_ = dc_->aica_regs();
wave_ram_ = dc_->wave_ram(); wave_ram_ = dc_->wave_ram();
return true; return true;
@ -27,17 +27,17 @@ bool AICA::Init() {
// return cycles; // return cycles;
// } // }
uint32_t AICA::ReadRegister(void *ctx, uint32_t addr) { // uint32_t AICA::ReadRegister(void *ctx, uint32_t addr) {
AICA *self = reinterpret_cast<AICA *>(ctx); // AICA *self = reinterpret_cast<AICA *>(ctx);
// LOG_INFO("AICA::ReadRegister32 0x%x", addr); // // LOG_INFO("AICA::ReadRegister32 0x%x", addr);
return dvm::load<uint32_t>(&self->aica_regs_[addr]); // return dvm::load<uint32_t>(&self->aica_regs_[addr]);
} // }
void AICA::WriteRegister(void *ctx, uint32_t addr, uint32_t value) { // void AICA::WriteRegister(void *ctx, uint32_t addr, uint32_t value) {
AICA *self = reinterpret_cast<AICA *>(ctx); // AICA *self = reinterpret_cast<AICA *>(ctx);
// LOG_INFO("AICA::WriteRegister32 0x%x", addr); // // LOG_INFO("AICA::WriteRegister32 0x%x", addr);
dvm::store(&self->aica_regs_[addr], value); // dvm::store(&self->aica_regs_[addr], value);
} // }
uint32_t AICA::ReadWave(void *ctx, uint32_t addr) { uint32_t AICA::ReadWave(void *ctx, uint32_t addr) {
AICA *self = reinterpret_cast<AICA *>(ctx); AICA *self = reinterpret_cast<AICA *>(ctx);

6
src/hw/aica/aica.h
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@ -15,15 +15,15 @@ class AICA {
bool Init(); bool Init();
static uint32_t ReadRegister(void *ctx, uint32_t addr); // static uint32_t ReadRegister(void *ctx, uint32_t addr);
static void WriteRegister(void *ctx, uint32_t addr, uint32_t value); // static void WriteRegister(void *ctx, uint32_t addr, uint32_t value);
static uint32_t ReadWave(void *ctx, uint32_t addr); static uint32_t ReadWave(void *ctx, uint32_t addr);
static void WriteWave(void *ctx, uint32_t addr, uint32_t value); static void WriteWave(void *ctx, uint32_t addr, uint32_t value);
private: private:
hw::Dreamcast *dc_; hw::Dreamcast *dc_;
uint8_t *aica_regs_; // uint8_t *aica_regs_;
uint8_t *wave_ram_; uint8_t *wave_ram_;
}; };
} }

24
src/hw/dreamcast.cc
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@ -155,16 +155,16 @@ bool Dreamcast::MapMemory() {
nullptr, nullptr,
&PVR2::WriteRegister, &PVR2::WriteRegister,
nullptr); nullptr);
RegionHandle aica_reg_handle = memory_->AllocRegion( // RegionHandle aica_reg_handle = memory_->AllocRegion(
AICA_REG_START, AICA_REG_SIZE, aica(), // AICA_REG_START, AICA_REG_SIZE, aica(),
nullptr, // nullptr,
nullptr, // nullptr,
&AICA::ReadRegister, // &AICA::ReadRegister,
nullptr, // nullptr,
nullptr, // nullptr,
nullptr, // nullptr,
&AICA::WriteRegister, // &AICA::WriteRegister,
nullptr); // nullptr);
RegionHandle wave_ram_handle = memory_->AllocRegion( RegionHandle wave_ram_handle = memory_->AllocRegion(
WAVE_RAM_START, WAVE_RAM_SIZE, aica(), WAVE_RAM_START, WAVE_RAM_SIZE, aica(),
nullptr, nullptr,
@ -248,7 +248,7 @@ bool Dreamcast::MapMemory() {
memmap.Mount(a7_handle, AREA7_SIZE, AREA7_START); memmap.Mount(a7_handle, AREA7_SIZE, AREA7_START);
memmap.Mount(holly_handle, HOLLY_REG_SIZE, HOLLY_REG_START); memmap.Mount(holly_handle, HOLLY_REG_SIZE, HOLLY_REG_START);
memmap.Mount(pvr_reg_handle, PVR_REG_SIZE, PVR_REG_START); memmap.Mount(pvr_reg_handle, PVR_REG_SIZE, PVR_REG_START);
memmap.Mount(aica_reg_handle, AICA_REG_SIZE, AICA_REG_START); // memmap.Mount(aica_reg_handle, AICA_REG_SIZE, AICA_REG_START);
memmap.Mount(wave_ram_handle, WAVE_RAM_SIZE, WAVE_RAM_START); memmap.Mount(wave_ram_handle, WAVE_RAM_SIZE, WAVE_RAM_START);
memmap.Mount(pvr_vram64_handle, PVR_VRAM64_SIZE, PVR_VRAM64_START); memmap.Mount(pvr_vram64_handle, PVR_VRAM64_SIZE, PVR_VRAM64_START);
memmap.Mount(ta_cmd_handle, TA_CMD_SIZE, TA_CMD_START); memmap.Mount(ta_cmd_handle, TA_CMD_SIZE, TA_CMD_START);
@ -282,7 +282,7 @@ bool Dreamcast::MapMemory() {
wave_ram_ = memory_->virtual_base() + WAVE_RAM_START; wave_ram_ = memory_->virtual_base() + WAVE_RAM_START;
palette_ram_ = memory_->virtual_base() + PVR_PALETTE_START; palette_ram_ = memory_->virtual_base() + PVR_PALETTE_START;
video_ram_ = memory_->virtual_base() + PVR_VRAM32_START; video_ram_ = memory_->virtual_base() + PVR_VRAM32_START;
aica_regs_ = memory_->virtual_base() + AICA_REG_START; // aica_regs_ = memory_->virtual_base() + AICA_REG_START;
ram_ = memory_->virtual_base() + MAIN_RAM_1_START; ram_ = memory_->virtual_base() + MAIN_RAM_1_START;
return true; return true;

4
src/hw/dreamcast.h
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@ -139,7 +139,7 @@ enum {
class Dreamcast { class Dreamcast {
public: public:
uint8_t *aica_regs() { return aica_regs_; } // uint8_t *aica_regs() { return aica_regs_; }
Register *holly_regs() { return holly_regs_; } Register *holly_regs() { return holly_regs_; }
Register *pvr_regs() { return pvr_regs_; } Register *pvr_regs() { return pvr_regs_; }
@ -192,7 +192,7 @@ class Dreamcast {
private: private:
bool MapMemory(); bool MapMemory();
uint8_t *aica_regs_; // uint8_t *aica_regs_;
uint8_t *bios_; uint8_t *bios_;
uint8_t *flash_; uint8_t *flash_;
uint8_t *palette_ram_; uint8_t *palette_ram_;

2
src/hw/sh4/sh4.cc
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@ -336,7 +336,7 @@ void SH4::WriteSQ(void *ctx, uint32_t addr, T value) {
uint32_t SH4::CompilePC() { uint32_t SH4::CompilePC() {
SH4CodeCache *code_cache = s_current_cpu->code_cache_; SH4CodeCache *code_cache = s_current_cpu->code_cache_;
SH4Context *ctx = &s_current_cpu->ctx_; SH4Context *ctx = &s_current_cpu->ctx_;
BlockEntry *block = code_cache->CompileBlock(ctx.pc, ctx); BlockEntry *block = code_cache->CompileBlock(ctx->pc, ctx);
return block->run(); return block->run();
} }