gcc compilation fixes

src/cpu/sh4.cc

@@ -104,6 +104,9 @@ void SH4::UnrequestInterrupt(Interrupt intr) {
   UpdatePendingInterrupts();
 }
 
+namespace dreavm {
+namespace cpu {
+
 // with OIX, bit 25, rather than bit 13, determines which 4kb bank to use
 #define CACHE_OFFSET(addr, OIX) \
   ((OIX ? ((addr & 0x2000000) >> 13) : ((addr & 0x2000) >> 1)) | (addr & 0xfff))
@@ -283,6 +286,9 @@ void SH4::WriteArea7(void *ctx, uint32_t addr, uint32_t value) {
   }
 }
 
+}
+}
+
 void SH4::InitMemory() {
   // mount internal cpu register area
   memory_.Handle(SH4_REG_START, SH4_REG_END, MIRROR_MASK, this,

src/holly/holly.cc

@@ -96,6 +96,9 @@ void Holly::UnrequestInterrupt(Interrupt intr) {
   ForwardRequestInterrupts();
 }
 
+namespace dreavm {
+namespace holly {
+
 template <typename T>
 T Holly::ReadRegister(void *ctx, uint32_t addr) {
   return static_cast<T>(ReadRegister<uint32_t>(ctx, addr));
@@ -213,6 +216,9 @@ void Holly::WriteRegister(void *ctx, uint32_t addr, uint32_t value) {
   }
 }
 
+}
+}
+
 void Holly::InitMemory() {
   memory_.Handle(HOLLY_REG_START, HOLLY_REG_END, MIRROR_MASK, this,
                  &Holly::ReadRegister<uint8_t>, &Holly::ReadRegister<uint16_t>,

src/holly/pvr2.cc

@@ -43,6 +43,9 @@ bool PVR2::Init(Backend *rb) {
 
 void PVR2::ToggleTracing() { ta_.ToggleTracing(); }
 
+namespace dreavm {
+namespace holly {
+
 // the dreamcast has 8MB of vram, split into two 4MB banks, with two ways of
 // accessing it:
 // 0x04000000 -> 0x047fffff, 32-bit sequential access
@@ -137,6 +140,9 @@ void PVR2::WriteRegister(void *ctx, uint32_t addr, uint32_t value) {
   }
 }
 
+}
+}
+
 void PVR2::InitMemory() {
   memory_.Mount(PVR_VRAM32_START, PVR_VRAM32_END, MIRROR_MASK, vram_);
   memory_.Handle(PVR_VRAM64_START, PVR_VRAM64_END, MIRROR_MASK, this,

src/holly/tile_accelerator.cc

@@ -410,6 +410,9 @@ void TileAccelerator::ToggleTracing() {
   }
 }
 
+namespace dreavm {
+namespace holly {
+
 template <typename T>
 void TileAccelerator::WriteCommand(void *ctx, uint32_t addr, T value) {
   WriteCommand<uint32_t>(ctx, addr, static_cast<uint32_t>(value));
@@ -439,6 +442,9 @@ void TileAccelerator::WriteTexture(void *ctx, uint32_t addr, uint32_t value) {
   *reinterpret_cast<uint32_t *>(&ta->pvr_.vram_[addr]) = value;
 }
 
+}
+}
+
 void TileAccelerator::InitMemory() {
   // TODO handle YUV transfers from 0x10800000 - 0x10ffffe0
   memory_.Handle(TA_CMD_START, TA_CMD_END, 0x0, this, nullptr, nullptr, nullptr,

src/holly/tile_renderer.cc

@@ -753,7 +753,7 @@ TextureHandle TileRenderer::RegisterTexture(const TileContext *tactx,
   const uint8_t *codebook = texture;
   const uint8_t *index = input + codebook_size;
 
-  PixelFormat pixel_fmt;
+  PixelFormat pixel_fmt = PXL_INVALID;
   switch (tcw.pixel_format) {
     case TA_PIXEL_1555:
       output = converted;

src/renderer/backend.h

@@ -19,7 +19,8 @@ enum Framebuffer {  //
 };
 
 enum PixelFormat {
-  PXL_RGBA5551,  //
+  PXL_INVALID,
+  PXL_RGBA5551,
   PXL_RGB565,
   PXL_RGBA4444,
   PXL_RGBA8888