mirror of https://github.com/inolen/redream.git
update SA, FNS and OCT registers immediately as they are written to
This commit is contained in:
Anthony Pesch
parent
5760cecdee
commit
2e4f0602ac
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@ -22,16 +22,8 @@ DEFINE_AGGREGATE_COUNTER(aica_samples);
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#endif
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#define AICA_NUM_CHANNELS 64
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#define AICA_FNS_BITS 10
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#define AICA_STEP_SAMPLE (1 << AICA_FNS_BITS)
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#define AICA_OFFSET_POS(s) (s >> AICA_FNS_BITS)
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#define AICA_OFFSET_FRAC(s) (s & ((1 << AICA_FNS_BITS) - 1))
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#define AICA_TIMER_PERIOD 0xff
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/* number of samples to batch per timer */
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#define AICA_BATCH_SIZE 10
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#define AICA_TIMER_PERIOD 0xff
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/* register access is performed with either 1 or 4 byte memory accesses. the
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physical registers however are only 2 bytes wide, with each one packing
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@ -39,8 +31,12 @@ DEFINE_AGGREGATE_COUNTER(aica_samples);
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use lo / hi bools to simplify the logic around figuring out which values
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are being accessed */
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#define AICA_REG_ALIGN(addr, mask) ((addr) & ~0x3)
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#define AICA_REG_LO(addr, mask) (((addr) & 0x3) == 0)
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#define AICA_REG_HI(addr, mask) ((((addr) & 0x3) != 0) || ((mask) != 0xff))
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#define AICA_REG_LO(addr, mask) (((addr)&0x3) == 0)
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#define AICA_REG_HI(addr, mask) ((((addr)&0x3) != 0) || ((mask) != 0xff))
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/* phase increment has 10 fractional bits */
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#define AICA_PHASE_FRC_BITS 10
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#define AICA_BASE_FREQ (1 << AICA_PHASE_FRC_BITS)
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/* ADPCM decoding constants */
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#define ADPCM_QUANT_MIN 0x7f
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@ -66,10 +62,12 @@ struct aica_channel {
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uint8_t *base;
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/* how much to step the sound source each sample */
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uint32_t step;
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uint32_t phaseinc;
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/* current position in the sound source */
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uint32_t offset;
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/* fractional remainder after phase increment */
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uint32_t phasefrc;
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int pos;
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/* signals the the current channel has looped */
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int looped;
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@ -323,7 +321,7 @@ static void aica_timer_expire(struct aica *aica, int n) {
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aica->timers[n] = NULL;
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aica_timer_reschedule(aica, n, AICA_TIMER_PERIOD);
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LOG_AICA("aica_timer_expire [%d]", n);
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/*LOG_AICA("aica_timer_expire [%d]", n);*/
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/* raise timer interrupt */
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static int timer_intr[3] = {AICA_INT_TIMER_A, AICA_INT_TIMER_B,
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@ -428,7 +426,7 @@ static void aica_rtc_timer(void *data) {
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}
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static float aica_channel_hz(struct aica_channel *ch) {
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return (AICA_SAMPLE_FREQ * ch->step) / (float)AICA_STEP_SAMPLE;
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return (AICA_SAMPLE_FREQ * ch->phaseinc) / (float)AICA_BASE_FREQ;
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}
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static float aica_channel_duration(struct aica_channel *ch) {
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@ -436,24 +434,24 @@ static float aica_channel_duration(struct aica_channel *ch) {
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return ch->data->LEA / hz;
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}
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static uint32_t aica_channel_step(struct aica_channel *ch) {
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/* by default, step the stream a single sample at a time */
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uint32_t step = AICA_STEP_SAMPLE;
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static uint32_t aica_channel_phaseinc(struct aica_channel *ch) {
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/* by default, step a single sample at a time */
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uint32_t phaseinc = AICA_BASE_FREQ;
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/* FNS represents the fractional portion of a step, used to linearly
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/* FNS represents the fractional phase increment, used to linearly
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interpolate between samples */
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step |= ch->data->FNS;
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phaseinc |= ch->data->FNS;
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/* OCT represents a full octave pitch shift in two's complement, ranging
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from -8 to +7 */
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uint32_t oct = ch->data->OCT;
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if (oct & 8) {
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step >>= (16 - oct);
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if (oct & 0x8) {
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phaseinc >>= (16 - oct);
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} else {
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step <<= oct;
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phaseinc <<= oct;
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}
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return step;
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return phaseinc;
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}
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static uint8_t *aica_channel_base(struct aica *aica, struct aica_channel *ch) {
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@ -461,7 +459,7 @@ static uint8_t *aica_channel_base(struct aica *aica, struct aica_channel *ch) {
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return &aica->wave_ram[start_addr];
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}
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static void aica_channel_stop(struct aica *aica, struct aica_channel *ch) {
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static void aica_channel_key_off(struct aica *aica, struct aica_channel *ch) {
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if (!ch->active) {
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return;
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}
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@ -472,39 +470,30 @@ static void aica_channel_stop(struct aica *aica, struct aica_channel *ch) {
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however, it will not be set when a non-looping channel is stopped */
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ch->data->KYONB = 0;
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LOG_AICA("aica_channel_stop [%d]", ch->id);
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LOG_AICA("aica_channel_key_off [%d]", ch->id);
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}
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static void aica_channel_start(struct aica *aica, struct aica_channel *ch) {
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static void aica_channel_key_on(struct aica *aica, struct aica_channel *ch) {
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if (ch->active) {
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return;
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}
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ch->active = 1;
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ch->base = aica_channel_base(aica, ch);
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ch->step = aica_channel_step(ch);
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ch->offset = 0;
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ch->phaseinc = aica_channel_phaseinc(ch);
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ch->phasefrc = 0;
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ch->pos = 0;
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ch->looped = 0;
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ch->prev_sample = 0;
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ch->prev_quant = ADPCM_QUANT_MIN;
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LOG_AICA("aica_channel_start [%d] %s, %s, %.2f hz, %.2f sec", ch->id,
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LOG_AICA("aica_channel_key_on [%d] %s, %s, %.2f hz, %.2f sec", ch->id,
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aica_fmt_names[ch->data->PCMS], aica_loop_names[ch->data->LPCTL],
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aica_channel_hz(ch), aica_channel_duration(ch));
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}
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/*static void aica_channel_update_base(struct aica *aica,
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struct aica_channel *ch) {
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ch->base = aica_channel_base(aica, ch);
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}
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static void aica_channel_update_step(struct aica *aica,
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struct aica_channel *ch) {
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ch->step = aica_channel_step(ch);
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}*/
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static void aica_channel_update_key_state(struct aica *aica,
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struct aica_channel *ch) {
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static void aica_channel_key_on_execute(struct aica *aica,
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struct aica_channel *ch) {
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if (!ch->data->KYONEX) {
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return;
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}
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@ -514,9 +503,9 @@ static void aica_channel_update_key_state(struct aica *aica,
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struct aica_channel *ch2 = &aica->channels[i];
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if (ch2->data->KYONB) {
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aica_channel_start(aica, ch2);
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aica_channel_key_on(aica, ch2);
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} else {
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aica_channel_stop(aica, ch2);
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aica_channel_key_off(aica, ch2);
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}
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}
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@ -524,7 +513,7 @@ static void aica_channel_update_key_state(struct aica *aica,
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ch->data->KYONEX = 0;
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}
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static int32_t aica_channel_update(struct aica *aica, struct aica_channel *ch) {
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static int32_t aica_channel_step(struct aica *aica, struct aica_channel *ch) {
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if (!ch->active) {
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return 0;
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}
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@ -536,31 +525,26 @@ static int32_t aica_channel_update(struct aica *aica, struct aica_channel *ch) {
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int32_t next_sample = 0;
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int32_t next_quant = 0;
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/* note, a step may skip more than one sample. for ADPCM channels at least,
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each of these intermediate samples must be processed due to its delta-
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based decoding */
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uint32_t next_offset = ch->offset + ch->step;
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uint32_t next_pos = AICA_OFFSET_POS(next_offset);
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uint32_t next_frac = AICA_OFFSET_FRAC(next_offset);
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uint32_t pos = AICA_OFFSET_POS(ch->offset);
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/* step the stream */
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ch->phasefrc += ch->phaseinc;
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while (pos < next_pos) {
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while (ch->phasefrc >= AICA_BASE_FREQ) {
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if (ch->data->SSCTL) {
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LOG_WARNING("SSCTL input not supported");
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} else {
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switch (ch->data->PCMS) {
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case AICA_FMT_PCMS16: {
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next_sample = *(int16_t *)&ch->base[pos << 1];
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next_sample = *(int16_t *)&ch->base[ch->pos << 1];
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} break;
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case AICA_FMT_PCMS8: {
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next_sample = *(int8_t *)&ch->base[pos] << 8;
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next_sample = *(int8_t *)&ch->base[ch->pos] << 8;
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} break;
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case AICA_FMT_ADPCM:
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case AICA_FMT_ADPCM_STREAM: {
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int shift = (pos & 1) << 2;
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int32_t data = (ch->base[pos >> 1] >> shift) & 0xf;
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int shift = (ch->pos & 1) << 2;
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int32_t data = (ch->base[ch->pos >> 1] >> shift) & 0xf;
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aica_decode_adpcm(data, ch->prev_sample, ch->prev_quant, &next_sample,
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&next_quant);
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} break;
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@ -573,36 +557,35 @@ static int32_t aica_channel_update(struct aica *aica, struct aica_channel *ch) {
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ch->prev_sample = next_sample;
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ch->prev_quant = next_quant;
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pos++;
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ch->phasefrc -= AICA_BASE_FREQ;
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ch->pos++;
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}
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ch->offset = next_offset;
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/* interpolate sample */
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int32_t result = ch->prev_sample * (AICA_STEP_SAMPLE - next_frac);
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result += next_sample * next_frac;
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result >>= AICA_FNS_BITS;
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int32_t result = ch->prev_sample * (AICA_BASE_FREQ - ch->phasefrc);
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result += next_sample * ch->phasefrc;
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result >>= AICA_PHASE_FRC_BITS;
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/* shift to DECAY1 once starting the loop */
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if (ch->data->LPSLNK && next_pos > ch->data->LSA) {
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if (ch->data->LPSLNK && ch->pos >= ch->data->LSA) {
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LOG_WARNING("EG not currently supported");
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}
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/* check if the current position in the sound source has passed the loop end
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position */
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if (next_pos > ch->data->LEA) {
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if (ch->pos >= ch->data->LEA) {
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ch->looped = 1;
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LOG_AICA("aica_channel_update [%d] looped", ch->id);
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LOG_AICA("aica_channel_step [%d] looped", ch->id);
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switch (ch->data->LPCTL) {
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case AICA_LOOP_NONE: {
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aica_channel_stop(aica, ch);
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aica_channel_key_off(aica, ch);
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} break;
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case AICA_LOOP_FORWARD: {
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/* restart channel at loop start address */
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ch->offset = ch->data->LSA << AICA_FNS_BITS;
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ch->pos = ch->data->LSA;
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ch->prev_sample = 0;
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ch->prev_quant = ADPCM_QUANT_MIN;
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} break;
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@ -622,7 +605,7 @@ static void aica_generate_frames(struct aica *aica) {
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for (int i = 0; i < AICA_NUM_CHANNELS; i++) {
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struct aica_channel *ch = &aica->channels[i];
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int32_t s = aica_channel_update(aica, ch);
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int32_t s = aica_channel_step(aica, ch);
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l += aica_adjust_channel_volume(ch, s);
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r += aica_adjust_channel_volume(ch, s);
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}
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@ -650,7 +633,7 @@ static uint32_t aica_channel_reg_read(struct aica *aica, uint32_t addr,
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int offset = addr & ((1 << 7) - 1);
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struct aica_channel *ch = &aica->channels[n];
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LOG_AICA("aica_channel_reg_read [%d] 0x%x", ch->id, offset);
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/*LOG_AICA("aica_channel_reg_read [%d] 0x%x", ch->id, offset);*/
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return READ_DATA((uint8_t *)ch->data + offset);
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}
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@ -661,7 +644,7 @@ static void aica_channel_reg_write(struct aica *aica, uint32_t addr,
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int offset = addr & ((1 << 7) - 1);
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struct aica_channel *ch = &aica->channels[n];
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LOG_AICA("aica_channel_reg_write [%d] 0x%x : 0x%x", ch->id, offset, data);
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/*LOG_AICA("aica_channel_reg_write [%d] 0x%x : 0x%x", ch->id, offset, data);*/
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WRITE_DATA((uint8_t *)ch->data + offset);
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int aligned = AICA_REG_ALIGN(offset, data_mask);
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@ -671,19 +654,19 @@ static void aica_channel_reg_write(struct aica *aica, uint32_t addr,
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switch (aligned) {
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case 0x0: { /* SA_hi, KYONB, KYONEX */
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if (lo) {
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/*aica_channel_update_base(aica, ch);*/
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ch->base = aica_channel_base(aica, ch);
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}
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if (hi) {
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aica_channel_update_key_state(aica, ch);
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aica_channel_key_on_execute(aica, ch);
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}
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} break;
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case 0x4: { /* SA_lo */
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/*aica_channel_update_base(aica, ch);*/
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ch->base = aica_channel_base(aica, ch);
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} break;
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case 0x18: { /* FNS, OCT */
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/*aica_channel_update_step(aica, ch);*/
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ch->phaseinc = aica_channel_phaseinc(ch);
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} break;
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}
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}
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@ -717,7 +700,7 @@ static uint32_t aica_common_reg_read(struct aica *aica, uint32_t addr,
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case 0x14: { /* CA */
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struct aica_channel *ch = &aica->channels[aica->common_data->MSLC];
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aica->common_data->CA = AICA_OFFSET_POS(ch->offset);
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aica->common_data->CA = ch->pos;
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} break;
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case 0x90: { /* TIMA, TACTL */
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