/*
 *         NAME      DESC                            INSTR_CODE        CYCLES FLAGS
 */

SH4_INSTR(INVALID,   "invalid",                      0000000000000000, 1, SH4_FLAG_LOAD_PC | SH4_FLAG_STORE_PC)

/* fixed-point transfer instructions */
SH4_INSTR(MOVI,      "mov     #imm8, rn",            1110nnnniiiiiiii, 1, 0)
SH4_INSTR(MOVWL_PCR, "mov.w   @(disp:8,pc), rn",     1001nnnndddddddd, 1, SH4_FLAG_LOAD)
SH4_INSTR(MOVLL_PCR, "mov.l   @(disp:8,pc), rn",     1101nnnndddddddd, 1, SH4_FLAG_LOAD)
SH4_INSTR(MOV,       "mov     rm, rn",               0110nnnnmmmm0011, 1, 0)
SH4_INSTR(MOVBS_IND, "mov.b   rm, @rn",              0010nnnnmmmm0000, 1, SH4_FLAG_STORE)
SH4_INSTR(MOVWS_IND, "mov.w   rm, @rn",              0010nnnnmmmm0001, 1, SH4_FLAG_STORE)
SH4_INSTR(MOVLS_IND, "mov.l   rm, @rn",              0010nnnnmmmm0010, 1, SH4_FLAG_STORE)
SH4_INSTR(MOVBL_IND, "mov.b   @rm, rn",              0110nnnnmmmm0000, 1, SH4_FLAG_LOAD)
SH4_INSTR(MOVWL_IND, "mov.w   @rm, rn",              0110nnnnmmmm0001, 1, SH4_FLAG_LOAD)
SH4_INSTR(MOVLL_IND, "mov.l   @rm, rn",              0110nnnnmmmm0010, 1, SH4_FLAG_LOAD)
SH4_INSTR(MOVBS_DEC, "mov.b   rm,@-rn",              0010nnnnmmmm0100, 1, SH4_FLAG_STORE)
SH4_INSTR(MOVWS_DEC, "mov.w   rm,@-rn",              0010nnnnmmmm0101, 1, SH4_FLAG_STORE)
SH4_INSTR(MOVLS_DEC, "mov.l   rm,@-rn",              0010nnnnmmmm0110, 1, SH4_FLAG_STORE)
SH4_INSTR(MOVBL_INC, "mov.b   @rm+,rn",              0110nnnnmmmm0100, 1, SH4_FLAG_LOAD)
SH4_INSTR(MOVWL_INC, "mov.w   @rm+,rn",              0110nnnnmmmm0101, 1, SH4_FLAG_LOAD)
SH4_INSTR(MOVLL_INC, "mov.l   @rm+,rn",              0110nnnnmmmm0110, 1, SH4_FLAG_LOAD)
SH4_INSTR(MOVBS_OFF, "mov.b   r0, @(disp:4,rm)",     10000000nnnndddd, 1, SH4_FLAG_STORE)
SH4_INSTR(MOVWS_OFF, "mov.w   r0, @(disp:4,rm)",     10000001nnnndddd, 1, SH4_FLAG_STORE)
SH4_INSTR(MOVLS_OFF, "mov.l   rm, @(disp:4,rn)",     0001nnnnmmmmdddd, 1, SH4_FLAG_STORE)
SH4_INSTR(MOVBL_OFF, "mov.b   @(disp:4,rm), r0",     10000100mmmmdddd, 1, SH4_FLAG_LOAD)
SH4_INSTR(MOVWL_OFF, "mov.w   @(disp:4,rm), r0",     10000101mmmmdddd, 1, SH4_FLAG_LOAD)
SH4_INSTR(MOVLL_OFF, "mov.l   @(disp:4,rm), rn",     0101nnnnmmmmdddd, 1, SH4_FLAG_LOAD)
SH4_INSTR(MOVBS_IDX, "mov.b   rm, @(r0,rn)",         0000nnnnmmmm0100, 1, SH4_FLAG_STORE)
SH4_INSTR(MOVWS_IDX, "mov.w   rm, @(r0,rn)",         0000nnnnmmmm0101, 1, SH4_FLAG_STORE)
SH4_INSTR(MOVLS_IDX, "mov.l   rm, @(r0,rn)",         0000nnnnmmmm0110, 1, SH4_FLAG_STORE)
SH4_INSTR(MOVBL_IDX, "mov.b   @(r0,rm), rn",         0000nnnnmmmm1100, 1, SH4_FLAG_LOAD)
SH4_INSTR(MOVWL_IDX, "mov.w   @(r0,rm), rn",         0000nnnnmmmm1101, 1, SH4_FLAG_LOAD)
SH4_INSTR(MOVLL_IDX, "mov.l   @(r0,rm), rn",         0000nnnnmmmm1110, 1, SH4_FLAG_LOAD)
SH4_INSTR(MOVBS_GBR, "mov.b   r0, @(disp:8,gbr)",    11000000dddddddd, 1, SH4_FLAG_STORE)
SH4_INSTR(MOVWS_GBR, "mov.w   r0, @(disp:8,gbr)",    11000001dddddddd, 1, SH4_FLAG_STORE)
SH4_INSTR(MOVLS_GBR, "mov.l   r0, @(disp:8,gbr)",    11000010dddddddd, 1, SH4_FLAG_STORE)
SH4_INSTR(MOVBL_GBR, "mov.b   @(disp:8,gbr), r0",    11000100dddddddd, 1, SH4_FLAG_LOAD)
SH4_INSTR(MOVWL_GBR, "mov.w   @(disp:8,gbr), r0",    11000101dddddddd, 1, SH4_FLAG_LOAD)
SH4_INSTR(MOVLL_GBR, "mov.l   @(disp:8,gbr), r0",    11000110dddddddd, 1, SH4_FLAG_LOAD)
SH4_INSTR(MOVA,      "mova    (disp:8,pc), r0",      11000111dddddddd, 1, 0)
SH4_INSTR(MOVT,      "movt    rn",                   0000nnnn00101001, 1, 0)
SH4_INSTR(SWAPB,     "swap.b  rm, rn",               0110nnnnmmmm1000, 1, 0)
SH4_INSTR(SWAPW,     "swap.w  rm, rn",               0110nnnnmmmm1001, 1, 0)
SH4_INSTR(XTRCT,     "xtrct   rm, rn",               0010nnnnmmmm1101, 1, 0)


/* arithmetric operation instructions */
SH4_INSTR(ADD,       "add     rm, rn",               0011nnnnmmmm1100, 1, 0)
SH4_INSTR(ADDI,      "add     #imm8, rn",            0111nnnniiiiiiii, 1, 0)
SH4_INSTR(ADDC,      "addc    rm, rn",               0011nnnnmmmm1110, 1, 0)
SH4_INSTR(ADDV,      "addv    rm, rn",               0011nnnnmmmm1111, 1, 0)
SH4_INSTR(CMPEQI,    "cmp/eq  #imm8, r0",            10001000iiiiiiii, 1, SH4_FLAG_CMP)
SH4_INSTR(CMPEQ,     "cmp/eq  rm, rn",               0011nnnnmmmm0000, 1, SH4_FLAG_CMP)
SH4_INSTR(CMPHS,     "cmp/hs  rm, rn",               0011nnnnmmmm0010, 1, SH4_FLAG_CMP)
SH4_INSTR(CMPGE,     "cmp/ge  rm, rn",               0011nnnnmmmm0011, 1, SH4_FLAG_CMP)
SH4_INSTR(CMPHI,     "cmp/hi  rm, rn",               0011nnnnmmmm0110, 1, SH4_FLAG_CMP)
SH4_INSTR(CMPGT,     "cmp/gt  rm, rn",               0011nnnnmmmm0111, 1, SH4_FLAG_CMP)
SH4_INSTR(CMPPZ,     "cmp/pz  rn",                   0100nnnn00010001, 1, SH4_FLAG_CMP)
SH4_INSTR(CMPPL,     "cmp/pl  rn",                   0100nnnn00010101, 1, SH4_FLAG_CMP)
SH4_INSTR(CMPSTR,    "cmp/str rm, rn",               0010nnnnmmmm1100, 1, SH4_FLAG_CMP)
SH4_INSTR(DIV0S,     "div0s   rm, rn",               0010nnnnmmmm0111, 1, 0)
SH4_INSTR(DIV0U,     "div0u",                        0000000000011001, 1, 0)
SH4_INSTR(DIV1,      "div1    rm, rn",               0011nnnnmmmm0100, 1, 0)
SH4_INSTR(DMULS,     "dmuls.l rm, rn",               0011nnnnmmmm1101, 2, 0)
SH4_INSTR(DMULU,     "dmulu.l rm, rn",               0011nnnnmmmm0101, 2, 0)
SH4_INSTR(DT,        "dt      rn",                   0100nnnn00010000, 1, 0)
SH4_INSTR(EXTSB,     "exts.b  rm, rn",               0110nnnnmmmm1110, 1, 0)
SH4_INSTR(EXTSW,     "exts.w  rm, rn",               0110nnnnmmmm1111, 1, 0)
SH4_INSTR(EXTUB,     "extu.b  rm, rn",               0110nnnnmmmm1100, 1, 0)
SH4_INSTR(EXTUW,     "extu.w  rm, rn",               0110nnnnmmmm1101, 1, 0)
SH4_INSTR(MACL,      "mac.l   @rm+, @rn+",           0000nnnnmmmm1111, 2, SH4_FLAG_LOAD | SH4_FLAG_STORE)
SH4_INSTR(MACW,      "mac.w   @rm+, @rn+",           0100nnnnmmmm1111, 2, SH4_FLAG_LOAD | SH4_FLAG_STORE)
SH4_INSTR(MULL,      "mul.l   rm, rn",               0000nnnnmmmm0111, 2, 0)
SH4_INSTR(MULS,      "muls    rm, rn",               0010nnnnmmmm1111, 2, 0)
SH4_INSTR(MULU,      "mulu    rm, rn",               0010nnnnmmmm1110, 2, 0)
SH4_INSTR(NEG,       "neg     rm, rn",               0110nnnnmmmm1011, 1, 0)
SH4_INSTR(NEGC,      "negc    rm, rn",               0110nnnnmmmm1010, 1, 0)
SH4_INSTR(SUB,       "sub     rm, rn",               0011nnnnmmmm1000, 1, 0)
SH4_INSTR(SUBC,      "subc    rm, rn",               0011nnnnmmmm1010, 1, 0)
SH4_INSTR(SUBV,      "subv    rm, rn",               0011nnnnmmmm1011, 1, 0)


/* logic operation instructions */
SH4_INSTR(AND,       "and     rm, rn",               0010nnnnmmmm1001, 1, 0)
SH4_INSTR(ANDI,      "and     #imm8, r0",            11001001iiiiiiii, 1, 0)
SH4_INSTR(ANDB,      "and.b   #imm8, @(r0,gbr)",     11001101iiiiiiii, 4, SH4_FLAG_STORE)
SH4_INSTR(NOT,       "not     rm, rn",               0110nnnnmmmm0111, 1, 0)
SH4_INSTR(OR,        "or      rm, rn",               0010nnnnmmmm1011, 1, 0)
SH4_INSTR(ORI,       "or      #imm8, r0",            11001011iiiiiiii, 1, 0)
SH4_INSTR(ORB,       "or.b    #imm8, @(r0,gbr)",     11001111iiiiiiii, 4, SH4_FLAG_STORE)
SH4_INSTR(TAS,       "tas.b   @rn",                  0100nnnn00011011, 5, SH4_FLAG_LOAD | SH4_FLAG_CMP)
SH4_INSTR(TST,       "tst     rm, rn",               0010nnnnmmmm1000, 1, SH4_FLAG_CMP)
SH4_INSTR(TSTI,      "tst     #imm8, r0",            11001000iiiiiiii, 1, SH4_FLAG_CMP)
SH4_INSTR(TSTB,      "tst.b   #imm8, @(r0,gbr)",     11001100iiiiiiii, 3, SH4_FLAG_STORE | SH4_FLAG_CMP)
SH4_INSTR(XOR,       "xor     rm, rn",               0010nnnnmmmm1010, 1, 0)
SH4_INSTR(XORI,      "xor     #imm8, r0",            11001010iiiiiiii, 1, 0)
SH4_INSTR(XORB,      "xor.b   #imm8, @(r0,gbr)",     11001110iiiiiiii, 4, SH4_FLAG_STORE)


/* shift instructions */
SH4_INSTR(ROTL,      "rotl    rn",                   0100nnnn00000100, 1, 0)
SH4_INSTR(ROTR,      "rotr    rn",                   0100nnnn00000101, 1, 0)
SH4_INSTR(ROTCL,     "rotcl   rn",                   0100nnnn00100100, 1, 0)
SH4_INSTR(ROTCR,     "rotcr   rn",                   0100nnnn00100101, 1, 0)
SH4_INSTR(SHAD,      "shad    rm, rn",               0100nnnnmmmm1100, 1, 0)
SH4_INSTR(SHAL,      "shal    rn",                   0100nnnn00100000, 1, 0)
SH4_INSTR(SHAR,      "shar    rn",                   0100nnnn00100001, 1, 0)
SH4_INSTR(SHLD,      "shld    rm, rn",               0100nnnnmmmm1101, 1, 0)
SH4_INSTR(SHLL,      "shll    rn",                   0100nnnn00000000, 1, 0)
SH4_INSTR(SHLR,      "shlr    rn",                   0100nnnn00000001, 1, 0)
SH4_INSTR(SHLL2,     "shll2   rn",                   0100nnnn00001000, 1, 0)
SH4_INSTR(SHLR2,     "shlr2   rn",                   0100nnnn00001001, 1, 0)
SH4_INSTR(SHLL8,     "shll8   rn",                   0100nnnn00011000, 1, 0)
SH4_INSTR(SHLR8,     "shlr8   rn",                   0100nnnn00011001, 1, 0)
SH4_INSTR(SHLL16,    "shll16  rn",                   0100nnnn00101000, 1, 0)
SH4_INSTR(SHLR16,    "shlr16  rn",                   0100nnnn00101001, 1, 0)


/* branch instructions */
SH4_INSTR(BF,        "bf      disp:8",               10001011dddddddd, 1, SH4_FLAG_COND | SH4_FLAG_STORE_PC)
SH4_INSTR(BFS,       "bfs     disp:8",               10001111dddddddd, 1, SH4_FLAG_COND | SH4_FLAG_STORE_PC | SH4_FLAG_DELAYED)
SH4_INSTR(BT,        "bt      disp:8",               10001001dddddddd, 1, SH4_FLAG_COND | SH4_FLAG_STORE_PC)
SH4_INSTR(BTS,       "bts     disp:8",               10001101dddddddd, 1, SH4_FLAG_COND | SH4_FLAG_STORE_PC | SH4_FLAG_DELAYED)
SH4_INSTR(BRA,       "bra     disp:12",              1010dddddddddddd, 1, SH4_FLAG_STORE_PC | SH4_FLAG_DELAYED)
SH4_INSTR(BRAF,      "braf    rn",                   0000nnnn00100011, 2, SH4_FLAG_STORE_PC | SH4_FLAG_DELAYED)
SH4_INSTR(BSR,       "bsr     disp:12",              1011dddddddddddd, 1, SH4_FLAG_STORE_PC | SH4_FLAG_DELAYED)
SH4_INSTR(BSRF,      "bsrf    rn",                   0000nnnn00000011, 2, SH4_FLAG_STORE_PC | SH4_FLAG_DELAYED)
SH4_INSTR(JMP,       "jmp     @rm",                  0100nnnn00101011, 2, SH4_FLAG_STORE_PC | SH4_FLAG_DELAYED)
SH4_INSTR(JSR,       "jsr     @rn",                  0100nnnn00001011, 2, SH4_FLAG_STORE_PC | SH4_FLAG_DELAYED)
SH4_INSTR(RTS,       "rts",                          0000000000001011, 2, SH4_FLAG_STORE_PC | SH4_FLAG_DELAYED)


/* system control instructions */
SH4_INSTR(CLRMAC,    "clrmac",                       0000000000101000, 1, 0)
SH4_INSTR(CLRS,      "clrs",                         0000000001001000, 1, 0)
SH4_INSTR(CLRT,      "clrt",                         0000000000001000, 1, 0)
SH4_INSTR(LDCSR,     "ldc     rn, sr",               0100mmmm00001110, 4, SH4_FLAG_STORE_SR)
SH4_INSTR(LDCGBR,    "ldc     rn, gbr",              0100mmmm00011110, 3, 0)
SH4_INSTR(LDCVBR,    "ldc     rn, vbr",              0100mmmm00101110, 1, 0)
SH4_INSTR(LDCSSR,    "ldc     rn, ssr",              0100mmmm00111110, 1, 0)
SH4_INSTR(LDCSPC,    "ldc     rn, spc",              0100mmmm01001110, 1, 0)
SH4_INSTR(LDCDBR,    "ldc     rn, dbr",              0100mmmm11111010, 1, 0)
SH4_INSTR(LDCRBANK,  "ldc.l   rn, rn_bank",          0100mmmm1nnn1110, 1, 0)
SH4_INSTR(LDCMSR,    "ldc.l   @rn+, sr",             0100mmmm00000111, 4, SH4_FLAG_LOAD | SH4_FLAG_STORE_SR)
SH4_INSTR(LDCMGBR,   "ldc.l   @rn+, gbr",            0100mmmm00010111, 3, SH4_FLAG_LOAD)
SH4_INSTR(LDCMVBR,   "ldc.l   @rn+, vbr",            0100mmmm00100111, 1, SH4_FLAG_LOAD)
SH4_INSTR(LDCMSSR,   "ldc.l   @rn+, ssr",            0100mmmm00110111, 1, SH4_FLAG_LOAD)
SH4_INSTR(LDCMSPC,   "ldc.l   @rn+, spc",            0100mmmm01000111, 1, SH4_FLAG_LOAD)
SH4_INSTR(LDCMDBR,   "ldc.l   @rn+, dbr",            0100mmmm11110110, 1, SH4_FLAG_LOAD)
SH4_INSTR(LDCMRBANK, "ldc.l   @rn+, rm_bank",        0100mmmm1nnn0111, 1, SH4_FLAG_LOAD)
SH4_INSTR(LDSMACH,   "lds     rn, mach",             0100mmmm00001010, 1, 0)
SH4_INSTR(LDSMACL,   "lds     rn, macl",             0100mmmm00011010, 1, 0)
SH4_INSTR(LDSPR,     "lds     rn, pr",               0100mmmm00101010, 2, 0)
SH4_INSTR(LDSMMACH,  "lds.l   @rn+, mach",           0100mmmm00000110, 1, SH4_FLAG_LOAD)
SH4_INSTR(LDSMMACL,  "lds.l   @rn+, macl",           0100mmmm00010110, 1, SH4_FLAG_LOAD)
SH4_INSTR(LDSMPR,    "lds.l   @rn+, pr",             0100mmmm00100110, 2, SH4_FLAG_LOAD)
SH4_INSTR(LDTLB,     "ldtlb",                        0000000000111000, 1, 0)
SH4_INSTR(MOVCAL,    "movca.l r0, @rn",              0000nnnn11000011, 1, SH4_FLAG_STORE)
SH4_INSTR(NOP,       "nop",                          0000000000001001, 1, 0)
SH4_INSTR(OCBI,      "ocbi",                         0000nnnn10010011, 1, 0)
SH4_INSTR(OCBP,      "ocbp",                         0000nnnn10100011, 1, 0)
SH4_INSTR(OCBWB,     "ocbwb",                        0000nnnn10110011, 1, 0)
SH4_INSTR(PREF,      "pref    @rn",                  0000nnnn10000011, 1, SH4_FLAG_STORE)
SH4_INSTR(RTE,       "rte",                          0000000000101011, 5, SH4_FLAG_STORE_PC | SH4_FLAG_DELAYED | SH4_FLAG_STORE_SR)
SH4_INSTR(SETS,      "sets",                         0000000001011000, 1, 0)
SH4_INSTR(SETT,      "sett",                         0000000000011000, 1, 0)
SH4_INSTR(SLEEP,     "sleep",                        0000000000011011, 4, SH4_FLAG_LOAD_PC | SH4_FLAG_STORE_PC)
SH4_INSTR(STCSR,     "stc     sr, rn",               0000nnnn00000010, 2, 0)
SH4_INSTR(STCGBR,    "stc     gbr, rn",              0000nnnn00010010, 2, 0)
SH4_INSTR(STCVBR,    "stc     vbr, rn",              0000nnnn00100010, 2, 0)
SH4_INSTR(STCSSR,    "stc     ssr, rn",              0000nnnn00110010, 2, 0)
SH4_INSTR(STCSPC,    "stc     spc, rn",              0000nnnn01000010, 2, 0)
SH4_INSTR(STCSGR,    "stc     sgr, rn",              0000nnnn00111010, 3, 0)
SH4_INSTR(STCDBR,    "stc     dbr, rn",              0000nnnn11111010, 2, 0)
SH4_INSTR(STCRBANK,  "stc     rm_bank, rn",          0000nnnn1mmm0010, 2, 0)
SH4_INSTR(STCMSR,    "stc.l   sr, @-rn",             0100nnnn00000011, 2, SH4_FLAG_STORE)
SH4_INSTR(STCMGBR,   "stc.l   gbr, @-rn",            0100nnnn00010011, 2, SH4_FLAG_STORE)
SH4_INSTR(STCMVBR,   "stc.l   vbr, @-rn",            0100nnnn00100011, 2, SH4_FLAG_STORE)
SH4_INSTR(STCMSSR,   "stc.l   ssr, @-rn",            0100nnnn00110011, 2, SH4_FLAG_STORE)
SH4_INSTR(STCMSPC,   "stc.l   spc, @-rn",            0100nnnn01000011, 2, SH4_FLAG_STORE)
SH4_INSTR(STCMSGR,   "stc.l   sgr, @-rn",            0100nnnn00110010, 3, SH4_FLAG_STORE)
SH4_INSTR(STCMDBR,   "stc.l   dbr, @-rn",            0100nnnn11110010, 2, SH4_FLAG_STORE)
SH4_INSTR(STCMRBANK, "stc.l   rm_bank, @-rn",        0100nnnn1mmm0011, 2, SH4_FLAG_STORE)
SH4_INSTR(STSMACH,   "sts     mach, rn",             0000nnnn00001010, 1, 0)
SH4_INSTR(STSMACL,   "sts     macl, rn",             0000nnnn00011010, 1, 0)
SH4_INSTR(STSPR,     "sts     pr, rn",               0000nnnn00101010, 2, 0)
SH4_INSTR(STSMMACH,  "sts.l   mach, @-rn",           0100nnnn00000010, 1, SH4_FLAG_STORE)
SH4_INSTR(STSMMACL,  "sts.l   macl, @-rn",           0100nnnn00010010, 1, SH4_FLAG_STORE)
SH4_INSTR(STSMPR,    "sts.l   pr, @-rn",             0100nnnn00100010, 2, SH4_FLAG_STORE)
SH4_INSTR(TRAPA,     "trapa   #imm8",                11000011iiiiiiii, 7, SH4_FLAG_STORE_PC)


/* floating-point single and double precision instructions */
SH4_INSTR(FLDI0,            "fldi0   frn",           1111nnnn10001101, 1, 0)
SH4_INSTR(FLDI1,            "fldi1   frn",           1111nnnn10011101, 1, 0)
SH4_INSTR(FMOV,             "fmov    frm, frn",      1111nnnnmmmm1100, 1, SH4_FLAG_USE_FPSCR)
SH4_INSTR(FMOV_LOAD,        "fmov.s  @(rm), frn",    1111nnnnmmmm1000, 1, SH4_FLAG_USE_FPSCR | SH4_FLAG_LOAD)
SH4_INSTR(FMOV_INDEX_LOAD,  "fmov.s  @(r0,rm), frn", 1111nnnnmmmm0110, 1, SH4_FLAG_USE_FPSCR | SH4_FLAG_LOAD)
SH4_INSTR(FMOV_STORE,       "fmov.s  frm, @rn",      1111nnnnmmmm1010, 1, SH4_FLAG_USE_FPSCR | SH4_FLAG_STORE)
SH4_INSTR(FMOV_INDEX_STORE, "fmov.s  frm, @(r0,rn)", 1111nnnnmmmm0111, 1, SH4_FLAG_USE_FPSCR | SH4_FLAG_STORE)
SH4_INSTR(FMOV_SAVE,        "fmov.s  frm, @-rn",     1111nnnnmmmm1011, 1, SH4_FLAG_USE_FPSCR | SH4_FLAG_STORE)
SH4_INSTR(FMOV_RESTORE,     "fmov.s  @rm+, frn",     1111nnnnmmmm1001, 1, SH4_FLAG_USE_FPSCR | SH4_FLAG_LOAD)
SH4_INSTR(FLDS,             "flds    frn, fpul",     1111mmmm00011101, 1, 0)
SH4_INSTR(FSTS,             "fsts    fpul, frn",     1111nnnn00001101, 1, 0)
SH4_INSTR(FABS,             "fabs    frn",           1111nnnn01011101, 1, SH4_FLAG_USE_FPSCR)
SH4_INSTR(FSRRA,            "fsrra   frn",           1111nnnn01111101, 1, 0)
SH4_INSTR(FADD,             "fadd    frm, frn",      1111nnnnmmmm0000, 1, SH4_FLAG_USE_FPSCR)
SH4_INSTR(FCMPEQ,           "fcmp/eq frm, frn",      1111nnnnmmmm0100, 2, SH4_FLAG_USE_FPSCR | SH4_FLAG_CMP)
SH4_INSTR(FCMPGT,           "fcmp/gt frm, frn",      1111nnnnmmmm0101, 2, SH4_FLAG_USE_FPSCR | SH4_FLAG_CMP)
SH4_INSTR(FDIV,             "fdiv    frm, frn",      1111nnnnmmmm0011, 1, SH4_FLAG_USE_FPSCR)
SH4_INSTR(FLOAT,            "float   fpul, frn",     1111nnnn00101101, 1, SH4_FLAG_USE_FPSCR)
SH4_INSTR(FMAC,             "fmac    fr0, frm, frn", 1111nnnnmmmm1110, 1, SH4_FLAG_USE_FPSCR)
SH4_INSTR(FMUL,             "fmul    frm, frn",      1111nnnnmmmm0010, 1, SH4_FLAG_USE_FPSCR)
SH4_INSTR(FNEG,             "fneg    frn",           1111nnnn01001101, 1, SH4_FLAG_USE_FPSCR)
SH4_INSTR(FSQRT,            "fsqrt   frn",           1111nnnn01101101, 1, SH4_FLAG_USE_FPSCR)
SH4_INSTR(FSUB,             "fsub    frm, frn",      1111nnnnmmmm0001, 1, SH4_FLAG_USE_FPSCR)
SH4_INSTR(FTRC,             "ftrc    frn, fpul",     1111mmmm00111101, 1, SH4_FLAG_USE_FPSCR)


/* floating-point double precision instructions,
   some merged with single precision instructions */
SH4_INSTR(FCNVDS,    "fcnvds  drn, fpul",            1111mmmm10111101, 1, SH4_FLAG_USE_FPSCR)
SH4_INSTR(FCNVSD,    "fcnvsd  fpul, drn",            1111nnnn10101101, 1, SH4_FLAG_USE_FPSCR)


/* floating-point control instructions */
SH4_INSTR(LDSFPSCR,  "lds     rn, fpscr",            0100mmmm01101010, 1, SH4_FLAG_STORE_FPSCR)
SH4_INSTR(LDSFPUL,   "lds     rn, fpul",             0100mmmm01011010, 1, 0)
SH4_INSTR(LDSMFPSCR, "lds.l   @rn+, fpscr",          0100mmmm01100110, 1, SH4_FLAG_LOAD | SH4_FLAG_STORE_FPSCR)
SH4_INSTR(LDSMFPUL,  "lds.l   @rn+, fpul",           0100mmmm01010110, 1, SH4_FLAG_LOAD)
SH4_INSTR(STSFPSCR,  "sts     fpscr, rn",            0000nnnn01101010, 1, 0)
SH4_INSTR(STSFPUL,   "sts     fpul, rn",             0000nnnn01011010, 1, 0)
SH4_INSTR(STSMFPSCR, "sts.l   fpscr, @-rn",          0100nnnn01100010, 1, SH4_FLAG_STORE)
SH4_INSTR(STSMFPUL,  "sts.l   fpul, @-rn",           0100nnnn01010010, 1, SH4_FLAG_STORE)


/* floating-point graphics acceleration instructions,
   some merged with single precision instructions */
SH4_INSTR(FIPR,      "fipr    fvm, fvn",             1111nnmm11101101, 1, 0)
SH4_INSTR(FSCA,      "fsca    fpul, drn",            1111nnn011111101, 1, 0)
SH4_INSTR(FTRV,      "ftrv    xmtrx, fvn",           1111nn0111111101, 1, 0)
SH4_INSTR(FRCHG,     "frchg",                        1111101111111101, 1, SH4_FLAG_STORE_FPSCR)
SH4_INSTR(FSCHG,     "fschg",                        1111001111111101, 1, SH4_FLAG_STORE_FPSCR)
