diff --git a/source/core/Nes_Core.cpp b/source/core/Nes_Core.cpp index 7d5b6cb..4218e1c 100644 --- a/source/core/Nes_Core.cpp +++ b/source/core/Nes_Core.cpp @@ -210,12 +210,6 @@ void Nes_Core::enable_sram( bool b, bool read_only ) } } -// Unmapped memory - -void Nes_Core::log_unmapped( nes_addr_t addr, int data ) -{ -} - inline void Nes_Core::cpu_adjust_time( int n ) { ppu_2002_time -= n; @@ -277,10 +271,6 @@ void Nes_Core::write_io( nes_addr_t addr, int data ) } return; } - - #ifndef NDEBUG - log_unmapped( addr, data ); - #endif } int Nes_Core::read_io( nes_addr_t addr ) @@ -299,10 +289,6 @@ int Nes_Core::read_io( nes_addr_t addr ) if ( addr == Nes_Apu::status_addr ) return impl->apu.read_status( clock() ); - #ifndef NDEBUG - log_unmapped( addr ); - #endif - return addr >> 8; // simulate open bus } diff --git a/source/core/Nes_Ppu_Impl.cpp b/source/core/Nes_Ppu_Impl.cpp index 90dd383..a356294 100644 --- a/source/core/Nes_Ppu_Impl.cpp +++ b/source/core/Nes_Ppu_Impl.cpp @@ -38,13 +38,6 @@ Nes_Ppu_Impl::Nes_Ppu_Impl() mmc24_latched[0] = 0; mmc24_latched[1] = 0; - #if !defined(NDEBUG) && !defined(PSP) && !defined(PS2) - // verify that unaligned accesses work - static unsigned char b [19] = { 0 }; - static unsigned char b2 [19] = { 1,2,3,4,0,5,6,7,8,0,9,0,1,2,0,3,4,5,6 }; - for ( int i = 0; i < 19; i += 5 ) - *(volatile uint32_t*) &b [i] = *(volatile uint32_t*) &b2 [i]; - #endif } Nes_Ppu_Impl::~Nes_Ppu_Impl() diff --git a/source/core/nes_cpu_io.h b/source/core/nes_cpu_io.h index bf02c9e..d8837f0 100644 --- a/source/core/nes_cpu_io.h +++ b/source/core/nes_cpu_io.h @@ -41,10 +41,6 @@ int Nes_Core::cpu_read( nes_addr_t addr, nes_time_t time ) if ( addr < lrom_readable ) return *cpu::get_code( addr ); - #ifndef NDEBUG - log_unmapped( addr ); - #endif - return addr >> 8; // simulate open bus } @@ -120,10 +116,6 @@ void Nes_Core::cpu_write( nes_addr_t addr, int data, nes_time_t time ) mapper->write( clock_, addr, data ); return; } - - #ifndef NDEBUG - log_unmapped( addr, data ); - #endif } #define NES_CPU_READ_PPU( cpu, addr, time ) \