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Merge pull request #14 from SergioMartin86/testFix 

Test fix
This commit is contained in:
Sergio Martin 2024-01-27 20:34:46 +01:00 committed by GitHub
parent 19ab6200be 9e8b723694
commit 1b8017fd09
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GPG Key ID: B5690EEEBB952194
37 changed files with 182630 additions and 182746 deletions
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57
meson.build
View File

@ -21,34 +21,39 @@ quickerNESPlayerSrc = [
'extern/hqn/hqn_surface.cpp',
]
if get_option('buildPlayer') == true
executable('player',
'source/player.cpp',
cpp_args : [ commonCompileArgs, '-DNCURSES' ],
dependencies : [ quickerNESDependency, toolDependency, dependency('sdl2'), dependency('SDL2_image') ],
include_directories : include_directories(['source']),
link_args : [ '-lncurses' ],
sources : quickerNESPlayerSrc
# Do not build any targets if this is a subproject
if meson.is_subproject() == false
if get_option('buildPlayer') == true
executable('player',
'source/player.cpp',
cpp_args : [ commonCompileArgs, '-DNCURSES' ],
dependencies : [ quickerNESDependency, toolDependency, dependency('sdl2'), dependency('SDL2_image') ],
include_directories : include_directories(['source']),
link_args : [ '-lncurses' ],
sources : quickerNESPlayerSrc
)
endif
# Building tester tool for QuickerNES
quickerNESTester = executable('quickerNESTester',
'source/tester.cpp',
cpp_args : [ commonCompileArgs, '-Werror' ],
dependencies : [ quickerNESDependency, toolDependency ],
include_directories : include_directories(['../extern/json'])
)
endif
# Building tester tool for QuickerNES
# Building tester tool for the original QuickNES
quickerNESTester = executable('quickerNESTester',
'source/tester.cpp',
cpp_args : [ commonCompileArgs, '-Werror' ],
dependencies : [ quickerNESDependency, toolDependency ],
include_directories : include_directories(['../extern/json'])
)
quickNESTester = executable('quickNESTester',
'source/tester.cpp',
cpp_args : [ commonCompileArgs, '-w', '-DDISABLE_AUTO_FILE', '-D__LIBRETRO__', '-DNDEBUG', '-DBLARGG_NONPORTABLE' ],
dependencies : [ quickNESDependency, toolDependency ],
include_directories : include_directories(['../extern/json'])
)
# Building tester tool for the original QuickNES
# Building tests
subdir('tests')
quickNESTester = executable('quickNESTester',
'source/tester.cpp',
cpp_args : [ commonCompileArgs, '-w', '-DDISABLE_AUTO_FILE', '-D__LIBRETRO__', '-DNDEBUG', '-DBLARGG_NONPORTABLE' ],
dependencies : [ quickNESDependency, toolDependency ],
include_directories : include_directories(['../extern/json'])
)
# Building tests
subdir('tests')
endif # If not subproject

3
source/controller.hpp
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@ -137,9 +137,6 @@ public:
// Pushing input code into the port
port = code;
// Adding joypad signature
port |= ~0xFF;
}
// If its fourscore, its like two joypads separated by a |

52
source/emuInstanceBase.hpp
View File

@ -85,14 +85,14 @@ class EmuInstanceBase
std::string stateData;
bool status = loadStringFromFile(stateData, stateFilePath);
if (status == false) EXIT_WITH_ERROR("Could not find/read state file: %s\n", stateFilePath.c_str());
deserializeFullState((uint8_t *)stateData.data());
deserializeState((uint8_t *)stateData.data());
}
inline void saveStateFile(const std::string &stateFilePath) const
{
std::string stateData;
stateData.resize(_fullStateSize);
serializeFullState((uint8_t *)stateData.data());
stateData.resize(_stateSize);
serializeState((uint8_t *)stateData.data());
saveStringToFile(stateData, stateFilePath.c_str());
}
@ -110,30 +110,38 @@ class EmuInstanceBase
if (status == false) EXIT_WITH_ERROR("Could not process ROM file: %s\n", romFilePath.c_str());
// Detecting full state size
_fullStateSize = getFullStateSize();
_stateSize = getStateSize();
}
// Detecting lite state size
_liteStateSize = getLiteStateSize();
void enableStateBlock(const std::string& block)
{
// Calling implementation
enableStateBlockImpl(block);
// Recalculating State size
_stateSize = getStateSize();
}
void disableStateBlock(const std::string& block)
{
// Calling implementation
disableStateBlockImpl(block);
// Recalculating State Size
_stateSize = getStateSize();
}
// Virtual functions
virtual bool loadROMFileImpl(const std::string &romFilePath) = 0;
virtual void advanceStateImpl(const Controller::port_t controller1, const Controller::port_t controller2) = 0;
virtual uint8_t *getLowMem() const = 0;
virtual uint8_t *getNametableMem() const = 0;
virtual uint8_t *getHighMem() const = 0;
virtual const uint8_t *getChrMem() const = 0;
virtual size_t getChrMemSize() const = 0;
virtual void serializeFullState(uint8_t *state) const = 0;
virtual void deserializeFullState(const uint8_t *state) = 0;
virtual void serializeLiteState(uint8_t *state) const = 0;
virtual void deserializeLiteState(const uint8_t *state) = 0;
virtual size_t getFullStateSize() const = 0;
virtual size_t getLiteStateSize() const = 0;
virtual void enableLiteStateBlock(const std::string& block) = 0;
virtual void disableLiteStateBlock(const std::string& block) = 0;
virtual void serializeState(uint8_t *state) const = 0;
virtual void deserializeState(const uint8_t *state) = 0;
virtual size_t getStateSize() const = 0;
virtual void doSoftReset() = 0;
virtual void doHardReset() = 0;
virtual std::string getCoreName() const = 0;
@ -141,11 +149,13 @@ class EmuInstanceBase
protected:
// Storage for the light state size
size_t _liteStateSize;
virtual void enableStateBlockImpl(const std::string& block) = 0;
virtual void disableStateBlockImpl(const std::string& block) = 0;
virtual bool loadROMFileImpl(const std::string &romFilePath) = 0;
virtual void advanceStateImpl(const Controller::port_t controller1, const Controller::port_t controller2) = 0;
// Storage for the full state size
size_t _fullStateSize;
// Storage for the light state size
size_t _stateSize;
// Flag to determine whether to enable/disable rendering
bool _doRendering = true;

6
source/playbackInstance.hpp
View File

@ -28,8 +28,8 @@ class PlaybackInstance
{
stepData_t step;
step.input = input;
step.stateData = (uint8_t *)malloc(_emu->getFullStateSize());
_emu->serializeFullState(step.stateData);
step.stateData = (uint8_t *)malloc(_emu->getStateSize());
_emu->serializeState(step.stateData);
step.hash = _emu->getStateHash();
// Adding the step into the sequence
@ -160,7 +160,7 @@ class PlaybackInstance
if (stepId > 0)
{
const auto stateData = getStateData(stepId - 1);
_emu->deserializeFullState(stateData);
_emu->deserializeState(stateData);
_emu->advanceState(getStateInput(stepId - 1));
}

2
source/player.cpp
View File

@ -107,7 +107,7 @@ int main(int argc, char *argv[])
auto p = PlaybackInstance(&e, sequence);
// Getting state size
auto stateSize = e.getFullStateSize();
auto stateSize = e.getStateSize();
// Flag to continue running playback
bool continueRunning = true;

18
source/quickNES/emuInstance.hpp
View File

@ -47,28 +47,24 @@ class EmuInstance : public EmuInstanceBase
const uint8_t *getChrMem() const override { return _nes->chr_mem(); };
size_t getChrMemSize() const override { return _nes->chr_size(); };
void serializeLiteState(uint8_t *state) const override { serializeFullState(state); }
void deserializeLiteState(const uint8_t *state) override { deserializeFullState(state); }
inline size_t getLiteStateSize() const override { return getFullStateSize(); }
void enableStateBlockImpl(const std::string& block) override {};
void disableStateBlockImpl(const std::string& block) override {};
void enableLiteStateBlock(const std::string& block) override {};
void disableLiteStateBlock(const std::string& block) override {};
void serializeFullState(uint8_t *state) const override
void serializeState(uint8_t *state) const override
{
Mem_Writer w(state, _fullStateSize, 0);
Mem_Writer w(state, _stateSize, 0);
Auto_File_Writer a(w);
_nes->save_state(a);
}
void deserializeFullState(const uint8_t *state) override
void deserializeState(const uint8_t *state) override
{
Mem_File_Reader r(state, _fullStateSize);
Mem_File_Reader r(state, _stateSize);
Auto_File_Reader a(r);
_nes->load_state(a);
}
inline size_t getFullStateSize() const override
inline size_t getStateSize() const override
{
uint8_t *data = (uint8_t *)malloc(_DUMMY_SIZE);
Mem_Writer w(data, _DUMMY_SIZE);

772
source/quickerNES/core/core.hpp
View File

@ -93,6 +93,7 @@ class Core : private Cpu
bool NTABBlockEnabled = true;
bool CHRRBlockEnabled = true;
bool SRAMBlockEnabled = true;
bool HEADBlockEnabled = true;
Core() : ppu(this)
{
@ -150,7 +151,7 @@ class Core : private Cpu
reset(true, true);
}
size_t serializeFullState(uint8_t *buffer) const
size_t serializeState(uint8_t *buffer) const
{
size_t pos = 0;
std::string headerCode;
@ -158,153 +159,247 @@ class Core : private Cpu
uint32_t blockSize = 0;
void *dataSource;
headerCode = "NESS"; // NESS Block
blockSize = 0xFFFFFFFF;
if (buffer != nullptr) memcpy(&buffer[pos], headerCode.data(), headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], &blockSize, headerSize);
pos += headerSize;
headerCode = "TIME"; // TIME Block
nes_state_t state = nes;
state.timestamp *= 5;
blockSize = sizeof(nes_state_t);
dataSource = (void *)&state;
if (buffer != nullptr) memcpy(&buffer[pos], headerCode.data(), headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], &blockSize, headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], dataSource, blockSize);
pos += blockSize;
headerCode = "CPUR"; // CPUR Block
cpu_state_t s;
memset(&s, 0, sizeof s);
s.pc = r.pc;
s.s = r.sp;
s.a = r.a;
s.x = r.x;
s.y = r.y;
s.p = r.status;
blockSize = sizeof(cpu_state_t);
dataSource = (void *)&s;
if (buffer != nullptr) memcpy(&buffer[pos], headerCode.data(), headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], &blockSize, headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], dataSource, blockSize);
pos += blockSize;
headerCode = "PPUR"; // PPUR Block
blockSize = sizeof(ppu_state_t);
dataSource = (void *)&ppu;
if (buffer != nullptr) memcpy(&buffer[pos], headerCode.data(), headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], &blockSize, headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], dataSource, blockSize);
pos += blockSize;
headerCode = "APUR"; // APUR Block
Apu::apu_state_t apuState;
impl->apu.save_state(&apuState);
blockSize = sizeof(Apu::apu_state_t);
if (buffer != nullptr) memcpy(&buffer[pos], headerCode.data(), headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], &blockSize, headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], &apuState, blockSize);
pos += blockSize;
headerCode = "CTRL"; // CTRL Block
blockSize = sizeof(joypad_state_t);
dataSource = (void *)&joypad;
if (buffer != nullptr) memcpy(&buffer[pos], headerCode.data(), headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], &blockSize, headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], dataSource, blockSize);
pos += blockSize;
headerCode = "MAPR"; // MAPR Block
blockSize = mapper->state_size;
dataSource = (void *)mapper->state;
if (buffer != nullptr) memcpy(&buffer[pos], headerCode.data(), headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], &blockSize, headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], dataSource, blockSize);
pos += blockSize;
headerCode = "LRAM"; // LRAM Block
blockSize = low_ram_size;
dataSource = (void *)low_mem;
if (buffer != nullptr) memcpy(&buffer[pos], headerCode.data(), headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], &blockSize, headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], dataSource, blockSize);
pos += blockSize;
headerCode = "SPRT"; // SPRT Block
blockSize = Ppu::spr_ram_size;
dataSource = (void *)ppu.spr_ram;
if (buffer != nullptr) memcpy(&buffer[pos], headerCode.data(), headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], &blockSize, headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], dataSource, blockSize);
pos += blockSize;
headerCode = "NTAB"; // NTAB Block
size_t nametable_size = 0x800;
if (ppu.nt_banks[3] >= &ppu.impl->nt_ram[0xC00]) nametable_size = 0x1000;
blockSize = nametable_size;
dataSource = (void *)ppu.impl->nt_ram;
if (buffer != nullptr) memcpy(&buffer[pos], headerCode.data(), headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], &blockSize, headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], dataSource, blockSize);
pos += blockSize;
if (ppu.chr_is_writable)
if (HEADBlockEnabled == true)
{
headerCode = "CHRR"; // CHRR Block
blockSize = ppu.chr_size;
dataSource = (void *)ppu.impl->chr_ram;
headerCode = "NESS"; // NESS Block
if (buffer != nullptr) memcpy(&buffer[pos], headerCode.data(), headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], &blockSize, headerSize);
pos += headerSize;
}
if (TIMEBlockEnabled == true)
{
nes_state_t state = nes;
state.timestamp *= 5;
blockSize = sizeof(nes_state_t);
dataSource = (void *)&state;
if (HEADBlockEnabled == true)
{
headerCode = "TIME"; // TIME Block
if (buffer != nullptr) memcpy(&buffer[pos], headerCode.data(), headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], &blockSize, headerSize);
pos += headerSize;
}
if (buffer != nullptr) memcpy(&buffer[pos], dataSource, blockSize);
pos += blockSize;
}
if (sram_present)
if (CPURBlockEnabled == true)
{
headerCode = "SRAM"; // SRAM Block
blockSize = impl->sram_size;
dataSource = (void *)impl->sram;
cpu_state_t s;
memset(&s, 0, sizeof s);
s.pc = r.pc;
s.s = r.sp;
s.a = r.a;
s.x = r.x;
s.y = r.y;
s.p = r.status;
blockSize = sizeof(cpu_state_t);
dataSource = (void *)&s;
if (HEADBlockEnabled == true)
{
headerCode = "CPUR"; // CPUR Block
if (buffer != nullptr) memcpy(&buffer[pos], headerCode.data(), headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], &blockSize, headerSize);
pos += headerSize;
}
if (buffer != nullptr) memcpy(&buffer[pos], dataSource, blockSize);
pos += blockSize;
}
if (PPURBlockEnabled == true)
{
blockSize = sizeof(ppu_state_t);
dataSource = (void *)&ppu;
if (HEADBlockEnabled == true)
{
headerCode = "PPUR"; // PPUR Block
if (buffer != nullptr) memcpy(&buffer[pos], headerCode.data(), headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], &blockSize, headerSize);
pos += headerSize;
}
if (buffer != nullptr) memcpy(&buffer[pos], dataSource, blockSize);
pos += blockSize;
}
if (APURBlockEnabled == true)
{
Apu::apu_state_t apuState;
impl->apu.save_state(&apuState);
blockSize = sizeof(Apu::apu_state_t);
if (HEADBlockEnabled == true)
{
headerCode = "APUR"; // APUR Block
if (buffer != nullptr) memcpy(&buffer[pos], headerCode.data(), headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], &blockSize, headerSize);
pos += headerSize;
}
if (buffer != nullptr) memcpy(&buffer[pos], &apuState, blockSize);
pos += blockSize;
}
if (CTRLBlockEnabled == true)
{
blockSize = sizeof(joypad_state_t);
dataSource = (void *)&joypad;
if (HEADBlockEnabled == true)
{
headerCode = "CTRL"; // CTRL Block
if (buffer != nullptr) memcpy(&buffer[pos], headerCode.data(), headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], &blockSize, headerSize);
pos += headerSize;
}
if (buffer != nullptr) memcpy(&buffer[pos], dataSource, blockSize);
pos += blockSize;
}
if (MAPRBlockEnabled == true)
{
blockSize = mapper->state_size;
dataSource = (void *)mapper->state;
if (HEADBlockEnabled == true)
{
headerCode = "MAPR"; // MAPR Block
if (buffer != nullptr) memcpy(&buffer[pos], headerCode.data(), headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], &blockSize, headerSize);
pos += headerSize;
}
if (buffer != nullptr) memcpy(&buffer[pos], dataSource, blockSize);
pos += blockSize;
}
if (LRAMBlockEnabled == true)
{
blockSize = low_ram_size;
dataSource = (void *)low_mem;
if (HEADBlockEnabled == true)
{
headerCode = "LRAM"; // LRAM Block
if (buffer != nullptr) memcpy(&buffer[pos], headerCode.data(), headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], &blockSize, headerSize);
pos += headerSize;
}
if (buffer != nullptr) memcpy(&buffer[pos], dataSource, blockSize);
pos += blockSize;
}
if (SPRTBlockEnabled == true)
{
blockSize = Ppu::spr_ram_size;
dataSource = (void *)ppu.spr_ram;
if (HEADBlockEnabled == true)
{
headerCode = "SPRT"; // SPRT Block
if (buffer != nullptr) memcpy(&buffer[pos], headerCode.data(), headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], &blockSize, headerSize);
pos += headerSize;
}
if (buffer != nullptr) memcpy(&buffer[pos], dataSource, blockSize);
pos += blockSize;
}
if (NTABBlockEnabled == true)
{
size_t nametable_size = 0x800;
if (ppu.nt_banks[3] >= &ppu.impl->nt_ram[0xC00]) nametable_size = 0x1000;
blockSize = nametable_size;
dataSource = (void *)ppu.impl->nt_ram;
if (HEADBlockEnabled == true)
{
headerCode = "NTAB"; // NTAB Block
if (buffer != nullptr) memcpy(&buffer[pos], headerCode.data(), headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], &blockSize, headerSize);
pos += headerSize;
}
if (buffer != nullptr) memcpy(&buffer[pos], dataSource, blockSize);
pos += blockSize;
}
if (CHRRBlockEnabled == true)
{
if (ppu.chr_is_writable)
{
blockSize = ppu.chr_size;
dataSource = (void *)ppu.impl->chr_ram;
if (HEADBlockEnabled == true)
{
headerCode = "CHRR"; // CHRR Block
if (buffer != nullptr) memcpy(&buffer[pos], headerCode.data(), headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], &blockSize, headerSize);
pos += headerSize;
}
if (buffer != nullptr) memcpy(&buffer[pos], dataSource, blockSize);
pos += blockSize;
}
}
if (SRAMBlockEnabled == true)
{
if (sram_present)
{
blockSize = impl->sram_size;
dataSource = (void *)impl->sram;
if (HEADBlockEnabled == true)
{
headerCode = "SRAM"; // SRAM Block
if (buffer != nullptr) memcpy(&buffer[pos], headerCode.data(), headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], &blockSize, headerSize);
pos += headerSize;
}
if (buffer != nullptr) memcpy(&buffer[pos], dataSource, blockSize);
pos += blockSize;
}
}
if (HEADBlockEnabled == true)
{
headerCode = "gend"; // gend Block
blockSize = 0;
if (buffer != nullptr) memcpy(&buffer[pos], headerCode.data(), headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], &blockSize, headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], dataSource, blockSize);
pos += blockSize;
}
headerCode = "gend"; // gend Block
blockSize = 0;
if (buffer != nullptr) memcpy(&buffer[pos], headerCode.data(), headerSize);
pos += headerSize;
if (buffer != nullptr) memcpy(&buffer[pos], &blockSize, headerSize);
pos += headerSize;
return pos; // Bytes written
}
size_t deserializeFullState(const uint8_t *buffer)
size_t deserializeState(const uint8_t *buffer)
{
disable_rendering();
error_count = 0;
@ -315,119 +410,140 @@ class Core : private Cpu
uint32_t blockSize = 0;
// NESS Block
pos += headerSize;
pos += headerSize;
if (HEADBlockEnabled == true) pos += 2 * headerSize;
// TIME Block
nes_state_t nesState;
pos += headerSize;
pos += headerSize;
blockSize = sizeof(nes_state_t);
memcpy(&nesState, &buffer[pos], blockSize);
pos += blockSize;
nes = nesState;
nes.timestamp /= 5;
if (TIMEBlockEnabled == true)
{
nes_state_t nesState;
if (HEADBlockEnabled == true) pos += 2 * headerSize;
blockSize = sizeof(nes_state_t);
memcpy(&nesState, &buffer[pos], blockSize);
pos += blockSize;
nes = nesState;
nes.timestamp /= 5;
}
// CPUR Block
cpu_state_t s;
blockSize = sizeof(cpu_state_t);
pos += headerSize;
pos += headerSize;
memcpy((void *)&s, &buffer[pos], blockSize);
pos += blockSize;
r.pc = s.pc;
r.sp = s.s;
r.a = s.a;
r.x = s.x;
r.y = s.y;
r.status = s.p;
if (CPURBlockEnabled == true)
{
cpu_state_t s;
blockSize = sizeof(cpu_state_t);
if (HEADBlockEnabled == true) pos += 2 * headerSize;
memcpy((void *)&s, &buffer[pos], blockSize);
pos += blockSize;
r.pc = s.pc;
r.sp = s.s;
r.a = s.a;
r.x = s.x;
r.y = s.y;
r.status = s.p;
}
// PPUR Block
blockSize = sizeof(ppu_state_t);
pos += headerSize;
pos += headerSize;
memcpy((void *)&ppu, &buffer[pos], blockSize);
pos += blockSize;
if (PPURBlockEnabled == true)
{
blockSize = sizeof(ppu_state_t);
if (HEADBlockEnabled == true) pos += 2 * headerSize;
memcpy((void *)&ppu, &buffer[pos], blockSize);
pos += blockSize;
}
// APUR Block
Apu::apu_state_t apuState;
blockSize = sizeof(Apu::apu_state_t);
pos += headerSize;
pos += headerSize;
memcpy(&apuState, &buffer[pos], blockSize);
pos += blockSize;
impl->apu.load_state(apuState);
impl->apu.end_frame(-(int)nes.timestamp / ppu_overclock);
if (APURBlockEnabled == true)
{
Apu::apu_state_t apuState;
blockSize = sizeof(Apu::apu_state_t);
if (HEADBlockEnabled == true) pos += 2 * headerSize;
memcpy(&apuState, &buffer[pos], blockSize);
pos += blockSize;
impl->apu.load_state(apuState);
impl->apu.end_frame(-(int)nes.timestamp / ppu_overclock);
}
// CTRL Block
blockSize = sizeof(joypad_state_t);
pos += headerSize;
pos += headerSize;
memcpy((void *)&joypad, &buffer[pos], blockSize);
pos += blockSize;
if (CTRLBlockEnabled == true)
{
blockSize = sizeof(joypad_state_t);
if (HEADBlockEnabled == true) pos += 2 * headerSize;
memcpy((void *)&joypad, &buffer[pos], blockSize);
pos += blockSize;
}
// MAPR Block
mapper->default_reset_state();
blockSize = mapper->state_size;
pos += headerSize;
pos += headerSize;
memcpy((void *)mapper->state, &buffer[pos], blockSize);
pos += blockSize;
mapper->apply_mapping();
if (MAPRBlockEnabled == true)
{
mapper->default_reset_state();
blockSize = mapper->state_size;
if (HEADBlockEnabled == true) pos += 2 * headerSize;
memcpy((void *)mapper->state, &buffer[pos], blockSize);
pos += blockSize;
mapper->apply_mapping();
}
// LRAM Block
blockSize = low_ram_size;
pos += headerSize;
pos += headerSize;
memcpy((void *)low_mem, &buffer[pos], blockSize);
pos += blockSize;
if (LRAMBlockEnabled == true)
{
blockSize = low_ram_size;
if (HEADBlockEnabled == true) pos += 2 * headerSize;
memcpy((void *)low_mem, &buffer[pos], blockSize);
pos += blockSize;
}
// SPRT Block
blockSize = Ppu::spr_ram_size;
pos += headerSize;
pos += headerSize;
memcpy((void *)ppu.spr_ram, &buffer[pos], blockSize);
pos += blockSize;
if (SPRTBlockEnabled == true)
{
blockSize = Ppu::spr_ram_size;
if (HEADBlockEnabled == true) pos += 2 * headerSize;
memcpy((void *)ppu.spr_ram, &buffer[pos], blockSize);
pos += blockSize;
}
// NTAB Block
size_t nametable_size = 0x800;
if (ppu.nt_banks[3] >= &ppu.impl->nt_ram[0xC00]) nametable_size = 0x1000;
blockSize = nametable_size;
pos += headerSize;
pos += headerSize;
memcpy((void *)ppu.impl->nt_ram, &buffer[pos], blockSize);
pos += blockSize;
if (ppu.chr_is_writable)
if (NTABBlockEnabled == true)
{
// CHRR Block
blockSize = ppu.chr_size;
pos += headerSize;
pos += headerSize;
memcpy((void *)ppu.impl->chr_ram, &buffer[pos], blockSize);
size_t nametable_size = 0x800;
if (ppu.nt_banks[3] >= &ppu.impl->nt_ram[0xC00]) nametable_size = 0x1000;
blockSize = nametable_size;
if (HEADBlockEnabled == true) pos += 2 * headerSize;
memcpy((void *)ppu.impl->nt_ram, &buffer[pos], blockSize);
pos += blockSize;
ppu.all_tiles_modified();
}
if (sram_present)
if (CHRRBlockEnabled == true)
{
// SRAM Block
blockSize = impl->sram_size;
pos += headerSize;
pos += headerSize;
memcpy((void *)impl->sram, &buffer[pos], blockSize);
pos += blockSize;
enable_sram(true);
if (ppu.chr_is_writable)
{
// CHRR Block
blockSize = ppu.chr_size;
if (HEADBlockEnabled == true) pos += 2 * headerSize;
memcpy((void *)ppu.impl->chr_ram, &buffer[pos], blockSize);
pos += blockSize;
ppu.all_tiles_modified();
}
}
if (SRAMBlockEnabled == true)
{
if (sram_present)
{
// SRAM Block
blockSize = impl->sram_size;
if (HEADBlockEnabled == true) pos += 2 * headerSize;
memcpy((void *)impl->sram, &buffer[pos], blockSize);
pos += blockSize;
}
}
if (sram_present) enable_sram(true);
// headerCode = "gend"; // gend Block
pos += headerSize;
pos += headerSize;
if (HEADBlockEnabled == true) pos += 2 * headerSize;
return pos; // Bytes read
}
void enableLiteStateBlock(const std::string& block)
void enableStateBlock(const std::string& block)
{
bool recognizedBlock = false;
@ -442,12 +558,13 @@ void enableLiteStateBlock(const std::string& block)
if (block == "NTAB") { NTABBlockEnabled = true; recognizedBlock = true; }
if (block == "CHRR") { CHRRBlockEnabled = true; recognizedBlock = true; }
if (block == "SRAM") { SRAMBlockEnabled = true; recognizedBlock = true; }
if (block == "HEAD") { HEADBlockEnabled = true; recognizedBlock = true; }
if (recognizedBlock == false) { fprintf(stderr, "Unrecognized block type: %s\n", block.c_str()); exit(-1);}
};
void disableLiteStateBlock(const std::string& block)
void disableStateBlock(const std::string& block)
{
bool recognizedBlock = false;
@ -462,241 +579,12 @@ void disableLiteStateBlock(const std::string& block)
if (block == "NTAB") { NTABBlockEnabled = false; recognizedBlock = true; }
if (block == "CHRR") { CHRRBlockEnabled = false; recognizedBlock = true; }
if (block == "SRAM") { SRAMBlockEnabled = false; recognizedBlock = true; }
if (block == "HEAD") { HEADBlockEnabled = false; recognizedBlock = true; }
if (recognizedBlock == false) { fprintf(stderr, "Unrecognized block type: %s\n", block.c_str()); exit(-1);}
};
size_t serializeLiteState(uint8_t *buffer) const
{
size_t pos = 0;
uint32_t blockSize = 0;
void *dataSource;
if (TIMEBlockEnabled == true)
{
nes_state_lite_t state;
state.timestamp = nes.timestamp;
state.frame_count = (uint8_t)nes.frame_count;
state.timestamp *= 5;
blockSize = sizeof(nes_state_lite_t);
dataSource = (void *)&state;
if (buffer != nullptr) memcpy(&buffer[pos], dataSource, blockSize);
pos += blockSize;
}
if (CPURBlockEnabled == true)
{
blockSize = sizeof(cpu::registers_t);
dataSource = (void *)&r;
if (buffer != nullptr) memcpy(&buffer[pos], dataSource, blockSize);
pos += blockSize;
}
if (PPURBlockEnabled == true)
{
blockSize = sizeof(ppu_state_t);
dataSource = (void *)&ppu;
if (buffer != nullptr) memcpy(&buffer[pos], dataSource, blockSize);
pos += blockSize;
}
if (APURBlockEnabled == true)
{
Apu::apu_state_t apuState;
impl->apu.save_state(&apuState);
blockSize = sizeof(Apu::apu_state_t);
if (buffer != nullptr) memcpy(&buffer[pos], &apuState, blockSize);
pos += blockSize;
}
if (CTRLBlockEnabled == true)
{
blockSize = sizeof(joypad_state_t);
dataSource = (void *)&joypad;
if (buffer != nullptr) memcpy(&buffer[pos], dataSource, blockSize);
pos += blockSize;
}
if (MAPRBlockEnabled == true)
{
blockSize = mapper->state_size;
dataSource = (void *)mapper->state;
if (buffer != nullptr) memcpy(&buffer[pos], dataSource, blockSize);
pos += blockSize;
}
if (LRAMBlockEnabled == true)
{
blockSize = low_ram_size;
dataSource = (void *)low_mem;
if (buffer != nullptr) memcpy(&buffer[pos], dataSource, blockSize);
pos += blockSize;
}
if (SPRTBlockEnabled == true)
{
blockSize = Ppu::spr_ram_size;
dataSource = (void *)ppu.spr_ram;
if (buffer != nullptr) memcpy(&buffer[pos], dataSource, blockSize);
pos += blockSize;
}
if (NTABBlockEnabled == true)
{
size_t nametable_size = 0x800;
if (ppu.nt_banks[3] >= &ppu.impl->nt_ram[0xC00]) nametable_size = 0x1000;
blockSize = nametable_size;
dataSource = (void *)ppu.impl->nt_ram;
if (buffer != nullptr) memcpy(&buffer[pos], dataSource, blockSize);
pos += blockSize;
}
if (CHRRBlockEnabled == true)
{
if (ppu.chr_is_writable)
{
blockSize = ppu.chr_size;
dataSource = (void *)ppu.impl->chr_ram;
if (buffer != nullptr) memcpy(&buffer[pos], dataSource, blockSize);
pos += blockSize;
}
}
if (SRAMBlockEnabled == true)
{
if (sram_present)
{
blockSize = impl->sram_size;
dataSource = (void *)impl->sram;
if (buffer != nullptr) memcpy(&buffer[pos], dataSource, blockSize);
pos += blockSize;
}
}
return pos; // Bytes written
}
size_t deserializeLiteState(const uint8_t *buffer)
{
disable_rendering();
error_count = 0;
ppu.burst_phase = 0; // avoids shimmer when seeking to same time over and over
size_t pos = 0;
uint32_t blockSize = 0;
// TIME Block
if (TIMEBlockEnabled == true)
{
nes_state_lite_t nesState;
blockSize = sizeof(nes_state_lite_t);
memcpy(&nesState, &buffer[pos], blockSize);
pos += blockSize;
nes.frame_count = nesState.frame_count;
nes.timestamp = nesState.timestamp;
nes.timestamp /= 5;
}
// CPUR Block
if (CPURBlockEnabled == true)
{
blockSize = sizeof(cpu::registers_t);
memcpy((void *)&r, &buffer[pos], blockSize);
pos += blockSize;
}
// PPUR Block
if (PPURBlockEnabled == true)
{
blockSize = sizeof(ppu_state_t);
memcpy((void *)&ppu, &buffer[pos], blockSize);
pos += blockSize;
}
// APUR Block
if (APURBlockEnabled == true)
{
Apu::apu_state_t apuState;
blockSize = sizeof(Apu::apu_state_t);
memcpy(&apuState, &buffer[pos], blockSize);
pos += blockSize;
impl->apu.load_state(apuState);
impl->apu.end_frame(-(int)nes.timestamp / ppu_overclock);
}
// CTRL Block
if (CTRLBlockEnabled == true)
{
blockSize = sizeof(joypad_state_t);
memcpy((void *)&joypad, &buffer[pos], blockSize);
pos += blockSize;
}
// MAPR Block
if (MAPRBlockEnabled == true)
{
mapper->default_reset_state();
blockSize = mapper->state_size;
memcpy((void *)mapper->state, &buffer[pos], blockSize);
pos += blockSize;
mapper->apply_mapping();
}
// LRAM Block
if (LRAMBlockEnabled == true)
{
blockSize = low_ram_size;
memcpy((void *)low_mem, &buffer[pos], blockSize);
pos += blockSize;
}
// SPRT Block
if (SPRTBlockEnabled == true)
{
blockSize = Ppu::spr_ram_size;
memcpy((void *)ppu.spr_ram, &buffer[pos], blockSize);
pos += blockSize;
}
// NTAB Block
if (NTABBlockEnabled == true)
{
size_t nametable_size = 0x800;
if (ppu.nt_banks[3] >= &ppu.impl->nt_ram[0xC00]) nametable_size = 0x1000;
blockSize = nametable_size;
memcpy((void *)ppu.impl->nt_ram, &buffer[pos], blockSize);
pos += blockSize;
}
if (CHRRBlockEnabled == true)
{
if (ppu.chr_is_writable)
{
// CHRR Block
blockSize = ppu.chr_size;
memcpy((void *)ppu.impl->chr_ram, &buffer[pos], blockSize);
pos += blockSize;
ppu.all_tiles_modified();
}
}
if (SRAMBlockEnabled == true)
{
if (sram_present)
{
// SRAM Block
blockSize = impl->sram_size;
memcpy((void *)impl->sram, &buffer[pos], blockSize);
pos += blockSize;
}
}
if (sram_present) enable_sram(true);
return pos; // Bytes read
}
void reset(bool full_reset, bool erase_battery_ram)
{
if (full_reset)

16
source/quickerNES/core/emu.hpp
View File

@ -45,17 +45,11 @@ class Emu
const uint8_t *getHostPixels() const { return emu.ppu.host_pixels; }
// Save emulator state variants
size_t serializeFullState(uint8_t *buffer) const { return emu.serializeFullState(buffer); }
size_t serializeLiteState(uint8_t *buffer) const { return emu.serializeLiteState(buffer); }
size_t deserializeFullState(const uint8_t *buffer) { return emu.deserializeFullState(buffer); }
size_t deserializeLiteState(const uint8_t *buffer) { return emu.deserializeLiteState(buffer); }
size_t getLiteStateSize() const { return emu.serializeLiteState(nullptr); }
size_t getFullStateSize() const { return emu.serializeFullState(nullptr); }
void enableLiteStateBlock(const std::string& block) { emu.enableLiteStateBlock(block); };
void disableLiteStateBlock(const std::string& block) { emu.disableLiteStateBlock(block); };
size_t serializeState(uint8_t *buffer) const { return emu.serializeState(buffer); }
size_t deserializeState(const uint8_t *buffer) { return emu.deserializeState(buffer); }
size_t getStateSize() const { return emu.serializeState(nullptr); }
void enableStateBlock(const std::string& block) { emu.enableStateBlock(block); };
void disableStateBlock(const std::string& block) { emu.disableStateBlock(block); };
// Basic emulation

16
source/quickerNES/emuInstance.hpp
View File

@ -35,17 +35,11 @@ class EmuInstance : public EmuInstanceBase
const uint8_t *getChrMem() const override { return _nes->chr_mem(); };
size_t getChrMemSize() const override { return _nes->chr_size(); };
void serializeFullState(uint8_t *state) const override { _nes->serializeFullState(state); }
void deserializeFullState(const uint8_t *state) override { _nes->deserializeFullState(state); }
void serializeLiteState(uint8_t *state) const override { _nes->serializeLiteState(state); }
void deserializeLiteState(const uint8_t *state) override { _nes->deserializeLiteState(state); }
size_t getFullStateSize() const override { return _nes->getFullStateSize(); }
size_t getLiteStateSize() const override { return _nes->getLiteStateSize(); }
void enableLiteStateBlock(const std::string& block) override { _nes->enableLiteStateBlock(block); };
void disableLiteStateBlock(const std::string& block) override { _nes->disableLiteStateBlock(block); };
void serializeState(uint8_t *state) const override { _nes->serializeState(state); }
void deserializeState(const uint8_t *state) override { _nes->deserializeState(state); }
size_t getStateSize() const override { return _nes->getStateSize(); }
void enableStateBlockImpl(const std::string& block) override { _nes->enableStateBlock(block); };
void disableStateBlockImpl(const std::string& block) override { _nes->disableStateBlock(block); };
void advanceStateImpl(const Controller::port_t controller1, const Controller::port_t controller2) override
{

20
source/tester.cpp
View File

@ -100,20 +100,20 @@ int main(int argc, char *argv[])
e.setController1Type(controller1Type);
e.setController2Type(controller2Type);
// Disabling requested blocks from light state serialization
for (const auto& block : stateDisabledBlocks) e.disableLiteStateBlock(block);
// Loading ROM File
e.loadROMFile(romFilePath);
// If an initial state is provided, load it now
if (initialStateFilePath != "") e.loadStateFile(initialStateFilePath);
// Disabling requested blocks from state serialization
for (const auto& block : stateDisabledBlocks) e.disableStateBlock(block);
// Disable rendering
e.disableRendering();
// Getting lite state size
const auto liteStateSize = e.getLiteStateSize();
// Getting state size
const auto stateSize = e.getStateSize();
// Getting actual ROM SHA1
auto romSHA1 = e.getRomSHA1();
@ -144,14 +144,14 @@ int main(int argc, char *argv[])
//printf("[] ROM SHA1: '%s'\n", romSHA1.c_str());
printf("[] Sequence File: '%s'\n", sequenceFilePath.c_str());
printf("[] Sequence Length: %lu\n", sequenceLength);
printf("[] State Size: %lu bytes - Disabled Blocks: [ %s ]\n", e.getLiteStateSize(), stateDisabledBlocksOutput.c_str());
printf("[] State Size: %lu bytes - Disabled Blocks: [ %s ]\n", e.getStateSize(), stateDisabledBlocksOutput.c_str());
printf("[] ********** Running Test **********\n");
fflush(stdout);
// Serializing initial state
uint8_t *currentState = (uint8_t *)malloc(liteStateSize);
e.serializeLiteState(currentState);
uint8_t *currentState = (uint8_t *)malloc(stateSize);
e.serializeState(currentState);
// Check whether to perform each action
bool doPreAdvance = cycleType == "Full";
@ -163,9 +163,9 @@ int main(int argc, char *argv[])
for (const std::string &input : sequence)
{
if (doPreAdvance == true) e.advanceState(input);
if (doDeserialize == true) e.deserializeLiteState(currentState);
if (doDeserialize == true) e.deserializeState(currentState);
e.advanceState(input);
if (doSerialize == true) e.serializeLiteState(currentState);
if (doSerialize == true) e.serializeState(currentState);
}
auto tf = std::chrono::high_resolution_clock::now();

2
tests/arkanoid.warpless.test
View File

@ -3,7 +3,7 @@
"Expected ROM SHA1": "B2B30C4F30DD853C215C17B0C67CFE63D61A3062",
"Initial State File": "",
"Sequence File": "arkanoid.warpless.sol",
"Disable State Blocks": [ "SRAM", "CHRR", "NTAB", "SPRT", "MAPR", "CTRL", "APUR" ],
"Disable State Blocks": [ "HEAD", "SRAM", "CHRR", "NTAB", "SPRT", "MAPR", "CTRL", "APUR" ],
"Controller 1 Type": "Joypad",
"Controller 2 Type": "None"
}

2
tests/arkanoid.warps.test
View File

@ -3,7 +3,7 @@
"Expected ROM SHA1": "B2B30C4F30DD853C215C17B0C67CFE63D61A3062",
"Initial State File": "",
"Sequence File": "arkanoid.warps.sol",
"Disable State Blocks": [ "SRAM", "CHRR", "NTAB", "SPRT", "MAPR", "CTRL", "APUR" ],
"Disable State Blocks": [ "HEAD", "SRAM", "CHRR", "NTAB", "SPRT", "MAPR", "CTRL", "APUR" ],
"Controller 1 Type": "Joypad",
"Controller 2 Type": "None"
}

2
tests/castlevania1.anyPercent.test
View File

@ -3,7 +3,7 @@
"Expected ROM SHA1": "A31B8BD5B370A9103343C866F3C2B2998E889341",
"Initial State File": "",
"Sequence File": "castlevania1.anyPercent.sol",
"Disable State Blocks": [ "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Disable State Blocks": [ "HEAD", "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Controller 1 Type": "Joypad",
"Controller 2 Type": "None"
}

2
tests/castlevania1.pacifist.test
View File

@ -3,7 +3,7 @@
"Expected ROM SHA1": "A31B8BD5B370A9103343C866F3C2B2998E889341",
"Initial State File": "",
"Sequence File": "castlevania1.pacifist.sol",
"Disable State Blocks": [ "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Disable State Blocks": [ "HEAD", "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Controller 1 Type": "Joypad",
"Controller 2 Type": "None"
}

2
tests/galaga.anyPercent.test
View File

@ -3,7 +3,7 @@
"Expected ROM SHA1": "DA54C223D79FA59EB95437854B677CF69B5CAC8A",
"Initial State File": "",
"Sequence File": "galaga.anyPercent.sol",
"Disable State Blocks": [ "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Disable State Blocks": [ "HEAD", "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Controller 1 Type": "Joypad",
"Controller 2 Type": "None"
}

2
tests/ironSword.anyPercent.test
View File

@ -3,7 +3,7 @@
"Expected ROM SHA1": "97B79E432F62403FB9F877090850C41112A9A168",
"Initial State File": "",
"Sequence File": "ironSword.anyPercent.sol",
"Disable State Blocks": [ "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Disable State Blocks": [ "HEAD", "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Controller 1 Type": "Joypad",
"Controller 2 Type": "None"
}

2
tests/metroid.playaround.test
View File

@ -3,7 +3,7 @@
"Expected ROM SHA1": "ECF39EC5A33E6A6F832F03E8FFC61C5D53F4F90B",
"Initial State File": "",
"Sequence File": "metroid.playaround.sol",
"Disable State Blocks": [ "CHRR", "NTAB", "SPRT", "CTRL" ],
"Disable State Blocks": [ "HEAD", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Controller 1 Type": "Joypad",
"Controller 2 Type": "None"
}

2
tests/nigelMansell.anyPercent.test
View File

@ -3,7 +3,7 @@
"Expected ROM SHA1": "BBE5CF2DFA0B5422776A530D6F1B617238A8569F",
"Initial State File": "",
"Sequence File": "nigelMansell.anyPercent.sol",
"Disable State Blocks": [ "SRAM", "CHRR", "SPRT", "CTRL" ],
"Disable State Blocks": [ "HEAD", "SRAM", "CHRR", "SPRT", "CTRL" ],
"Controller 1 Type": "Joypad",
"Controller 2 Type": "None"
}

2
tests/ninjaGaiden.anyPercent.test
View File

@ -3,7 +3,7 @@
"Expected ROM SHA1": "CA513F841D75EFEB33BB8099FB02BEEB39F6BB9C",
"Initial State File": "",
"Sequence File": "ninjaGaiden.anyPercent.sol",
"Disable State Blocks": [ "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Disable State Blocks": [ "HEAD", "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Controller 1 Type": "Joypad",
"Controller 2 Type": "None"
}

2
tests/ninjaGaiden.pacifist.test
View File

@ -3,7 +3,7 @@
"Expected ROM SHA1": "CA513F841D75EFEB33BB8099FB02BEEB39F6BB9C",
"Initial State File": "",
"Sequence File": "ninjaGaiden.pacifist.sol",
"Disable State Blocks": [ "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Disable State Blocks": [ "HEAD", "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Controller 1 Type": "Joypad",
"Controller 2 Type": "None"
}

2
tests/ninjaGaiden2.anyPercent.test
View File

@ -3,7 +3,7 @@
"Expected ROM SHA1": "B1796660E4A4CEFC72181D4BF4F97999BC048A77",
"Initial State File": "",
"Sequence File": "ninjaGaiden2.anyPercent.sol",
"Disable State Blocks": [ "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Disable State Blocks": [ "HEAD", "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Controller 1 Type": "Joypad",
"Controller 2 Type": "None"
}

2
tests/ninjaGaiden2.pacifist.test
View File

@ -3,7 +3,7 @@
"Expected ROM SHA1": "B1796660E4A4CEFC72181D4BF4F97999BC048A77",
"Initial State File": "",
"Sequence File": "ninjaGaiden2.pacifist.sol",
"Disable State Blocks": [ "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Disable State Blocks": [ "HEAD", "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Controller 1 Type": "Joypad",
"Controller 2 Type": "None"
}

2
tests/novaTheSquirrel.anyPercent.test
View File

@ -3,7 +3,7 @@
"Expected ROM SHA1": "B6B07EE76492ED475F39167C89B342353F999231",
"Initial State File": "",
"Sequence File": "novaTheSquirrel.anyPercent.sol",
"Disable State Blocks": [ "CHRR", "NTAB", "SPRT", "CTRL" ],
"Disable State Blocks": [ "HEAD", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Controller 1 Type": "Joypad",
"Controller 2 Type": "None"
}

2
tests/princeOfPersia.anyPercent.test
View File

@ -3,7 +3,7 @@
"Expected ROM SHA1": "6B58F149F34FA829135619C58700CAAA95B9CDE3",
"Initial State File": "",
"Sequence File": "princeOfPersia.anyPercent.sol",
"Disable State Blocks": [ "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Disable State Blocks": [ "HEAD", "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Controller 1 Type": "Joypad",
"Controller 2 Type": "None"
}

2
tests/rcProAmII.race1.test
View File

@ -3,7 +3,7 @@
"Expected ROM SHA1": "8C68582BDAA32FBC8C7CD858991D4E00D3B1569C",
"Initial State File": "",
"Sequence File": "rcProAmII.race1.sol",
"Disable State Blocks": [ "SRAM", "NTAB", "SPRT", "CTRL", "APUR" ],
"Disable State Blocks": [ "HEAD", "SRAM", "NTAB", "SPRT", "CTRL", "APUR" ],
"Controller 1 Type": "FourScore1",
"Controller 2 Type": "FourScore2"
}

2
tests/saintSeiyaKanketsuHen.anyPercent.test
View File

@ -3,7 +3,7 @@
"Expected ROM SHA1": "F871D9B3DAFDDCDAD5F2ACD71044292E5169064E",
"Initial State File": "",
"Sequence File": "saintSeiyaKanketsuHen.anyPercent.sol",
"Disable State Blocks": [ "SRAM", "CHRR", "SPRT", "CTRL" ],
"Disable State Blocks": [ "HEAD", "SRAM", "CHRR", "SPRT", "CTRL" ],
"Controller 1 Type": "Joypad",
"Controller 2 Type": "None"
}

2
tests/saintSeiyaOugonDensetsu.anyPercent.test
View File

@ -3,7 +3,7 @@
"Expected ROM SHA1": "3F3B499CF50386084E053BCA096AE8E52330CFAE",
"Initial State File": "",
"Sequence File": "saintSeiyaKanketsuHen.anyPercent.sol",
"Disable State Blocks": [ "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Disable State Blocks": [ "HEAD", "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Controller 1 Type": "Joypad",
"Controller 2 Type": "None"
}

2
tests/saiyuukiWorld.anyPercent.test
View File

@ -3,7 +3,7 @@
"Expected ROM SHA1": "C2F12D915A4D0B1FFDF8A64AE1092CE6A2D08770",
"Initial State File": "",
"Sequence File": "saiyuukiWorld.anyPercent.sol",
"Disable State Blocks": [ "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Disable State Blocks": [ "HEAD", "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Controller 1 Type": "Joypad",
"Controller 2 Type": "None"
}

2
tests/saiyuukiWorld.lastHalf.test
View File

@ -3,7 +3,7 @@
"Expected ROM SHA1": "C2F12D915A4D0B1FFDF8A64AE1092CE6A2D08770",
"Initial State File": "saiyuukiWorld.lastHalf.state",
"Sequence File": "saiyuukiWorld.lastHalf.sol",
"Disable State Blocks": [ "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Disable State Blocks": [ "HEAD", "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Controller 1 Type": "Joypad",
"Controller 2 Type": "None"
}

2
tests/solarJetman.anyPercent.test
View File

@ -5,7 +5,7 @@
"Expected ROM SHA1": "872B91A2F7A2F635061EF43F79E7F7E9F59F5C50",
"Initial State File": "",
"Sequence File": "solarJetman.anyPercent.sol",
"Disable State Blocks": [ "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Disable State Blocks": [ "HEAD", "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Controller 1 Type": "Joypad",
"Controller 2 Type": "None"
}

2
tests/sprilo.anyPercent.test
View File

@ -3,7 +3,7 @@
"Expected ROM SHA1": "6EC09B9B51320A536A786D3D4719432B714C5779",
"Initial State File": "",
"Sequence File": "sprilo.anyPercent.sol",
"Disable State Blocks": [ "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Disable State Blocks": [ "HEAD", "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Controller 1 Type": "Joypad",
"Controller 2 Type": "None"
}

2
tests/superMarioBros.warpless.test
View File

@ -3,7 +3,7 @@
"Expected ROM SHA1": "EA343F4E445A9050D4B4FBAC2C77D0693B1D0922",
"Initial State File": "",
"Sequence File": "superMarioBros.warpless.sol",
"Disable State Blocks": [ "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Disable State Blocks": [ "HEAD", "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Controller 1 Type": "Joypad",
"Controller 2 Type": "None"
}

2
tests/superMarioBros.warps.test
View File

@ -3,7 +3,7 @@
"Expected ROM SHA1": "EA343F4E445A9050D4B4FBAC2C77D0693B1D0922",
"Initial State File": "",
"Sequence File": "superMarioBros.warps.sol",
"Disable State Blocks": [ "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Disable State Blocks": [ "HEAD", "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Controller 1 Type": "Joypad",
"Controller 2 Type": "None"
}

2
tests/superMarioBros3.warps.test
View File

@ -3,7 +3,7 @@
"Expected ROM SHA1": "A03E7E526E79DF222E048AE22214BCA2BC49C449",
"Initial State File": "",
"Sequence File": "superMarioBros3.warps.sol",
"Disable State Blocks": [ "CHRR", "NTAB", "SPRT", "CTRL" ],
"Disable State Blocks": [ "HEAD", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Controller 1 Type": "Joypad",
"Controller 2 Type": "None"
}

364360
tests/superOffroad.anyPercent.sol
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File diff suppressed because it is too large Load Diff

4
tests/superOffroad.anyPercent.test
View File

@ -3,7 +3,7 @@
"Expected ROM SHA1": "57919B685B55EE3ED3AD98FB1D25626B98BE7D39",
"Initial State File": "",
"Sequence File": "superOffroad.anyPercent.sol",
"Disable State Blocks": [ "SRAM", "CHRR", "SPRT", "CTRL" ],
"Disable State Blocks": [ "HEAD", "SRAM", "CHRR", "SPRT", "CTRL" ],
"Controller 1 Type": "Joypad",
"Controller 2 Type": "Joypad"
"Controller 2 Type": "None"
}

2
tests/tennis.anyPercent.test
View File

@ -3,7 +3,7 @@
"Expected ROM SHA1": "80D99C035E6A5AB9718E413EC25CBE094F085962",
"Initial State File": "",
"Sequence File": "tennis.anyPercent.sol",
"Disable State Blocks": [ "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Disable State Blocks": [ "HEAD", "SRAM", "CHRR", "NTAB", "SPRT", "CTRL" ],
"Controller 1 Type": "Joypad",
"Controller 2 Type": "None"
}