245 lines
8.7 KiB
C++
245 lines
8.7 KiB
C++
/****************************************************************************
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* *
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* Project64 - A Nintendo 64 emulator. *
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* http://www.pj64-emu.com/ *
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* Copyright (C) 2012 Project64. All rights reserved. *
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* *
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* License: *
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* GNU/GPLv2 http://www.gnu.org/licenses/gpl-2.0.html *
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* *
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****************************************************************************/
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#pragma once
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#include "MemoryVirtualMem.h"
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#include "TranslateVaddr.h"
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#include <Project64-core/N64System/Recompiler/RecompilerOps.h>
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#include <Project64-core/N64System/Interpreter/InterpreterOps.h>
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#include <Project64-core/N64System/Mips/PifRam.h>
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#include <Project64-core/N64System/Mips/FlashRam.h>
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#include <Project64-core/N64System/Mips/Sram.h>
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#include <Project64-core/N64System/Mips/Dma.h>
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__interface CMipsMemory_CallBack
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{
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//Protected memory has been written to, returns true if that memory has been unprotected
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virtual bool WriteToProtectedMemory(uint32_t Address, int32_t length) = 0;
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};
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/*
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* 64-bit Windows exception recovery facilities will expect to interact with
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* the 64-bit registers of the Intel architecture (e.g., rax instead of eax).
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*
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* Attempting to read the 32-bit subsets seems to be erroneous and forbidden.
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* Refer to "MemoryFilter" in `Memory Virtual Mem.cpp`.
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*/
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#ifdef _WIN64
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#define Eax Rax
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#define Ebx Rbx
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#define Ecx Rcx
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#define Edx Rdx
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#define Esp Rsp
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#define Ebp Rbp
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#define Esi Rsi
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#define Edi Rdi
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#define Eip Rip
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#endif
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/*
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* To do: Have address translation functions here?
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* `return` either the translated address or the mask to XOR by?
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*
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* This will help us gradually be able to port Project64 for big-endian CPUs.
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* Currently it is written to assume 32-bit little-endian, like so:
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*
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* 0xAABBCCDD EEFFGGHH --> 0xDDCCBBAA HHGGFFEE
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* GPR bits[63..0] b1b2b3b4 b5b6b7b8
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*/
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class CMipsMemoryVM :
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public CTransVaddr,
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private CRecompilerOps,
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private R4300iOp,
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private CPifRam,
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private CFlashram,
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private CSram,
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private CDMA
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{
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public:
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CMipsMemoryVM(CMipsMemory_CallBack * CallBack, bool SavesReadOnly);
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~CMipsMemoryVM();
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static void ReserveMemory();
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static void FreeReservedMemory();
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bool Initialize();
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void Reset(bool EraseMemory);
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uint8_t * Rdram();
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uint32_t RdramSize();
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uint8_t * Dmem();
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uint8_t * Imem();
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uint8_t * PifRam();
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bool LB_VAddr(uint32_t VAddr, uint8_t & Value);
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bool LH_VAddr(uint32_t VAddr, uint16_t & Value);
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bool LW_VAddr(uint32_t VAddr, uint32_t & Value);
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bool LD_VAddr(uint32_t VAddr, uint64_t & Value);
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bool LB_PAddr(uint32_t PAddr, uint8_t & Value);
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bool LH_PAddr(uint32_t PAddr, uint16_t & Value);
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bool LW_PAddr(uint32_t PAddr, uint32_t & Value);
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bool LD_PAddr(uint32_t PAddr, uint64_t & Value);
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bool SB_VAddr(uint32_t VAddr, uint8_t Value);
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bool SH_VAddr(uint32_t VAddr, uint16_t Value);
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bool SW_VAddr(uint32_t VAddr, uint32_t Value);
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bool SD_VAddr(uint32_t VAddr, uint64_t Value);
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bool SB_PAddr(uint32_t PAddr, uint8_t Value);
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bool SH_PAddr(uint32_t PAddr, uint16_t Value);
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bool SW_PAddr(uint32_t PAddr, uint32_t Value);
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bool SD_PAddr(uint32_t PAddr, uint64_t Value);
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int32_t MemoryFilter(uint32_t dwExptCode, void * lpExceptionPointer);
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void UpdateFieldSerration(uint32_t interlaced);
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//Protect the Memory from being written to
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void ProtectMemory(uint32_t StartVaddr, uint32_t EndVaddr);
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void UnProtectMemory(uint32_t StartVaddr, uint32_t EndVaddr);
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//Compilation Functions
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void ResetMemoryStack();
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void Compile_LB();
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void Compile_LBU();
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void Compile_LH();
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void Compile_LHU();
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void Compile_LW();
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void Compile_LL();
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void Compile_LWC1();
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void Compile_LWU();
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void Compile_LWL();
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void Compile_LWR();
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void Compile_LD();
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void Compile_LDC1();
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void Compile_LDL();
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void Compile_LDR();
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void Compile_SB();
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void Compile_SH();
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void Compile_SW();
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void Compile_SWL();
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void Compile_SWR();
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void Compile_SD();
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void Compile_SDL();
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void Compile_SDR();
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void Compile_SC();
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void Compile_SWC1();
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void Compile_SDC1();
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void ResetMemoryStack(CRegInfo& RegInfo);
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void Compile_LB(CX86Ops::x86Reg Reg, uint32_t Addr, bool SignExtend);
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void Compile_LH(CX86Ops::x86Reg Reg, uint32_t Addr, bool SignExtend);
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void Compile_LW(CX86Ops::x86Reg Reg, uint32_t Addr);
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void Compile_SB_Const(uint8_t Value, uint32_t Addr);
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void Compile_SB_Register(CX86Ops::x86Reg Reg, uint32_t Addr);
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void Compile_SH_Const(uint16_t Value, uint32_t Addr);
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void Compile_SH_Register(CX86Ops::x86Reg Reg, uint32_t Addr);
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void Compile_SW_Const(uint32_t Value, uint32_t Addr);
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void Compile_SW_Register(CX86Ops::x86Reg Reg, uint32_t Addr);
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//Functions for TLB notification
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void TLB_Mapped(uint32_t VAddr, uint32_t Len, uint32_t PAddr, bool bReadOnly);
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void TLB_Unmaped(uint32_t Vaddr, uint32_t Len);
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// CTransVaddr interface
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bool TranslateVaddr(uint32_t VAddr, uint32_t &PAddr) const;
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bool ValidVaddr(uint32_t VAddr) const;
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bool VAddrToRealAddr(uint32_t VAddr, void * &RealAddress) const;
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// Labels
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const char * LabelName(uint32_t Address) const;
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private:
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CMipsMemoryVM(); // Disable default constructor
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CMipsMemoryVM(const CMipsMemoryVM&); // Disable copy constructor
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CMipsMemoryVM& operator=(const CMipsMemoryVM&); // Disable assignment
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void Compile_LW(bool ResultSigned, bool bRecordLLbit);
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void Compile_SW(bool bCheckLLbit);
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static void RdramChanged(CMipsMemoryVM * _this);
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static void ChangeSpStatus();
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static void ChangeMiIntrMask();
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bool LB_NonMemory(uint32_t PAddr, uint32_t * Value, bool SignExtend);
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bool LH_NonMemory(uint32_t PAddr, uint32_t * Value, bool SignExtend);
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bool LW_NonMemory(uint32_t PAddr, uint32_t * Value);
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bool SB_NonMemory(uint32_t PAddr, uint8_t Value);
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bool SH_NonMemory(uint32_t PAddr, uint16_t Value);
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bool SW_NonMemory(uint32_t PAddr, uint32_t Value);
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void Compile_StoreInstructClean(x86Reg AddressReg, int32_t Length);
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static void Load32RDRAMRegisters(void);
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static void Load32SPRegisters(void);
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static void Load32DPCommand(void);
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static void Load32MIPSInterface(void);
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static void Load32VideoInterface(void);
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static void Load32AudioInterface(void);
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static void Load32PeripheralInterface(void);
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static void Load32RDRAMInterface(void);
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static void Load32SerialInterface(void);
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static void Load32CartridgeDomain2Address1(void);
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static void Load32CartridgeDomain2Address2(void);
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static void Load32PifRam(void);
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static void Load32Rom(void);
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static void Write32RDRAMRegisters(void);
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static void Write32SPRegisters(void);
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static void Write32DPCommandRegisters(void);
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static void Write32MIPSInterface(void);
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static void Write32VideoInterface(void);
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static void Write32AudioInterface(void);
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static void Write32PeripheralInterface(void);
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static void Write32RDRAMInterface(void);
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static void Write32SerialInterface(void);
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static void Write32CartridgeDomain2Address2(void);
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static void Write32PifRam(void);
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CMipsMemory_CallBack * const m_CBClass;
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//Memory Locations
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static uint8_t * m_Reserve1, *m_Reserve2;
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uint8_t * m_RDRAM, *m_DMEM, *m_IMEM;
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uint32_t m_AllocatedRdramSize;
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//Rom Information
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bool m_RomMapped;
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uint8_t * m_Rom;
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uint32_t m_RomSize;
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bool m_RomWrittenTo;
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uint32_t m_RomWroteValue;
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//Current Half line
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void UpdateHalfLine();
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uint32_t m_HalfLine;
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uint32_t m_HalfLineCheck;
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uint32_t m_FieldSerration;
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uint32_t m_TempValue;
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//Initializing and resetting information about the memory system
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void FreeMemory();
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mutable char m_strLabelName[100];
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//BIG look up table to quickly translate the tlb to real mem address
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size_t * m_TLB_ReadMap;
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size_t * m_TLB_WriteMap;
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static uint32_t m_MemLookupAddress;
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static MIPS_DWORD m_MemLookupValue;
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static bool m_MemLookupValid;
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};
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