109 lines
3.4 KiB
C
109 lines
3.4 KiB
C
/*
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* RSP Compiler plug in for Project64 (A Nintendo 64 emulator).
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*
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* (c) Copyright 2001 jabo (jabo@emulation64.com) and
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* zilmar (zilmar@emulation64.com)
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*
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* pj64 homepage: www.pj64.net
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*
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* Permission to use, copy, modify and distribute Project64 in both binary and
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* source form, for non-commercial purposes, is hereby granted without fee,
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* providing that this license information and copyright notice appear with
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* all copies and any derived work.
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*
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* This software is provided 'as-is', without any express or implied
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* warranty. In no event shall the authors be held liable for any damages
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* arising from the use of this software.
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*
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* Project64 is freeware for PERSONAL USE only. Commercial users should
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* seek permission of the copyright holders first. Commercial use includes
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* charging money for Project64 or software derived from Project64.
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*
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* The copyright holders request that bug fixes and improvements to the code
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* should be forwarded to them so if they want them.
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*
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*/
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#include "OpCode.h"
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#include "Types.h"
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extern uint32_t CompilePC, NextInstruction, JumpTableSize;
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extern Boolean ChangedPC;
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#define CompilerWarning if (ShowErrors) DisplayError
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#define High16BitAccum 1
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#define Middle16BitAccum 2
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#define Low16BitAccum 4
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#define EntireAccum (Low16BitAccum|Middle16BitAccum|High16BitAccum)
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Boolean WriteToAccum(int Location, int PC);
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Boolean WriteToVectorDest(DWORD DestReg, int PC);
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Boolean UseRspFlags(int PC);
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Boolean DelaySlotAffectBranch(DWORD PC);
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Boolean CompareInstructions(DWORD PC, OPCODE * Top, OPCODE * Bottom);
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Boolean IsOpcodeBranch(DWORD PC, OPCODE RspOp);
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Boolean IsOpcodeNop(DWORD PC);
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Boolean IsNextInstructionMmx(DWORD PC);
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Boolean IsRegisterConstant(DWORD Reg, DWORD * Constant);
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void RSP_Element2Mmx(int MmxReg);
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void RSP_MultiElement2Mmx(int MmxReg1, int MmxReg2);
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#define MainBuffer 0
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#define SecondaryBuffer 1
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DWORD RunRecompilerCPU ( DWORD Cycles );
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void BuildRecompilerCPU ( void );
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void CompilerRSPBlock ( void );
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void CompilerToggleBuffer (void);
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Boolean RSP_DoSections(void);
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typedef struct {
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DWORD StartPC, CurrPC; /* block start */
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struct {
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DWORD TargetPC; /* Target for this unknown branch */
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DWORD * X86JumpLoc; /* Our x86 dword to fill */
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} BranchesToResolve[200]; /* Branches inside or outside block */
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DWORD ResolveCount; /* Branches with NULL jump table */
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} RSP_BLOCK;
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extern RSP_BLOCK CurrentBlock;
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typedef struct {
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Boolean bIsRegConst[32]; /* Boolean toggle for constant */
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DWORD MipsRegConst[32]; /* Value of register 32-bit */
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DWORD BranchLabels[250];
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DWORD LabelCount;
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DWORD BranchLocations[250];
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DWORD BranchCount;
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} RSP_CODE;
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extern RSP_CODE RspCode;
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#define IsRegConst(i) (RspCode.bIsRegConst[i])
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#define MipsRegConst(i) (RspCode.MipsRegConst[i])
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typedef struct {
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Boolean mmx, mmx2, sse; /* CPU specs and compiling */
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Boolean bFlags; /* RSP Flag Analysis */
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Boolean bReOrdering; /* Instruction reordering */
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Boolean bSections; /* Microcode sections */
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Boolean bDest; /* Vector destionation toggle */
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Boolean bAccum; /* Accumulator toggle */
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Boolean bGPRConstants; /* Analyze GPR constants */
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Boolean bAlignVector; /* Align known vector loads */
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Boolean bAudioUcode; /* Audio ucode analysis */
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} RSP_COMPILER;
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extern RSP_COMPILER Compiler;
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#define IsMmxEnabled (Compiler.mmx)
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#define IsMmx2Enabled (Compiler.mmx2)
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#define IsSseEnabled (Compiler.sse)
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