187 lines
8.4 KiB
C++
187 lines
8.4 KiB
C++
/****************************************************************************
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* *
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* Project64 - A Nintendo 64 emulator. *
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* http://www.pj64-emu.com/ *
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* Copyright (C) 2012 Project64. All rights reserved. *
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* *
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* License: *
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* GNU/GPLv2 http://www.gnu.org/licenses/gpl-2.0.html *
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* *
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****************************************************************************/
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#pragma once
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#include <Project64-core/Settings/DebugSettings.h>
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#include <Project64-core/N64System/Mips/RegisterClass.h>
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#include <Project64-core/N64System/Recompiler/X86ops.h>
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class CRegInfo :
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private CDebugSettings,
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private CX86Ops,
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private CSystemRegisters
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{
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public:
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//enums
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enum REG_STATE
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{
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STATE_UNKNOWN = 0x00,
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STATE_KNOWN_VALUE = 0x01,
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STATE_X86_MAPPED = 0x02,
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STATE_SIGN = 0x04,
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STATE_32BIT = 0x08,
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STATE_MODIFIED = 0x10,
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STATE_MAPPED_64 = (STATE_KNOWN_VALUE | STATE_X86_MAPPED), // = 3
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STATE_MAPPED_32_ZERO = (STATE_KNOWN_VALUE | STATE_X86_MAPPED | STATE_32BIT), // = 11
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STATE_MAPPED_32_SIGN = (STATE_KNOWN_VALUE | STATE_X86_MAPPED | STATE_32BIT | STATE_SIGN), // = 15
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STATE_CONST_32_ZERO = (STATE_KNOWN_VALUE | STATE_32BIT), // = 9
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STATE_CONST_32_SIGN = (STATE_KNOWN_VALUE | STATE_32BIT | STATE_SIGN), // = 13
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STATE_CONST_64 = (STATE_KNOWN_VALUE), // = 1
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};
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enum REG_MAPPED
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{
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NotMapped = 0,
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GPR_Mapped = 1,
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Temp_Mapped = 2,
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Stack_Mapped = 3,
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};
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enum FPU_STATE
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{
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FPU_Any = -1,
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FPU_Unknown = 0,
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FPU_Dword = 1,
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FPU_Qword = 2,
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FPU_Float = 3,
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FPU_Double = 4,
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};
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enum FPU_ROUND
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{
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RoundUnknown = -1,
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RoundDefault = 0,
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RoundTruncate = 1,
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RoundNearest = 2,
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RoundDown = 3,
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RoundUp = 4,
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};
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public:
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CRegInfo();
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CRegInfo(const CRegInfo&);
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~CRegInfo();
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CRegInfo& operator=(const CRegInfo&);
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bool operator==(const CRegInfo& right) const;
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bool operator!=(const CRegInfo& right) const;
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static REG_STATE ConstantsType(int64_t Value);
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void FixRoundModel(FPU_ROUND RoundMethod);
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void ChangeFPURegFormat(int32_t Reg, FPU_STATE OldFormat, FPU_STATE NewFormat, FPU_ROUND RoundingModel);
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void Load_FPR_ToTop(int32_t Reg, int32_t RegToLoad, FPU_STATE Format);
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bool RegInStack(int32_t Reg, FPU_STATE Format);
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void UnMap_AllFPRs();
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void UnMap_FPR(int32_t Reg, bool WriteBackValue);
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x86FpuValues StackPosition(int32_t Reg);
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x86Reg FreeX86Reg();
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x86Reg Free8BitX86Reg();
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void Map_GPR_32bit(int32_t MipsReg, bool SignValue, int32_t MipsRegToLoad);
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void Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad);
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x86Reg Get_MemoryStack() const;
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x86Reg Map_MemoryStack(x86Reg Reg, bool bMapRegister, bool LoadValue = true);
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x86Reg Map_TempReg(x86Reg Reg, int32_t MipsReg, bool LoadHiWord);
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void ProtectGPR(uint32_t Reg);
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void UnProtectGPR(uint32_t Reg);
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void ResetX86Protection();
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x86Reg UnMap_TempReg();
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void UnMap_GPR(uint32_t Reg, bool WriteBackValue);
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bool UnMap_X86reg(x86Reg Reg);
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void WriteBackRegisters();
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bool IsKnown(int32_t Reg) const { return ((GetMipsRegState(Reg) & STATE_KNOWN_VALUE) != 0); }
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bool IsUnknown(int32_t Reg) const { return ((GetMipsRegState(Reg) & STATE_KNOWN_VALUE) == 0); }
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bool IsModified(int32_t Reg) const { return ((GetMipsRegState(Reg) & STATE_MODIFIED) != 0); }
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bool IsMapped(int32_t Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_X86_MAPPED)) == (STATE_KNOWN_VALUE | STATE_X86_MAPPED)); }
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bool IsConst(int32_t Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_X86_MAPPED)) == STATE_KNOWN_VALUE); }
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bool IsSigned(int32_t Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_SIGN)) == (STATE_KNOWN_VALUE | STATE_SIGN)); }
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bool IsUnsigned(int32_t Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_SIGN)) == STATE_KNOWN_VALUE); }
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bool Is32Bit(int32_t Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_32BIT)) == (STATE_KNOWN_VALUE | STATE_32BIT)); }
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bool Is64Bit(int32_t Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_32BIT)) == STATE_KNOWN_VALUE); }
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bool Is32BitMapped(int32_t Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_32BIT | STATE_X86_MAPPED)) == (STATE_KNOWN_VALUE | STATE_32BIT | STATE_X86_MAPPED)); }
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bool Is64BitMapped(int32_t Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_32BIT | STATE_X86_MAPPED)) == (STATE_KNOWN_VALUE | STATE_X86_MAPPED)); }
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REG_STATE GetMipsRegState(int32_t Reg) const { return m_MIPS_RegState[Reg]; }
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uint64_t GetMipsReg(int32_t Reg) const { return m_MIPS_RegVal[Reg].UDW; }
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int64_t GetMipsReg_S(int32_t Reg) const { return m_MIPS_RegVal[Reg].DW; }
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uint32_t GetMipsRegLo(int32_t Reg) const { return m_MIPS_RegVal[Reg].UW[0]; }
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int32_t GetMipsRegLo_S(int32_t Reg) const { return m_MIPS_RegVal[Reg].W[0]; }
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uint32_t GetMipsRegHi(int32_t Reg) const { return m_MIPS_RegVal[Reg].UW[1]; }
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int32_t GetMipsRegHi_S(int32_t Reg) const { return m_MIPS_RegVal[Reg].W[1]; }
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CX86Ops::x86Reg GetMipsRegMapLo(int32_t Reg) const { return m_RegMapLo[Reg]; }
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CX86Ops::x86Reg GetMipsRegMapHi(int32_t Reg) const { return m_RegMapHi[Reg]; }
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uint32_t GetX86MapOrder(x86Reg Reg) const { return m_x86reg_MapOrder[Reg]; }
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bool GetX86Protected(x86Reg Reg) const { return m_x86reg_Protected[Reg]; }
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REG_MAPPED GetX86Mapped(x86Reg Reg) const { return m_x86reg_MappedTo[Reg]; }
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uint32_t GetBlockCycleCount() const { return m_CycleCount; }
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void SetMipsReg(int32_t Reg, uint64_t Value) { m_MIPS_RegVal[Reg].UDW = Value; }
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void SetMipsReg_S(int32_t Reg, int64_t Value) { m_MIPS_RegVal[Reg].DW = Value; }
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void SetMipsRegLo(int32_t Reg, uint32_t Value) { m_MIPS_RegVal[Reg].UW[0] = Value; }
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void SetMipsRegHi(int32_t Reg, uint32_t Value) { m_MIPS_RegVal[Reg].UW[1] = Value; }
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void SetMipsRegMapLo(int32_t GetMipsReg, x86Reg Reg) { m_RegMapLo[GetMipsReg] = Reg; }
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void SetMipsRegMapHi(int32_t GetMipsReg, x86Reg Reg) { m_RegMapHi[GetMipsReg] = Reg; }
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void SetMipsRegState(int32_t GetMipsReg, REG_STATE State) { m_MIPS_RegState[GetMipsReg] = State; }
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void SetX86MapOrder(x86Reg Reg, uint32_t Order) { m_x86reg_MapOrder[Reg] = Order; }
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void SetX86Protected(x86Reg Reg, bool Protected) { m_x86reg_Protected[Reg] = Protected; }
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void SetX86Mapped(x86Reg Reg, REG_MAPPED Mapping) { m_x86reg_MappedTo[Reg] = Mapping; }
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void SetBlockCycleCount(uint32_t CyleCount) { m_CycleCount = CyleCount; }
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int32_t & StackTopPos() { return m_Stack_TopPos; }
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int32_t & FpuMappedTo(int32_t Reg) { return m_x86fpu_MappedTo[Reg]; }
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FPU_STATE & FpuState(int32_t Reg) { return m_x86fpu_State[Reg]; }
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FPU_ROUND & FpuRoundingModel(int32_t Reg) { return m_x86fpu_RoundingModel[Reg]; }
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bool & FpuBeenUsed() { return m_Fpu_Used; }
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FPU_ROUND GetRoundingModel() const { return m_RoundingModel; }
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void SetRoundingModel(FPU_ROUND RoundingModel) { m_RoundingModel = RoundingModel; }
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private:
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const char * RoundingModelName(FPU_ROUND RoundType);
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x86Reg UnMap_8BitTempReg();
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//r4k
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REG_STATE m_MIPS_RegState[32];
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MIPS_DWORD m_MIPS_RegVal[32];
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x86Reg m_RegMapHi[32];
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x86Reg m_RegMapLo[32];
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REG_MAPPED m_x86reg_MappedTo[10];
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uint32_t m_x86reg_MapOrder[10];
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bool m_x86reg_Protected[10];
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uint32_t m_CycleCount;
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//FPU
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int32_t m_Stack_TopPos;
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int32_t m_x86fpu_MappedTo[8];
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FPU_STATE m_x86fpu_State[8];
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bool m_x86fpu_StateChanged[8];
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FPU_ROUND m_x86fpu_RoundingModel[8];
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bool m_Fpu_Used;
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FPU_ROUND m_RoundingModel;
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static uint32_t m_fpuControl;
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};
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