118 lines
3.3 KiB
C++
118 lines
3.3 KiB
C++
#pragma once
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#include <Project64-rsp-core/Recompiler/RspRecompilerOps.h>
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#include <Project64-rsp-core/Settings/RspSettings.h>
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#include <Project64-rsp-core/cpu/RSPOpcode.h>
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#include <Project64-rsp-core/cpu/RspPipelineStage.h>
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#include <Project64-rsp-core/cpu/RspTypes.h>
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#include <Settings/Settings.h>
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class CRSPSystem;
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class RSPRegisterHandlerPlugin;
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class CRSPRecompiler
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{
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friend class CRSPRecompilerOps;
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friend class CHleTask;
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typedef struct
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{
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uint32_t StartPC, CurrPC; // Block start
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struct
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{
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uint32_t TargetPC; // Target for this unknown branch
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uint32_t * X86JumpLoc; // Our x86 uint32_t to fill
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} BranchesToResolve[200]; // Branches inside or outside block
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uint32_t ResolveCount; // Branches with NULL jump table
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} RSP_BLOCK;
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public:
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CRSPRecompiler(CRSPSystem & System);
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void RunCPU(void);
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void Branch_AddRef(uint32_t Target, uint32_t * X86Loc);
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void SetJumpTable(uint32_t End);
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private:
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CRSPRecompiler();
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CRSPRecompiler(const CRSPRecompiler &);
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CRSPRecompiler & operator=(const CRSPRecompiler &);
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void BuildBranchLabels(void);
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void BuildRecompilerCPU(void);
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void CompilerLinkBlocks(void);
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void CompilerRSPBlock(void);
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void CompileHLETask(uint32_t Address);
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void LinkBranches(RSP_BLOCK * Block);
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void ReOrderSubBlock(RSP_BLOCK * Block);
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void ReOrderInstructions(uint32_t StartPC, uint32_t EndPC);
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void ResetJumpTables(void);
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CRSPSystem & m_System;
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CRSPRecompilerOps m_RecompilerOps;
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RSPRegisterHandlerPlugin *& m_RSPRegisterHandler;
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RSPOpcode & m_OpCode;
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uint32_t m_CompilePC;
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RSP_BLOCK m_CurrentBlock;
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RSPPIPELINE_STAGE m_NextInstruction;
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uint8_t *& m_IMEM;
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};
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extern uint32_t JumpTableSize;
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extern bool ChangedPC;
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#define CompilerWarning \
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if (ShowErrors) g_Notify->DisplayError
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#define High16BitAccum 1
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#define Middle16BitAccum 2
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#define Low16BitAccum 4
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#define EntireAccum (Low16BitAccum | Middle16BitAccum | High16BitAccum)
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bool DelaySlotAffectBranch(uint32_t PC);
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bool CompareInstructions(uint32_t PC, RSPOpcode * Top, RSPOpcode * Bottom);
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bool IsOpcodeBranch(uint32_t PC, RSPOpcode RspOp);
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bool IsOpcodeNop(uint32_t PC);
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bool IsRegisterConstant(uint32_t Reg, uint32_t * Constant);
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#define MainBuffer 0
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#define SecondaryBuffer 1
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void CompilerToggleBuffer(void);
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typedef struct
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{
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bool bIsRegConst[32]; // bool toggle for constant
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uint32_t MipsRegConst[32]; // Value of register 32-bit
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uint32_t BranchLabels[250];
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uint32_t LabelCount;
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uint32_t BranchLocations[250];
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uint32_t BranchCount;
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} RSP_CODE;
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extern RSP_CODE RspCode;
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#define IsRegConst(i) (RspCode.bIsRegConst[i])
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#define MipsRegConst(i) (RspCode.MipsRegConst[i])
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typedef struct
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{
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bool mmx, mmx2, sse; // CPU specs and compiling
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bool bFlags; // RSP flag analysis
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bool bReOrdering; // Instruction reordering
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bool bSections; // Microcode sections
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bool bDest; // Vector destination toggle
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bool bAccum; // Accumulator toggle
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bool bGPRConstants; // Analyze GPR constants
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bool bAlignVector; // Align known vector loads
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bool bAudioUcode; // Audio microcode analysis
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} RSP_COMPILER;
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extern RSP_COMPILER Compiler;
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#define IsMmxEnabled (Compiler.mmx)
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#define IsMmx2Enabled (Compiler.mmx2)
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#define IsSseEnabled (Compiler.sse) |