639 lines
23 KiB
C++
639 lines
23 KiB
C++
/****************************************************************************
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* *
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* Project64 - A Nintendo 64 emulator. *
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* http://www.pj64-emu.com/ *
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* Copyright (C) 2012 Project64. All rights reserved. *
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* *
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* License: *
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* GNU/GPLv2 http://www.gnu.org/licenses/gpl-2.0.html *
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* *
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****************************************************************************/
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#include "stdafx.h"
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#if defined(__arm__) || defined(_M_ARM)
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#include <Project64-core/N64System/SystemGlobals.h>
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#include <Project64-core/N64System/N64Class.h>
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#include <Project64-core/N64System/Recompiler/RecompilerCodeLog.h>
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#include <Project64-core/N64System/Recompiler/Arm/ArmRegInfo.h>
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CArmRegInfo::CArmRegInfo() :
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m_InCallDirect(false)
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{
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for (int32_t i = 0; i < 32; i++)
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{
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m_RegMapLo[i] = Arm_Unknown;
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m_RegMapHi[i] = Arm_Unknown;
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}
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for (int32_t i = 0, n = sizeof(m_ArmReg_MappedTo) / sizeof(m_ArmReg_MappedTo[0]); i < n; i++)
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{
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m_ArmReg_MapOrder[i] = 0;
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m_ArmReg_Protected[i] = false;
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m_ArmReg_MappedTo[i] = NotMapped;
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m_Variable_MappedTo[i] = VARIABLE_UNKNOWN;
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}
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}
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CArmRegInfo::CArmRegInfo(const CArmRegInfo& rhs)
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{
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*this = rhs;
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}
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CArmRegInfo::~CArmRegInfo()
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{
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}
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CArmRegInfo& CArmRegInfo::operator=(const CArmRegInfo& right)
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{
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CRegBase::operator=(right);
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m_InCallDirect = right.m_InCallDirect;
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memcpy(&m_RegMapLo, &right.m_RegMapLo, sizeof(m_RegMapLo));
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memcpy(&m_RegMapHi, &right.m_RegMapHi, sizeof(m_RegMapHi));
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memcpy(&m_ArmReg_MapOrder, &right.m_ArmReg_MapOrder, sizeof(m_ArmReg_MapOrder));
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memcpy(&m_ArmReg_Protected, &right.m_ArmReg_Protected, sizeof(m_ArmReg_Protected));
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memcpy(&m_ArmReg_MappedTo, &right.m_ArmReg_MappedTo, sizeof(m_ArmReg_MappedTo));
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memcpy(&m_Variable_MappedTo, &right.m_Variable_MappedTo, sizeof(m_Variable_MappedTo));
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#ifdef _DEBUG
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if (*this != right)
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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#endif
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return *this;
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}
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bool CArmRegInfo::ShouldPushPopReg (ArmReg Reg)
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{
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if (m_ArmReg_MappedTo[Reg] == NotMapped)
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{
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return false;
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}
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if (m_ArmReg_MappedTo[Reg] == Temp_Mapped && !GetArmRegProtected(Reg))
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{
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return false;
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}
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return true;
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}
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void CArmRegInfo::BeforeCallDirect(void)
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{
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if (m_InCallDirect)
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{
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CPU_Message("%s: in CallDirect",__FUNCTION__);
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g_Notify->BreakPoint(__FILE__, __LINE__);
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return;
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}
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UnMap_AllFPRs();
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m_InCallDirect = true;
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int PushPopRegisters = 0;
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if (ShouldPushPopReg(Arm_R0)) { PushPopRegisters |= ArmPushPop_R0; }
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if (ShouldPushPopReg(Arm_R1)) { PushPopRegisters |= ArmPushPop_R1; }
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if (ShouldPushPopReg(Arm_R2)) { PushPopRegisters |= ArmPushPop_R2; }
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if (ShouldPushPopReg(Arm_R3)) { PushPopRegisters |= ArmPushPop_R3; }
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if (ShouldPushPopReg(Arm_R4)) { PushPopRegisters |= ArmPushPop_R4; }
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if (ShouldPushPopReg(Arm_R5)) { PushPopRegisters |= ArmPushPop_R5; }
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if (ShouldPushPopReg(Arm_R6)) { PushPopRegisters |= ArmPushPop_R6; }
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if (ShouldPushPopReg(Arm_R7)) { PushPopRegisters |= ArmPushPop_R7; }
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if (ShouldPushPopReg(Arm_R8)) { PushPopRegisters |= ArmPushPop_R8; }
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if (ShouldPushPopReg(Arm_R9)) { PushPopRegisters |= ArmPushPop_R9; }
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if (ShouldPushPopReg(Arm_R10)) { PushPopRegisters |= ArmPushPop_R10; }
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if (ShouldPushPopReg(Arm_R11)) { PushPopRegisters |= ArmPushPop_R11; }
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if (ShouldPushPopReg(Arm_R12)) { PushPopRegisters |= ArmPushPop_R12; }
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if (ShouldPushPopReg(Arm_R13)) { PushPopRegisters |= ArmPushPop_R13; }
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if (ShouldPushPopReg(Arm_R14)) { PushPopRegisters |= ArmPushPop_R14; }
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if (ShouldPushPopReg(Arm_R15)) { PushPopRegisters |= ArmPushPop_R15; }
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if (PushPopRegisters != 0)
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{
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PushArmReg(PushPopRegisters);
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}
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}
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void CArmRegInfo::AfterCallDirect(void)
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{
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if (!m_InCallDirect)
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{
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CPU_Message("%s: Not in CallDirect",__FUNCTION__);
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g_Notify->BreakPoint(__FILE__, __LINE__);
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return;
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}
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int PushPopRegisters = 0;
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if (ShouldPushPopReg(Arm_R0)) { PushPopRegisters |= ArmPushPop_R0; }
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if (ShouldPushPopReg(Arm_R1)) { PushPopRegisters |= ArmPushPop_R1; }
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if (ShouldPushPopReg(Arm_R2)) { PushPopRegisters |= ArmPushPop_R2; }
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if (ShouldPushPopReg(Arm_R3)) { PushPopRegisters |= ArmPushPop_R3; }
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if (ShouldPushPopReg(Arm_R4)) { PushPopRegisters |= ArmPushPop_R4; }
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if (ShouldPushPopReg(Arm_R5)) { PushPopRegisters |= ArmPushPop_R5; }
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if (ShouldPushPopReg(Arm_R6)) { PushPopRegisters |= ArmPushPop_R6; }
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if (ShouldPushPopReg(Arm_R7)) { PushPopRegisters |= ArmPushPop_R7; }
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if (ShouldPushPopReg(Arm_R8)) { PushPopRegisters |= ArmPushPop_R8; }
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if (ShouldPushPopReg(Arm_R9)) { PushPopRegisters |= ArmPushPop_R9; }
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if (ShouldPushPopReg(Arm_R10)) { PushPopRegisters |= ArmPushPop_R10; }
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if (ShouldPushPopReg(Arm_R11)) { PushPopRegisters |= ArmPushPop_R11; }
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if (ShouldPushPopReg(Arm_R12)) { PushPopRegisters |= ArmPushPop_R12; }
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if (ShouldPushPopReg(Arm_R13)) { PushPopRegisters |= ArmPushPop_R13; }
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if (ShouldPushPopReg(Arm_R14)) { PushPopRegisters |= ArmPushPop_R14; }
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if (ShouldPushPopReg(Arm_R15)) { PushPopRegisters |= ArmPushPop_R15; }
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if (PushPopRegisters != 0)
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{
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PopArmReg(PushPopRegisters);
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}
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SetRoundingModel(CRegInfo::RoundUnknown);
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m_InCallDirect = false;
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}
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void CArmRegInfo::FixRoundModel(FPU_ROUND RoundMethod)
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{
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if (m_InCallDirect)
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{
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CPU_Message("%s: in CallDirect",__FUNCTION__);
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g_Notify->BreakPoint(__FILE__, __LINE__);
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return;
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}
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if (GetRoundingModel() == RoundMethod)
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{
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return;
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}
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CPU_Message(" FixRoundModel: CurrentRoundingModel: %s targetRoundModel: %s", RoundingModelName(GetRoundingModel()), RoundingModelName(RoundMethod));
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if (RoundMethod == RoundDefault)
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{
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m_RegWorkingSet.BeforeCallDirect();
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MoveVariableToArmReg(_RoundingModel, "_RoundingModel", Arm_R0);
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CallFunction((void *)fesetround, "fesetround");
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m_RegWorkingSet.AfterCallDirect();
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}
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else
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}
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void CArmRegInfo::Map_GPR_32bit(int32_t MipsReg, bool SignValue, int32_t MipsRegToLoad)
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{
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if (m_InCallDirect)
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{
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CPU_Message("%s: in CallDirect",__FUNCTION__);
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g_Notify->BreakPoint(__FILE__, __LINE__);
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return;
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}
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ArmReg Reg;
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if (MipsReg == 0)
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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return;
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}
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if (IsUnknown(MipsReg) || IsConst(MipsReg))
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{
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Reg = FreeArmReg();
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if (Reg < 0)
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{
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if (bHaveDebugger()) { g_Notify->DisplayError("Map_GPR_32bit\n\nOut of registers"); }
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g_Notify->BreakPoint(__FILE__, __LINE__);
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return;
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}
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SetArmRegProtected(Reg, true);
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CPU_Message(" regcache: allocate %s to %s", ArmRegName(Reg), CRegName::GPR[MipsReg]);
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}
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else
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{
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if (Is64Bit(MipsReg))
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{
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CPU_Message(" regcache: unallocate %s from high 32bit of %s", ArmRegName(GetMipsRegMapHi(MipsReg)), CRegName::GPR_Hi[MipsReg]);
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SetArmRegMapOrder(GetMipsRegMapHi(MipsReg), 0);
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SetArmRegMapped(GetMipsRegMapHi(MipsReg), NotMapped);
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SetArmRegProtected(GetMipsRegMapHi(MipsReg), false);
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SetMipsRegHi(MipsReg, 0);
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}
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Reg = GetMipsRegMapLo(MipsReg);
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}
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for (int32_t count = 0; count <= Arm_R15; count++)
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{
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uint32_t Count = GetArmRegMapOrder((ArmReg)count);
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if (Count > 0)
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{
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SetArmRegMapOrder((ArmReg)count, Count + 1);
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}
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}
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SetArmRegMapOrder(Reg, 1);
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CPU_Message("MipsRegToLoad = %d (%s)", MipsRegToLoad, CRegName::GPR[MipsRegToLoad]);
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if (MipsRegToLoad > 0)
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{
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if (IsUnknown(MipsRegToLoad))
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{
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ArmReg GprReg = Map_Variable(VARIABLE_GPR);
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LoadArmRegPointerToArmReg(Reg, GprReg, (uint8_t)(MipsRegToLoad << 3));
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SetArmRegProtected(GprReg, false);
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}
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else if (IsMapped(MipsRegToLoad))
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{
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if (MipsReg != MipsRegToLoad)
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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//MoveArmRegToArmReg(GetMipsRegMapLo(MipsRegToLoad), Reg);
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}
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}
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else
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{
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MoveConstToArmReg(Reg, GetMipsRegLo(MipsRegToLoad));
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}
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}
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else if (MipsRegToLoad == 0)
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{
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MoveConstToArmReg(Reg, (uint32_t)0);
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}
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SetArmRegMapped(Reg, GPR_Mapped);
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SetArmRegProtected(Reg, true);
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SetMipsRegMapLo(MipsReg, Reg);
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SetMipsRegState(MipsReg, SignValue ? STATE_MAPPED_32_SIGN : STATE_MAPPED_32_ZERO);
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}
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void CArmRegInfo::Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad)
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{
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if (m_InCallDirect)
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{
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CPU_Message("%s: in CallDirect",__FUNCTION__);
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g_Notify->BreakPoint(__FILE__, __LINE__);
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return;
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}
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ArmReg regHi, reglo;
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int32_t count;
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if (MipsReg == 0)
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{
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if (bHaveDebugger()) { g_Notify->DisplayError("Map_GPR_64bit\n\nWhy are you trying to map reg 0"); }
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g_Notify->BreakPoint(__FILE__, __LINE__);
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return;
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}
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ProtectGPR(MipsReg);
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if (IsUnknown(MipsReg) || IsConst(MipsReg))
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{
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regHi = FreeArmReg();
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if (regHi < 0)
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{
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if (bHaveDebugger()) { g_Notify->DisplayError("Map_GPR_64bit\n\nOut of registers"); }
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g_Notify->BreakPoint(__FILE__, __LINE__);
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return;
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}
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SetArmRegProtected(regHi, true);
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reglo = FreeArmReg();
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if (reglo < 0)
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{
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if (bHaveDebugger()) { g_Notify->DisplayError("Map_GPR_64bit\n\nOut of registers"); }
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g_Notify->BreakPoint(__FILE__, __LINE__);
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return;
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}
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SetArmRegProtected(reglo, true);
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CPU_Message(" regcache: allocate %s to hi word of %s", ArmRegName(regHi), CRegName::GPR[MipsReg]);
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CPU_Message(" regcache: allocate %s to low word of %s", ArmRegName(reglo), CRegName::GPR[MipsReg]);
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}
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else
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{
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reglo = GetMipsRegMapLo(MipsReg);
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if (Is32Bit(MipsReg))
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{
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SetArmRegProtected(reglo, true);
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regHi = FreeArmReg();
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if (regHi < 0)
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{
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if (bHaveDebugger()) { g_Notify->DisplayError("Map_GPR_64bit\n\nOut of registers"); }
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g_Notify->BreakPoint(__FILE__, __LINE__);
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return;
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}
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SetArmRegProtected(regHi, true);
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CPU_Message(" regcache: allocate %s to hi word of %s", ArmRegName(regHi), CRegName::GPR[MipsReg]);
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}
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else
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{
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regHi = GetMipsRegMapHi(MipsReg);
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}
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}
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for (int32_t count = 0; count <= Arm_R15; count++)
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{
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uint32_t Count = GetArmRegMapOrder((ArmReg)count);
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if (Count > 0)
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{
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SetArmRegMapOrder((ArmReg)count, Count + 1);
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}
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}
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SetArmRegMapOrder(regHi, 1);
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SetArmRegMapOrder(reglo, 1);
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if (MipsRegToLoad > 0)
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{
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if (IsUnknown(MipsRegToLoad))
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{
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ArmReg GprReg = Map_Variable(VARIABLE_GPR);
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LoadArmRegPointerToArmReg(regHi, GprReg, (uint8_t)(MipsRegToLoad << 3) + 4);
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LoadArmRegPointerToArmReg(reglo, GprReg, (uint8_t)(MipsRegToLoad << 3));
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SetArmRegProtected(GprReg, false);
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}
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else if (IsMapped(MipsRegToLoad))
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{
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if (Is32Bit(MipsRegToLoad))
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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/*if (IsSigned(MipsRegToLoad))
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{
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MoveX86RegToX86Reg(GetMipsRegMapLo(MipsRegToLoad), x86Hi);
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ShiftRightSignImmed(x86Hi, 31);
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}
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else
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{
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XorX86RegToX86Reg(x86Hi, x86Hi);
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}
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if (MipsReg != MipsRegToLoad)
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{
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MoveX86RegToX86Reg(GetMipsRegMapLo(MipsRegToLoad), x86lo);
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}*/
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}
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else if (MipsReg != MipsRegToLoad)
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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/*MoveX86RegToX86Reg(GetMipsRegMapHi(MipsRegToLoad), x86Hi);
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MoveX86RegToX86Reg(GetMipsRegMapLo(MipsRegToLoad), x86lo);*/
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}
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}
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else
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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/*CPU_Message("Map_GPR_64bit 11");
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if (Is32Bit(MipsRegToLoad))
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{
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if (IsSigned(MipsRegToLoad))
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{
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MoveConstToX86reg(GetMipsRegLo_S(MipsRegToLoad) >> 31, x86Hi);
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}
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else
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{
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MoveConstToX86reg(0, x86Hi);
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}
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}
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else
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{
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MoveConstToX86reg(GetMipsRegHi(MipsRegToLoad), x86Hi);
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}
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MoveConstToX86reg(GetMipsRegLo(MipsRegToLoad), x86lo);*/
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}
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}
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else if (MipsRegToLoad == 0)
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{
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MoveConstToArmReg(regHi, (uint32_t)0);
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MoveConstToArmReg(reglo, (uint32_t)0);
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}
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SetArmRegMapped(regHi, GPR_Mapped);
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SetArmRegMapped(reglo, GPR_Mapped);
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SetArmRegProtected(regHi, true);
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SetArmRegProtected(reglo, true);
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SetMipsRegMapHi(MipsReg, regHi);
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SetMipsRegMapLo(MipsReg, reglo);
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SetMipsRegState(MipsReg, STATE_MAPPED_64);
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}
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void CArmRegInfo::UnMap_AllFPRs()
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{
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if (m_InCallDirect)
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{
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CPU_Message("%s: in CallDirect",__FUNCTION__);
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g_Notify->BreakPoint(__FILE__, __LINE__);
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return;
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}
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CPU_Message("%s", __FUNCTION__);
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}
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CArmOps::ArmReg CArmRegInfo::FreeArmReg()
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{
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if (m_InCallDirect)
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{
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CPU_Message("%s: in CallDirect",__FUNCTION__);
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g_Notify->BreakPoint(__FILE__, __LINE__);
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return Arm_Unknown;
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}
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if ((GetArmRegMapped(Arm_R7) == NotMapped || GetArmRegMapped(Arm_R7) == Temp_Mapped) && !GetArmRegProtected(Arm_R7)) { return Arm_R7; }
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if ((GetArmRegMapped(Arm_R6) == NotMapped || GetArmRegMapped(Arm_R6) == Temp_Mapped) && !GetArmRegProtected(Arm_R6)) { return Arm_R6; }
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if ((GetArmRegMapped(Arm_R5) == NotMapped || GetArmRegMapped(Arm_R5) == Temp_Mapped) && !GetArmRegProtected(Arm_R5)) { return Arm_R5; }
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if ((GetArmRegMapped(Arm_R4) == NotMapped || GetArmRegMapped(Arm_R4) == Temp_Mapped) && !GetArmRegProtected(Arm_R4)) { return Arm_R4; }
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if ((GetArmRegMapped(Arm_R3) == NotMapped || GetArmRegMapped(Arm_R3) == Temp_Mapped) && !GetArmRegProtected(Arm_R3)) { return Arm_R3; }
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if ((GetArmRegMapped(Arm_R2) == NotMapped || GetArmRegMapped(Arm_R2) == Temp_Mapped) && !GetArmRegProtected(Arm_R2)) { return Arm_R2; }
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if ((GetArmRegMapped(Arm_R1) == NotMapped || GetArmRegMapped(Arm_R1) == Temp_Mapped) && !GetArmRegProtected(Arm_R1)) { return Arm_R1; }
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if ((GetArmRegMapped(Arm_R0) == NotMapped || GetArmRegMapped(Arm_R0) == Temp_Mapped) && !GetArmRegProtected(Arm_R0)) { return Arm_R0; }
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if ((GetArmRegMapped(Arm_R12) == NotMapped || GetArmRegMapped(Arm_R12) == Temp_Mapped) && !GetArmRegProtected(Arm_R12)) { return Arm_R12; }
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if ((GetArmRegMapped(Arm_R11) == NotMapped || GetArmRegMapped(Arm_R11) == Temp_Mapped) && !GetArmRegProtected(Arm_R11)) { return Arm_R11; }
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if ((GetArmRegMapped(Arm_R10) == NotMapped || GetArmRegMapped(Arm_R10) == Temp_Mapped) && !GetArmRegProtected(Arm_R10)) { return Arm_R10; }
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if ((GetArmRegMapped(Arm_R9) == NotMapped || GetArmRegMapped(Arm_R9) == Temp_Mapped) && !GetArmRegProtected(Arm_R9)) { return Arm_R9; }
|
|
if ((GetArmRegMapped(Arm_R8) == NotMapped || GetArmRegMapped(Arm_R8) == Temp_Mapped) && !GetArmRegProtected(Arm_R8)) { return Arm_R8; }
|
|
|
|
g_Notify->BreakPoint(__FILE__, __LINE__);
|
|
return Arm_Unknown;
|
|
}
|
|
|
|
void CArmRegInfo::WriteBackRegisters()
|
|
{
|
|
}
|
|
|
|
CArmOps::ArmReg CArmRegInfo::Map_TempReg(ArmReg Reg, int32_t MipsReg, bool LoadHiWord)
|
|
{
|
|
if (m_InCallDirect)
|
|
{
|
|
CPU_Message("%s: in CallDirect",__FUNCTION__);
|
|
g_Notify->BreakPoint(__FILE__, __LINE__);
|
|
return Arm_Unknown;
|
|
}
|
|
ArmReg GprReg = MipsReg >= 0 ? Map_Variable(VARIABLE_GPR) : Arm_Unknown;
|
|
|
|
if (Reg == CArmOps::Arm_Any)
|
|
{
|
|
if (GetArmRegMapped(Arm_R7) == Temp_Mapped && !GetArmRegProtected(Arm_R7)) { Reg = Arm_R7; }
|
|
else if (GetArmRegMapped(Arm_R6) == Temp_Mapped && !GetArmRegProtected(Arm_R6)) { Reg = Arm_R6; }
|
|
else if (GetArmRegMapped(Arm_R5) == Temp_Mapped && !GetArmRegProtected(Arm_R5)) { Reg = Arm_R5; }
|
|
else if (GetArmRegMapped(Arm_R4) == Temp_Mapped && !GetArmRegProtected(Arm_R4)) { Reg = Arm_R4; }
|
|
else if (GetArmRegMapped(Arm_R3) == Temp_Mapped && !GetArmRegProtected(Arm_R3)) { Reg = Arm_R3; }
|
|
else if (GetArmRegMapped(Arm_R2) == Temp_Mapped && !GetArmRegProtected(Arm_R2)) { Reg = Arm_R2; }
|
|
else if (GetArmRegMapped(Arm_R1) == Temp_Mapped && !GetArmRegProtected(Arm_R1)) { Reg = Arm_R1; }
|
|
else if (GetArmRegMapped(Arm_R0) == Temp_Mapped && !GetArmRegProtected(Arm_R0)) { Reg = Arm_R0; }
|
|
else if (GetArmRegMapped(Arm_R12) == Temp_Mapped && !GetArmRegProtected(Arm_R12)) { Reg = Arm_R12; }
|
|
else if (GetArmRegMapped(Arm_R11) == Temp_Mapped && !GetArmRegProtected(Arm_R11)) { Reg = Arm_R11; }
|
|
else if (GetArmRegMapped(Arm_R10) == Temp_Mapped && !GetArmRegProtected(Arm_R10)) { Reg = Arm_R10; }
|
|
else if (GetArmRegMapped(Arm_R9) == Temp_Mapped && !GetArmRegProtected(Arm_R9)) { Reg = Arm_R9; }
|
|
else if (GetArmRegMapped(Arm_R8) == Temp_Mapped && !GetArmRegProtected(Arm_R8)) { Reg = Arm_R8; }
|
|
|
|
if (Reg == Arm_Any)
|
|
{
|
|
Reg = FreeArmReg();
|
|
if (Reg == Arm_Unknown)
|
|
{
|
|
WriteTrace(TraceRegisterCache, TraceError, "Failed to find a free register");
|
|
g_Notify->BreakPoint(__FILE__, __LINE__);
|
|
return Arm_Unknown;
|
|
}
|
|
}
|
|
}
|
|
else if (GetArmRegMapped(Reg) == NotMapped || GetArmRegMapped(Reg) == Temp_Mapped)
|
|
{
|
|
if (GetArmRegProtected(Reg))
|
|
{
|
|
g_Notify->BreakPoint(__FILE__, __LINE__);
|
|
}
|
|
}
|
|
else if (GetArmRegMapped(Reg) == GPR_Mapped)
|
|
{
|
|
g_Notify->BreakPoint(__FILE__, __LINE__);
|
|
}
|
|
else
|
|
{
|
|
g_Notify->BreakPoint(__FILE__, __LINE__);
|
|
}
|
|
if (MipsReg < 0)
|
|
{
|
|
CPU_Message(" regcache: allocate %s as temp storage", ArmRegName(Reg));
|
|
}
|
|
else
|
|
{
|
|
CPU_Message(" regcache: allocate %s as temp storage (%s)", ArmRegName(Reg), LoadHiWord ? CRegName::GPR_Hi[MipsReg] : CRegName::GPR_Lo[MipsReg]);
|
|
if (GprReg == Arm_Unknown)
|
|
{
|
|
g_Notify->BreakPoint(__FILE__, __LINE__);
|
|
}
|
|
if (LoadHiWord)
|
|
{
|
|
if (IsUnknown(MipsReg))
|
|
{
|
|
LoadArmRegPointerToArmReg(Reg, GprReg, (uint8_t)(MipsReg << 3) + 4);
|
|
}
|
|
else if (IsMapped(MipsReg))
|
|
{
|
|
g_Notify->BreakPoint(__FILE__, __LINE__);
|
|
}
|
|
else
|
|
{
|
|
if (Is64Bit(MipsReg))
|
|
{
|
|
g_Notify->BreakPoint(__FILE__, __LINE__);
|
|
//MoveConstToArmReg(Reg, GetMipsRegHi(MipsReg));
|
|
}
|
|
else
|
|
{
|
|
g_Notify->BreakPoint(__FILE__, __LINE__);
|
|
//MoveConstToArmReg(Reg, GetMipsRegLo_S(MipsReg) >> 31);
|
|
}
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if (IsUnknown(MipsReg))
|
|
{
|
|
LoadArmRegPointerToArmReg(Reg, GprReg, (uint8_t)(MipsReg << 3));
|
|
}
|
|
else if (IsMapped(MipsReg))
|
|
{
|
|
g_Notify->BreakPoint(__FILE__, __LINE__);
|
|
//MoveArmRegToArmReg(GetMipsRegMapLo(MipsReg), Reg);
|
|
}
|
|
else
|
|
{
|
|
MoveConstToArmReg(Reg, GetMipsRegLo(MipsReg));
|
|
}
|
|
}
|
|
}
|
|
SetArmRegMapped(Reg, Temp_Mapped);
|
|
SetArmRegProtected(Reg, true);
|
|
for (int32_t i = 0, n = sizeof(m_ArmReg_MappedTo) / sizeof(m_ArmReg_MappedTo[0]); i < n; i++)
|
|
{
|
|
int32_t MapOrder = GetArmRegMapOrder((ArmReg)i);
|
|
if (MapOrder > 0)
|
|
{
|
|
SetArmRegMapOrder((ArmReg)i, MapOrder + 1);
|
|
}
|
|
}
|
|
SetArmRegMapOrder(Reg, 1);
|
|
SetArmRegProtected(GprReg, false);
|
|
return Reg;
|
|
}
|
|
|
|
CArmOps::ArmReg CArmRegInfo::Map_Variable(VARIABLE_MAPPED variable)
|
|
{
|
|
if (m_InCallDirect)
|
|
{
|
|
CPU_Message("%s: in CallDirect", __FUNCTION__);
|
|
g_Notify->BreakPoint(__FILE__, __LINE__);
|
|
return Arm_Unknown;
|
|
}
|
|
for (int32_t i = 0, n = sizeof(m_ArmReg_MappedTo) / sizeof(m_ArmReg_MappedTo[0]); i < n; i++)
|
|
{
|
|
if (m_ArmReg_MappedTo[i] == Variable_Mapped && m_Variable_MappedTo[i] == variable)
|
|
{
|
|
SetArmRegProtected((ArmReg)i, true);
|
|
return (ArmReg)i;
|
|
}
|
|
}
|
|
|
|
ArmReg Reg = FreeArmReg();
|
|
if (Reg == Arm_Unknown)
|
|
{
|
|
WriteTrace(TraceRegisterCache, TraceError, "Failed to find a free register");
|
|
g_Notify->BreakPoint(__FILE__, __LINE__);
|
|
return Arm_Unknown;
|
|
}
|
|
SetArmRegMapped(Reg, Variable_Mapped);
|
|
SetArmRegProtected(Reg, true);
|
|
|
|
switch (variable)
|
|
{
|
|
case VARIABLE_GPR:
|
|
CPU_Message(" regcache: allocate %s as pointer to GPR", ArmRegName(Reg));
|
|
m_Variable_MappedTo[Reg] = variable;
|
|
MoveConstToArmReg(Reg, (uint32_t)_GPR, "_GPR");
|
|
break;
|
|
case VARIABLE_FPR:
|
|
CPU_Message(" regcache: allocate %s as pointer to _FPR_S", ArmRegName(Reg));
|
|
m_Variable_MappedTo[Reg] = variable;
|
|
MoveConstToArmReg(Reg,(uint32_t)_FPR_S,"_FPR_S");
|
|
break;
|
|
case VARIABLE_TLB_READMAP:
|
|
CPU_Message(" regcache: allocate %s as pointer to TLB_READMAP", ArmRegName(Reg));
|
|
m_Variable_MappedTo[Reg] = variable;
|
|
MoveConstToArmReg(Reg, (uint32_t)(g_MMU->m_TLB_ReadMap), "MMU->TLB_ReadMap");
|
|
break;
|
|
case VARIABLE_NEXT_TIMER:
|
|
CPU_Message(" regcache: allocate %s as pointer to g_NextTimer", ArmRegName(Reg));
|
|
m_Variable_MappedTo[Reg] = variable;
|
|
MoveConstToArmReg(Reg, (uint32_t)(g_NextTimer), "g_NextTimer");
|
|
break;
|
|
default:
|
|
g_Notify->BreakPoint(__FILE__, __LINE__);
|
|
return Arm_Unknown;
|
|
}
|
|
return Reg;
|
|
}
|
|
|
|
void CArmRegInfo::ProtectGPR(uint32_t Reg)
|
|
{
|
|
if (m_InCallDirect)
|
|
{
|
|
CPU_Message("%s: in CallDirect",__FUNCTION__);
|
|
g_Notify->BreakPoint(__FILE__, __LINE__);
|
|
return;
|
|
}
|
|
if (IsUnknown(Reg) || IsConst(Reg))
|
|
{
|
|
return;
|
|
}
|
|
if (Is64Bit(Reg))
|
|
{
|
|
SetArmRegProtected(GetMipsRegMapHi(Reg), true);
|
|
}
|
|
SetArmRegProtected(GetMipsRegMapLo(Reg), true);
|
|
}
|
|
|
|
#endif |