1230 lines
37 KiB
C++
1230 lines
37 KiB
C++
#include "stdafx.h"
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unsigned int CRegInfo::m_fpuControl = 0;
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char *Format_Name[] = {"Unknown","dword","qword","float","double"};
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CRegInfo::CRegInfo ( void ) :
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m_CycleCount(0),
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m_Stack_TopPos(0),
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m_Fpu_Used(false),
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m_RoundingModel(RoundUnknown)
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{
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m_MIPS_RegState[0] = STATE_CONST_32;
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m_MIPS_RegVal[0].DW = 0;
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m_RegMapLo[0] = x86_Unknown;
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m_RegMapHi[0] = x86_Unknown;
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for (int i = 1; i < 32; i++ )
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{
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m_MIPS_RegState[i] = STATE_UNKNOWN;
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m_MIPS_RegVal[i].DW = 0;
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m_RegMapLo[i] = x86_Unknown;
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m_RegMapHi[i] = x86_Unknown;
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}
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for (int i = 0, n = sizeof(m_x86reg_MappedTo) / sizeof(m_x86reg_MappedTo[0]); i < n; i++ )
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{
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m_x86reg_MappedTo[i] = NotMapped;
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m_x86reg_Protected[i] = false;
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m_x86reg_MapOrder[i] = 0;
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}
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for (int i = 0, n = sizeof(x86fpu_MappedTo) / sizeof(x86fpu_MappedTo[0]); i < n; i++ )
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{
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x86fpu_MappedTo[i] = -1;
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x86fpu_State[i] = FPU_Unknown;
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x86fpu_StateChanged[i] = false;
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x86fpu_RoundingModel[i] = RoundDefault;
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}
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}
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CRegInfo::CRegInfo(const CRegInfo& rhs)
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{
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*this = rhs;
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}
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CRegInfo::~CRegInfo()
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{
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}
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CRegInfo& CRegInfo::operator=(const CRegInfo& right)
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{
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m_CycleCount = right.m_CycleCount;
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m_Stack_TopPos = right.m_Stack_TopPos;
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m_Fpu_Used = right.m_Fpu_Used;
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m_RoundingModel = right.m_RoundingModel;
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memcpy(&m_MIPS_RegState,&right.m_MIPS_RegState,sizeof(m_MIPS_RegState));
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memcpy(&m_MIPS_RegVal,&right.m_MIPS_RegVal,sizeof(m_MIPS_RegVal));
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memcpy(&m_RegMapLo,&right.m_RegMapLo,sizeof(m_RegMapLo));
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memcpy(&m_RegMapHi,&right.m_RegMapHi,sizeof(m_RegMapHi));
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memcpy(&m_x86reg_MappedTo,&right.m_x86reg_MappedTo,sizeof(m_x86reg_MappedTo));
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memcpy(&m_x86reg_Protected,&right.m_x86reg_Protected,sizeof(m_x86reg_Protected));
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memcpy(&m_x86reg_MapOrder,&right.m_x86reg_MapOrder,sizeof(m_x86reg_MapOrder));
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memcpy(&x86fpu_MappedTo,&right.x86fpu_MappedTo,sizeof(x86fpu_MappedTo));
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memcpy(&x86fpu_State,&right.x86fpu_State,sizeof(x86fpu_State));
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memcpy(&x86fpu_StateChanged,&right.x86fpu_StateChanged,sizeof(x86fpu_StateChanged));
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memcpy(&x86fpu_RoundingModel,&right.x86fpu_RoundingModel,sizeof(x86fpu_RoundingModel));
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#ifdef _DEBUG
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if (*this != right)
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{
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_Notify->BreakPoint(__FILE__,__LINE__);
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}
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#endif
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return *this;
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}
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bool CRegInfo::operator==(const CRegInfo& right) const
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{
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int count;
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for (count = 0; count < 32; count ++ ) {
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if (m_MIPS_RegState[count] != right.m_MIPS_RegState[count])
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{
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return false;
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}
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if (m_MIPS_RegState[count] == STATE_UNKNOWN)
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{
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continue;
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}
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if (m_MIPS_RegVal[count].DW != right.m_MIPS_RegVal[count].DW)
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{
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return false;
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}
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}
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for (count = 0; count < 10; count ++ ) {
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if (m_x86reg_MappedTo[count] != right.m_x86reg_MappedTo[count]) { return false; }
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if (m_x86reg_Protected[count] != right.m_x86reg_Protected[count]) { return false; }
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if (m_x86reg_MapOrder[count] != right.m_x86reg_MapOrder[count]) { return false; }
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}
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if (m_CycleCount != right.m_CycleCount) { return false; }
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if (m_Stack_TopPos != right.m_Stack_TopPos) { return false; }
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for (count = 0; count < 8; count ++ ) {
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if (x86fpu_MappedTo[count] != right.x86fpu_MappedTo[count]) { return false; }
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if (x86fpu_State[count] != right.x86fpu_State[count]) { return false; }
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if (x86fpu_RoundingModel[count] != right.x86fpu_RoundingModel[count]) { return false; }
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}
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if (m_Fpu_Used != right.m_Fpu_Used) { return false; }
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if (GetRoundingModel() != right.GetRoundingModel()) { return false; }
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return true;
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}
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bool CRegInfo::operator!=(const CRegInfo& right) const
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{
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return !(right == *this);
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}
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CRegInfo::REG_STATE CRegInfo::ConstantsType (__int64 Value)
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{
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if (((Value >> 32) == -1) && ((Value & 0x80000000) != 0)) { return STATE_CONST_32; }
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if (((Value >> 32) == 0) && ((Value & 0x80000000) == 0)) { return STATE_CONST_32; }
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return STATE_CONST_64;
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}
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void CRegInfo::FixRoundModel(FPU_ROUND RoundMethod )
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{
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if (GetRoundingModel() == RoundMethod)
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{
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return;
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}
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CPU_Message(" FixRoundModel: CurrentRoundingModel: %s targetRoundModel: %s",RoundingModelName(GetRoundingModel()),RoundingModelName(RoundMethod));
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m_fpuControl = 0;
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fpuStoreControl(&m_fpuControl, "m_fpuControl");
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x86Reg reg = Map_TempReg(x86_Any,-1,FALSE);
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MoveVariableToX86reg(&m_fpuControl, "m_fpuControl", reg);
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AndConstToX86Reg(reg, 0xF3FF);
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if (RoundMethod == RoundDefault)
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{
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x86Reg RoundReg = Map_TempReg(x86_Any,-1,FALSE);
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MoveVariableToX86reg(&_Reg->m_RoundingModel,"m_RoundingModel", RoundReg);
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ShiftLeftSignImmed(RoundReg,2);
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OrX86RegToX86Reg(reg,RoundReg);
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SetX86Protected(RoundReg,false);
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} else {
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switch (RoundMethod) {
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case RoundTruncate: OrConstToX86Reg(0x0C00, reg); break;
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case RoundNearest: /*OrConstToX86Reg(0x0000, reg);*/ break;
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case RoundDown: OrConstToX86Reg(0x0400, reg); break;
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case RoundUp: OrConstToX86Reg(0x0800, reg); break;
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default:
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_Notify->DisplayError("Unknown Rounding model");
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}
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}
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MoveX86regToVariable(reg, &m_fpuControl, "m_fpuControl");
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SetX86Protected(reg,false);
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fpuLoadControl(&m_fpuControl, "m_fpuControl");
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SetRoundingModel(RoundMethod);
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}
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void CRegInfo::ChangeFPURegFormat (int Reg, FPU_STATE OldFormat, FPU_STATE NewFormat, FPU_ROUND RoundingModel)
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{
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for (DWORD i = 0; i < 8; i++)
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{
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if (x86fpu_MappedTo[i] != Reg)
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{
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continue;
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}
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if (x86fpu_State[i] != OldFormat || x86fpu_StateChanged[i])
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{
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UnMap_FPR(Reg,TRUE);
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Load_FPR_ToTop(Reg,Reg,OldFormat);
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} else {
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CPU_Message(" regcache: Changed format of ST(%d) from %s to %s", (i - StackTopPos() + 8) & 7,Format_Name[OldFormat],Format_Name[NewFormat]);
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}
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FpuRoundingModel(i) = RoundingModel;
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x86fpu_State[i] = NewFormat;
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x86fpu_StateChanged[i] = true;
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return;
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}
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#ifndef EXTERNAL_RELEASE
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_Notify->DisplayError("ChangeFormat: Register not on stack!!");
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#endif
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}
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void CRegInfo::Load_FPR_ToTop ( int Reg, int RegToLoad, FPU_STATE Format)
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{
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if (GetRoundingModel() != RoundDefault)
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{
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FixRoundModel(RoundDefault);
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}
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CPU_Message("CurrentRoundingModel: %s FpuRoundingModel(StackTopPos()): %s",RoundingModelName(GetRoundingModel()),RoundingModelName(FpuRoundingModel(StackTopPos())));
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int i;
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if (RegToLoad < 0) { _Notify->DisplayError("Load_FPR_ToTop\nRegToLoad < 0 ???"); return; }
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if (Reg < 0) { _Notify->DisplayError("Load_FPR_ToTop\nReg < 0 ???"); return; }
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if (Format == FPU_Double || Format == FPU_Qword) {
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UnMap_FPR(Reg + 1,TRUE);
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UnMap_FPR(RegToLoad + 1,TRUE);
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} else {
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if ((Reg & 1) != 0) {
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for (i = 0; i < 8; i++) {
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if (x86fpu_MappedTo[i] == (Reg - 1)) {
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if (x86fpu_State[i] == FPU_Double || x86fpu_State[i] == FPU_Qword) {
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UnMap_FPR(Reg,TRUE);
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}
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i = 8;
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}
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}
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}
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if ((RegToLoad & 1) != 0) {
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for (i = 0; i < 8; i++) {
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if (x86fpu_MappedTo[i] == (RegToLoad - 1)) {
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if (x86fpu_State[i] == FPU_Double || x86fpu_State[i] == FPU_Qword) {
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UnMap_FPR(RegToLoad,TRUE);
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}
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i = 8;
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}
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}
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}
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}
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if (Reg == RegToLoad) {
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//if different format then unmap original reg from stack
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for (i = 0; i < 8; i++) {
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if (x86fpu_MappedTo[i] != Reg)
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{
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continue;
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}
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if (x86fpu_State[i] != Format) {
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UnMap_FPR(Reg,TRUE);
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}
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break;
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}
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} else {
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//if different format then unmap original reg from stack
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for (i = 0; i < 8; i++)
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{
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if (x86fpu_MappedTo[i] != Reg)
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{
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continue;
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}
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UnMap_FPR(Reg,x86fpu_State[i] != Format);
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break;
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}
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}
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if (RegInStack(RegToLoad,Format)) {
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if (Reg != RegToLoad) {
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if (x86fpu_MappedTo[(StackTopPos() - 1) & 7] != RegToLoad) {
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UnMap_FPR(x86fpu_MappedTo[(StackTopPos() - 1) & 7],TRUE);
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CPU_Message(" regcache: allocate ST(0) to %s", CRegName::FPR[Reg]);
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fpuLoadReg(&StackTopPos(),StackPosition(RegToLoad));
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FpuRoundingModel(StackTopPos()) = RoundDefault;
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x86fpu_MappedTo[StackTopPos()] = Reg;
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x86fpu_State[StackTopPos()] = Format;
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x86fpu_StateChanged[StackTopPos()] = false;
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} else {
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UnMap_FPR(x86fpu_MappedTo[(StackTopPos() - 1) & 7],TRUE);
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Load_FPR_ToTop (Reg, RegToLoad, Format);
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}
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} else {
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x86FpuValues RegPos = x86_ST_Unknown;
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for (DWORD i = 0; i < 8; i++) {
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if (x86fpu_MappedTo[i] == Reg) {
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RegPos = (x86FpuValues)i;
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i = 8;
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}
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}
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if (RegPos == StackTopPos()) {
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return;
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}
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x86FpuValues StackPos = StackPosition(Reg);
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FpuRoundingModel(RegPos) = FpuRoundingModel(StackTopPos());
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x86fpu_MappedTo[RegPos] = x86fpu_MappedTo[StackTopPos()];
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x86fpu_State[RegPos] = x86fpu_State[StackTopPos()];
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x86fpu_StateChanged[RegPos] = x86fpu_StateChanged[StackTopPos()];
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CPU_Message(" regcache: allocate ST(%d) to %s", StackPos,CRegName::FPR[x86fpu_MappedTo[RegPos]]);
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CPU_Message(" regcache: allocate ST(0) to %s", CRegName::FPR[Reg]);
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fpuExchange(StackPos);
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FpuRoundingModel(StackTopPos()) = RoundDefault;
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x86fpu_MappedTo[StackTopPos()] = Reg;
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x86fpu_State[StackTopPos()] = Format;
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x86fpu_StateChanged[StackTopPos()] = false;
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}
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} else {
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char Name[50];
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x86Reg TempReg;
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UnMap_FPR(x86fpu_MappedTo[(StackTopPos() - 1) & 7],TRUE);
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for (i = 0; i < 8; i++) {
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if (x86fpu_MappedTo[i] == RegToLoad) {
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UnMap_FPR(RegToLoad,TRUE);
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i = 8;
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}
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}
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CPU_Message(" regcache: allocate ST(0) to %s", CRegName::FPR[Reg]);
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TempReg = Map_TempReg(x86_Any,-1,FALSE);
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switch (Format) {
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case FPU_Dword:
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sprintf(Name,"m_FPR_S[%d]",RegToLoad);
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MoveVariableToX86reg(&_Reg->m_FPR_S[RegToLoad],Name,TempReg);
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fpuLoadIntegerDwordFromX86Reg(&StackTopPos(),TempReg);
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break;
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case FPU_Qword:
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sprintf(Name,"m_FPR_D[%d]",RegToLoad);
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MoveVariableToX86reg(&_Reg->m_FPR_D[RegToLoad],Name,TempReg);
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fpuLoadIntegerQwordFromX86Reg(&StackTopPos(),TempReg);
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break;
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case FPU_Float:
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sprintf(Name,"m_FPR_S[%d]",RegToLoad);
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MoveVariableToX86reg(&_Reg->m_FPR_S[RegToLoad],Name,TempReg);
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fpuLoadDwordFromX86Reg(&StackTopPos(),TempReg);
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break;
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case FPU_Double:
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sprintf(Name,"m_FPR_D[%d]",RegToLoad);
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MoveVariableToX86reg(&_Reg->m_FPR_D[RegToLoad],Name,TempReg);
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fpuLoadQwordFromX86Reg(&StackTopPos(),TempReg);
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break;
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#ifndef EXTERNAL_RELEASE
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default:
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_Notify->DisplayError("Load_FPR_ToTop\nUnkown format to load %d",Format);
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#endif
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}
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SetX86Protected(TempReg,FALSE);
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FpuRoundingModel(StackTopPos()) = RoundDefault;
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x86fpu_MappedTo[StackTopPos()] = Reg;
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x86fpu_State[StackTopPos()] = Format;
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x86fpu_StateChanged[StackTopPos()] = false;
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}
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}
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CRegInfo::x86FpuValues CRegInfo::StackPosition (int Reg)
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{
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int i;
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for (i = 0; i < 8; i++) {
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if (x86fpu_MappedTo[i] == Reg) {
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return (x86FpuValues)((i - StackTopPos()) & 7);
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}
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}
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return x86_ST_Unknown;
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}
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CX86Ops::x86Reg CRegInfo::FreeX86Reg ( void )
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{
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if (GetX86Mapped(x86_EDI) == NotMapped && !GetX86Protected(x86_EDI)) { return x86_EDI; }
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if (GetX86Mapped(x86_ESI) == NotMapped && !GetX86Protected(x86_ESI)) { return x86_ESI; }
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if (GetX86Mapped(x86_EBX) == NotMapped && !GetX86Protected(x86_EBX)) { return x86_EBX; }
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if (GetX86Mapped(x86_EAX) == NotMapped && !GetX86Protected(x86_EAX)) { return x86_EAX; }
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if (GetX86Mapped(x86_EDX) == NotMapped && !GetX86Protected(x86_EDX)) { return x86_EDX; }
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if (GetX86Mapped(x86_ECX) == NotMapped && !GetX86Protected(x86_ECX)) { return x86_ECX; }
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x86Reg Reg = UnMap_TempReg();
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if (Reg != x86_Unknown) { return Reg; }
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int count, MapCount[10];
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x86Reg MapReg[10];
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for (count = 0; count < 10; count ++)
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{
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MapCount[count] = GetX86MapOrder((x86Reg)count);
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MapReg[count] = (x86Reg)count;
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}
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for (count = 0; count < 10; count ++) {
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int i;
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for (i = 0; i < 9; i ++) {
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x86Reg tempReg;
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DWORD temp;
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if (MapCount[i] < MapCount[i+1]) {
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temp = MapCount[i];
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MapCount[i] = MapCount[i+1];
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MapCount[i+1] = temp;
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tempReg = MapReg[i];
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MapReg[i] = MapReg[i+1];
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MapReg[i+1] = tempReg;
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}
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}
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}
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x86Reg StackReg = x86_Unknown;
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for (count = 0; count < 10; count ++)
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{
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if (MapCount[count] > 0 && GetX86Mapped(MapReg[count]) != Stack_Mapped)
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{
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if (UnMap_X86reg((x86Reg)MapReg[count]))
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{
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return (x86Reg)MapReg[count];
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}
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}
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if (GetX86Mapped(MapReg[count]) == Stack_Mapped) { StackReg = MapReg[count]; }
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}
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if (StackReg != x86_Unknown) {
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UnMap_X86reg(StackReg);
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return StackReg;
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}
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return x86_Unknown;
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}
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CX86Ops::x86Reg CRegInfo::Free8BitX86Reg ( void )
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{
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if (GetX86Mapped(x86_EBX) == NotMapped && !GetX86Protected(x86_EBX)) {return x86_EBX; }
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if (GetX86Mapped(x86_EAX) == NotMapped && !GetX86Protected(x86_EAX)) {return x86_EAX; }
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if (GetX86Mapped(x86_EDX) == NotMapped && !GetX86Protected(x86_EDX)) {return x86_EDX; }
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if (GetX86Mapped(x86_ECX) == NotMapped && !GetX86Protected(x86_ECX)) {return x86_ECX; }
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x86Reg Reg = UnMap_8BitTempReg();
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if (Reg > 0) { return Reg; }
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int count, MapCount[10], MapReg[10];
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for (count = 0; count < 10; count ++) {
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MapCount[count] = GetX86MapOrder((x86Reg)count);
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MapReg[count] = count;
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}
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for (count = 0; count < 10; count ++) {
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int i;
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for (i = 0; i < 9; i ++) {
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int temp;
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if (MapCount[i] < MapCount[i+1]) {
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temp = MapCount[i];
|
|
MapCount[i] = MapCount[i+1];
|
|
MapCount[i+1] = temp;
|
|
temp = MapReg[i];
|
|
MapReg[i] = MapReg[i+1];
|
|
MapReg[i+1] = temp;
|
|
}
|
|
}
|
|
|
|
}
|
|
for (count = 0; count < 10; count ++) {
|
|
if (MapCount[count] > 0) {
|
|
if (!Is8BitReg((x86Reg)count)) { continue; }
|
|
if (UnMap_X86reg((x86Reg)count)) {
|
|
return (x86Reg)count;
|
|
}
|
|
}
|
|
}
|
|
return x86_Unknown;
|
|
}
|
|
|
|
CX86Ops::x86Reg CRegInfo::UnMap_8BitTempReg (void )
|
|
{
|
|
int count;
|
|
|
|
for (count = 0; count < 10; count ++) {
|
|
if (!Is8BitReg((x86Reg)count)) { continue; }
|
|
if (MipsRegState((x86Reg)count) == Temp_Mapped) {
|
|
if (GetX86Protected((x86Reg)count) == FALSE) {
|
|
CPU_Message(" regcache: unallocate %s from temp storage",x86_Name((x86Reg)count));
|
|
SetX86Mapped((x86Reg)count, CRegInfo::NotMapped);
|
|
return (x86Reg)count;
|
|
}
|
|
}
|
|
}
|
|
return x86_Unknown;
|
|
}
|
|
|
|
CRegInfo::x86Reg CRegInfo::Get_MemoryStack ( void ) const
|
|
{
|
|
for (int i = 0, n = sizeof(x86_Registers)/ sizeof(x86_Registers[0]); i < n; i++)
|
|
{
|
|
if (GetX86Mapped(x86_Registers[i]) == Stack_Mapped)
|
|
{
|
|
return x86_Registers[i];
|
|
}
|
|
}
|
|
return x86_Unknown;
|
|
}
|
|
|
|
CRegInfo::x86Reg CRegInfo::Map_MemoryStack ( x86Reg Reg, bool bMapRegister, bool LoadValue)
|
|
{
|
|
x86Reg CurrentMap = Get_MemoryStack();
|
|
if (!bMapRegister)
|
|
{
|
|
//if not mapping then just return what the current mapping is
|
|
return CurrentMap;
|
|
}
|
|
|
|
if (CurrentMap != x86_Unknown && CurrentMap == Reg)
|
|
{
|
|
//already mapped to correct reg
|
|
return CurrentMap;
|
|
}
|
|
// map a register
|
|
if (Reg == x86_Any)
|
|
{
|
|
if (CurrentMap != x86_Unknown)
|
|
{
|
|
return CurrentMap;
|
|
}
|
|
Reg = FreeX86Reg();
|
|
if (Reg == x86_Unknown)
|
|
{
|
|
_Notify->DisplayError("Map_MemoryStack\n\nOut of registers");
|
|
_Notify->BreakPoint(__FILE__,__LINE__);
|
|
}
|
|
SetX86Mapped(Reg,CRegInfo::Stack_Mapped);
|
|
CPU_Message(" regcache: allocate %s as Memory Stack",x86_Name(Reg));
|
|
if (LoadValue)
|
|
{
|
|
MoveVariableToX86reg(&_Recompiler->MemoryStackPos(),"MemoryStack",Reg);
|
|
}
|
|
return Reg;
|
|
}
|
|
|
|
//move to a register/allocate register
|
|
UnMap_X86reg(Reg);
|
|
if (CurrentMap != x86_Unknown)
|
|
{
|
|
CPU_Message(" regcache: change allocation of Memory Stack from %s to %s",x86_Name(CurrentMap),x86_Name(Reg));
|
|
SetX86Mapped(Reg, CRegInfo::Stack_Mapped);
|
|
SetX86Mapped(CurrentMap,CRegInfo::NotMapped);
|
|
MoveX86RegToX86Reg(CurrentMap,Reg);
|
|
} else {
|
|
SetX86Mapped(Reg,CRegInfo::Stack_Mapped);
|
|
CPU_Message(" regcache: allocate %s as Memory Stack",x86_Name(Reg));
|
|
if (LoadValue)
|
|
{
|
|
MoveVariableToX86reg(&_Recompiler->MemoryStackPos(),"MemoryStack",Reg);
|
|
}
|
|
}
|
|
return Reg;
|
|
}
|
|
|
|
void CRegInfo::Map_GPR_32bit (int MipsReg, bool SignValue, int MipsRegToLoad)
|
|
{
|
|
int count;
|
|
|
|
x86Reg Reg;
|
|
if (MipsReg == 0)
|
|
{
|
|
_Notify->BreakPoint(__FILE__,__LINE__);
|
|
return;
|
|
}
|
|
|
|
if (IsUnknown(MipsReg) || IsConst(MipsReg))
|
|
{
|
|
Reg = FreeX86Reg();
|
|
if (Reg < 0) {
|
|
#ifndef EXTERNAL_RELEASE
|
|
_Notify->DisplayError("Map_GPR_32bit\n\nOut of registers");
|
|
#endif
|
|
_Notify->BreakPoint(__FILE__,__LINE__);
|
|
return;
|
|
}
|
|
CPU_Message(" regcache: allocate %s to %s",x86_Name(Reg),CRegName::GPR[MipsReg]);
|
|
} else {
|
|
if (Is64Bit(MipsReg))
|
|
{
|
|
CPU_Message(" regcache: unallocate %s from high 32bit of %s",x86_Name(MipsRegMapHi(MipsReg)),CRegName::GPR_Hi[MipsReg]);
|
|
SetX86MapOrder(MipsRegMapHi(MipsReg),0);
|
|
SetX86Mapped(MipsRegMapHi(MipsReg),NotMapped);
|
|
SetX86Protected(MipsRegMapHi(MipsReg),FALSE);
|
|
MipsRegHi(MipsReg) = 0;
|
|
}
|
|
Reg = MipsRegMapLo(MipsReg);
|
|
}
|
|
for (count = 0; count < 10; count ++)
|
|
{
|
|
DWORD Count = GetX86MapOrder((x86Reg)count);
|
|
if ( Count > 0)
|
|
{
|
|
SetX86MapOrder((x86Reg)count,Count + 1);
|
|
}
|
|
}
|
|
SetX86MapOrder(Reg,1);
|
|
|
|
if (MipsRegToLoad > 0)
|
|
{
|
|
if (IsUnknown(MipsRegToLoad))
|
|
{
|
|
MoveVariableToX86reg(&_GPR[MipsRegToLoad].UW[0],CRegName::GPR_Lo[MipsRegToLoad],Reg);
|
|
} else if (IsMapped(MipsRegToLoad)) {
|
|
if (MipsReg != MipsRegToLoad)
|
|
{
|
|
MoveX86RegToX86Reg(MipsRegMapLo(MipsRegToLoad),Reg);
|
|
}
|
|
} else {
|
|
MoveConstToX86reg(MipsRegLo(MipsRegToLoad),Reg);
|
|
}
|
|
} else if (MipsRegToLoad == 0) {
|
|
XorX86RegToX86Reg(Reg,Reg);
|
|
}
|
|
SetX86Mapped(Reg,GPR_Mapped);
|
|
SetX86Protected(Reg,TRUE);
|
|
SetMipsRegMapLo(MipsReg,Reg);
|
|
SetMipsRegState(MipsReg,SignValue ? STATE_MAPPED_32_SIGN : STATE_MAPPED_32_ZERO);
|
|
}
|
|
|
|
void CRegInfo::Map_GPR_64bit ( int MipsReg, int MipsRegToLoad)
|
|
{
|
|
x86Reg x86Hi, x86lo;
|
|
int count;
|
|
|
|
if (MipsReg == 0) {
|
|
#ifndef EXTERNAL_RELEASE
|
|
_Notify->DisplayError("Map_GPR_32bit\n\nWhy are you trying to map reg 0");
|
|
#endif
|
|
return;
|
|
}
|
|
|
|
ProtectGPR(MipsReg);
|
|
if (IsUnknown(MipsReg) || IsConst(MipsReg)) {
|
|
x86Hi = FreeX86Reg();
|
|
if (x86Hi < 0) { _Notify->DisplayError("Map_GPR_64bit\n\nOut of registers"); return; }
|
|
SetX86Protected(x86Hi,TRUE);
|
|
|
|
x86lo = FreeX86Reg();
|
|
if (x86lo < 0) { _Notify->DisplayError("Map_GPR_64bit\n\nOut of registers"); return; }
|
|
SetX86Protected(x86lo,TRUE);
|
|
|
|
CPU_Message(" regcache: allocate %s to hi word of %s",x86_Name(x86Hi),CRegName::GPR[MipsReg]);
|
|
CPU_Message(" regcache: allocate %s to low word of %s",x86_Name(x86lo),CRegName::GPR[MipsReg]);
|
|
} else {
|
|
x86lo = MipsRegMapLo(MipsReg);
|
|
if (Is32Bit(MipsReg)) {
|
|
SetX86Protected(x86lo,TRUE);
|
|
x86Hi = FreeX86Reg();
|
|
if (x86Hi == x86_Unknown)
|
|
{
|
|
_Notify->BreakPoint(__FILE__,__LINE__);
|
|
return;
|
|
}
|
|
SetX86Protected(x86Hi,TRUE);
|
|
|
|
CPU_Message(" regcache: allocate %s to hi word of %s",x86_Name(x86Hi),CRegName::GPR[MipsReg]);
|
|
} else {
|
|
x86Hi = MipsRegMapHi(MipsReg);
|
|
}
|
|
}
|
|
|
|
for (count = 0; count < 10; count ++)
|
|
{
|
|
int MapOrder = GetX86MapOrder((x86Reg)count);
|
|
if (MapOrder > 0)
|
|
{
|
|
SetX86MapOrder((x86Reg)count,MapOrder + 1);
|
|
}
|
|
}
|
|
|
|
SetX86MapOrder(x86Hi,1);
|
|
SetX86MapOrder(x86lo,1);
|
|
if (MipsRegToLoad > 0) {
|
|
if (IsUnknown(MipsRegToLoad)) {
|
|
MoveVariableToX86reg(&_GPR[MipsRegToLoad].UW[1],CRegName::GPR_Hi[MipsRegToLoad],x86Hi);
|
|
MoveVariableToX86reg(&_GPR[MipsRegToLoad].UW[0],CRegName::GPR_Lo[MipsRegToLoad],x86lo);
|
|
} else if (IsMapped(MipsRegToLoad)) {
|
|
if (Is32Bit(MipsRegToLoad)) {
|
|
if (IsSigned(MipsRegToLoad)) {
|
|
MoveX86RegToX86Reg(MipsRegMapLo(MipsRegToLoad),x86Hi);
|
|
ShiftRightSignImmed(x86Hi,31);
|
|
} else {
|
|
XorX86RegToX86Reg(x86Hi,x86Hi);
|
|
}
|
|
if (MipsReg != MipsRegToLoad) {
|
|
MoveX86RegToX86Reg(MipsRegMapLo(MipsRegToLoad),x86lo);
|
|
}
|
|
} else {
|
|
if (MipsReg != MipsRegToLoad) {
|
|
MoveX86RegToX86Reg(MipsRegMapHi(MipsRegToLoad),x86Hi);
|
|
MoveX86RegToX86Reg(MipsRegMapLo(MipsRegToLoad),x86lo);
|
|
}
|
|
}
|
|
} else {
|
|
CPU_Message("Map_GPR_64bit 11");
|
|
if (Is32Bit(MipsRegToLoad)) {
|
|
if (IsSigned(MipsRegToLoad)) {
|
|
MoveConstToX86reg(MipsRegLo_S(MipsRegToLoad) >> 31,x86Hi);
|
|
} else {
|
|
MoveConstToX86reg(0,x86Hi);
|
|
}
|
|
} else {
|
|
MoveConstToX86reg(MipsRegHi(MipsRegToLoad),x86Hi);
|
|
}
|
|
MoveConstToX86reg(MipsRegLo(MipsRegToLoad),x86lo);
|
|
}
|
|
} else if (MipsRegToLoad == 0) {
|
|
XorX86RegToX86Reg(x86Hi,x86Hi);
|
|
XorX86RegToX86Reg(x86lo,x86lo);
|
|
}
|
|
SetX86Mapped(x86Hi,GPR_Mapped);
|
|
SetX86Mapped(x86lo,GPR_Mapped);
|
|
SetMipsRegMapHi(MipsReg,x86Hi);
|
|
SetMipsRegMapLo(MipsReg,x86lo);
|
|
SetMipsRegState(MipsReg,STATE_MAPPED_64);
|
|
}
|
|
|
|
CX86Ops::x86Reg CRegInfo::Map_TempReg (CX86Ops::x86Reg Reg, int MipsReg, BOOL LoadHiWord)
|
|
{
|
|
int count;
|
|
|
|
if (Reg == x86_Any)
|
|
{
|
|
if (GetX86Mapped(x86_EAX) == Temp_Mapped && !GetX86Protected(x86_EAX)) { Reg = x86_EAX; }
|
|
else if (GetX86Mapped(x86_EBX) == Temp_Mapped && !GetX86Protected(x86_EBX)) { Reg = x86_EBX; }
|
|
else if (GetX86Mapped(x86_ECX) == Temp_Mapped && !GetX86Protected(x86_ECX)) { Reg = x86_ECX; }
|
|
else if (GetX86Mapped(x86_EDX) == Temp_Mapped && !GetX86Protected(x86_EDX)) { Reg = x86_EDX; }
|
|
else if (GetX86Mapped(x86_ESI) == Temp_Mapped && !GetX86Protected(x86_ESI)) { Reg = x86_ESI; }
|
|
else if (GetX86Mapped(x86_EDI) == Temp_Mapped && !GetX86Protected(x86_EDI)) { Reg = x86_EDI; }
|
|
else if (GetX86Mapped(x86_EBP) == Temp_Mapped && !GetX86Protected(x86_EBP)) { Reg = x86_EBP; }
|
|
else if (GetX86Mapped(x86_ESP) == Temp_Mapped && !GetX86Protected(x86_ESP)) { Reg = x86_ESP; }
|
|
|
|
if (Reg == x86_Any) {
|
|
Reg = FreeX86Reg();
|
|
if (Reg == x86_Unknown)
|
|
{
|
|
WriteTrace(TraceError,"CRegInfo::Map_TempReg: Failed to find a free register");
|
|
_Notify->BreakPoint(__FILE__,__LINE__);
|
|
return x86_Unknown;
|
|
}
|
|
}
|
|
}
|
|
else if (Reg == x86_Any8Bit)
|
|
{
|
|
if (GetX86Mapped(x86_EAX) == Temp_Mapped && !GetX86Protected(x86_EAX)) { Reg = x86_EAX; }
|
|
else if (GetX86Mapped(x86_EBX) == Temp_Mapped && !GetX86Protected(x86_EBX)) { Reg = x86_EBX; }
|
|
else if (GetX86Mapped(x86_ECX) == Temp_Mapped && !GetX86Protected(x86_ECX)) { Reg = x86_ECX; }
|
|
else if (GetX86Mapped(x86_EDX) == Temp_Mapped && !GetX86Protected(x86_EDX)) { Reg = x86_EDX; }
|
|
|
|
if (Reg == x86_Any8Bit)
|
|
{
|
|
Reg = Free8BitX86Reg();
|
|
if (Reg < 0) {
|
|
WriteTrace(TraceError,"CRegInfo::Map_TempReg: Failed to find a free 8 bit register");
|
|
_Notify->BreakPoint(__FILE__,__LINE__);
|
|
return x86_Unknown;
|
|
}
|
|
}
|
|
} else if (GetX86Mapped(Reg) == GPR_Mapped) {
|
|
if (GetX86Protected(Reg))
|
|
{
|
|
WriteTrace(TraceError,"CRegInfo::Map_TempReg: Register is protected");
|
|
_Notify->BreakPoint(__FILE__,__LINE__);
|
|
return x86_Unknown;
|
|
}
|
|
|
|
SetX86Protected(Reg,true);
|
|
x86Reg NewReg = FreeX86Reg();
|
|
for (count = 1; count < 32; count ++)
|
|
{
|
|
if (!IsMapped(count))
|
|
{
|
|
continue;
|
|
}
|
|
if (MipsRegMapLo(count) == Reg)
|
|
{
|
|
if (NewReg == x86_Unknown)
|
|
{
|
|
UnMap_GPR(count,TRUE);
|
|
break;
|
|
}
|
|
CPU_Message(" regcache: change allocation of %s from %s to %s",CRegName::GPR[count],x86_Name(Reg),x86_Name(NewReg));
|
|
SetX86Mapped(NewReg,GPR_Mapped);
|
|
SetX86MapOrder(NewReg,GetX86MapOrder(Reg));
|
|
SetMipsRegMapLo(count,NewReg);
|
|
MoveX86RegToX86Reg(Reg,NewReg);
|
|
if (MipsReg == count && LoadHiWord == FALSE) { MipsReg = -1; }
|
|
break;
|
|
}
|
|
if (Is64Bit(count) && MipsRegMapHi(count) == Reg)
|
|
{
|
|
if (NewReg == x86_Unknown)
|
|
{
|
|
UnMap_GPR(count,TRUE);
|
|
break;
|
|
}
|
|
CPU_Message(" regcache: change allocation of %s from %s to %s",CRegName::GPR_Hi[count],x86_Name(Reg),x86_Name(NewReg));
|
|
SetX86Mapped(NewReg,GPR_Mapped);
|
|
SetX86MapOrder(NewReg,GetX86MapOrder(Reg));
|
|
SetMipsRegMapHi(count,NewReg);
|
|
MoveX86RegToX86Reg(Reg,NewReg);
|
|
if (MipsReg == count && LoadHiWord == TRUE) { MipsReg = -1; }
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
else if (GetX86Mapped(Reg) == Stack_Mapped)
|
|
{
|
|
UnMap_X86reg(Reg);
|
|
}
|
|
CPU_Message(" regcache: allocate %s as temp storage",x86_Name(Reg));
|
|
|
|
if (MipsReg >= 0) {
|
|
if (LoadHiWord) {
|
|
if (IsUnknown(MipsReg))
|
|
{
|
|
MoveVariableToX86reg(&_GPR[MipsReg].UW[1],CRegName::GPR_Hi[MipsReg],Reg);
|
|
}
|
|
else if (IsMapped(MipsReg))
|
|
{
|
|
if (Is64Bit(MipsReg)) {
|
|
MoveX86RegToX86Reg(MipsRegMapHi(MipsReg),Reg);
|
|
} else if (IsSigned(MipsReg)){
|
|
MoveX86RegToX86Reg(MipsRegMapLo(MipsReg),Reg);
|
|
ShiftRightSignImmed(Reg,31);
|
|
} else {
|
|
MoveConstToX86reg(0,Reg);
|
|
}
|
|
} else {
|
|
if (Is64Bit(MipsReg))
|
|
{
|
|
MoveConstToX86reg(MipsRegHi(MipsReg),Reg);
|
|
} else {
|
|
MoveConstToX86reg(MipsRegLo_S(MipsReg) >> 31,Reg);
|
|
}
|
|
}
|
|
} else {
|
|
if (IsUnknown(MipsReg)) {
|
|
MoveVariableToX86reg(&_GPR[MipsReg].UW[0],CRegName::GPR_Lo[MipsReg],Reg);
|
|
} else if (IsMapped(MipsReg)) {
|
|
MoveX86RegToX86Reg(MipsRegMapLo(MipsReg),Reg);
|
|
} else {
|
|
MoveConstToX86reg(MipsRegLo(MipsReg),Reg);
|
|
}
|
|
}
|
|
}
|
|
SetX86Mapped(Reg,Temp_Mapped);
|
|
SetX86Protected(Reg,TRUE);
|
|
for (count = 0; count < 10; count ++)
|
|
{
|
|
int MapOrder = GetX86MapOrder((x86Reg)count);
|
|
if (MapOrder > 0) {
|
|
SetX86MapOrder((x86Reg)count,MapOrder + 1);
|
|
}
|
|
}
|
|
SetX86MapOrder(Reg,1);
|
|
return Reg;
|
|
}
|
|
|
|
void CRegInfo::ProtectGPR(DWORD Reg) {
|
|
if (IsUnknown(Reg) || IsConst(Reg)) { return; }
|
|
if (Is64Bit(Reg)) {
|
|
SetX86Protected(MipsRegMapHi(Reg),TRUE);
|
|
}
|
|
SetX86Protected(MipsRegMapLo(Reg),TRUE);
|
|
}
|
|
|
|
void CRegInfo::UnProtectGPR(DWORD Reg) {
|
|
if (IsUnknown(Reg) || IsConst(Reg)) { return; }
|
|
if (Is64Bit(Reg)) {
|
|
SetX86Protected(MipsRegMapHi(Reg),false);
|
|
}
|
|
SetX86Protected(MipsRegMapLo(Reg),false);
|
|
}
|
|
|
|
void CRegInfo::ResetX86Protection (void)
|
|
{
|
|
for (int count = 0; count < 10; count ++)
|
|
{
|
|
SetX86Protected((x86Reg)count, false);
|
|
}
|
|
}
|
|
|
|
BOOL CRegInfo::RegInStack( int Reg, FPU_STATE Format) {
|
|
int i;
|
|
|
|
for (i = 0; i < 8; i++)
|
|
{
|
|
if (x86fpu_MappedTo[i] == Reg)
|
|
{
|
|
if (x86fpu_State[i] == Format || Format == FPU_Any)
|
|
{
|
|
return TRUE;
|
|
}
|
|
return FALSE;
|
|
}
|
|
}
|
|
return FALSE;
|
|
}
|
|
|
|
void CRegInfo::UnMap_AllFPRs ( void )
|
|
{
|
|
for (;;) {
|
|
int StackPos = StackTopPos();
|
|
if (x86fpu_MappedTo[StackPos] != -1 ) {
|
|
UnMap_FPR(x86fpu_MappedTo[StackPos],TRUE);
|
|
continue;
|
|
}
|
|
//see if any more registers mapped
|
|
int StartPos = StackTopPos();
|
|
for (int i = 0; i < 8; i++) {
|
|
if (x86fpu_MappedTo[(StartPos + i) & 7] != -1 ) { fpuIncStack(&StackTopPos()); }
|
|
}
|
|
if (StackPos != StackTopPos()) { continue; }
|
|
return;
|
|
}
|
|
}
|
|
|
|
void CRegInfo::UnMap_FPR (int Reg, int WriteBackValue )
|
|
{
|
|
char Name[50];
|
|
int i;
|
|
|
|
if (Reg < 0) { return; }
|
|
for (i = 0; i < 8; i++) {
|
|
if (x86fpu_MappedTo[i] != Reg) { continue; }
|
|
CPU_Message(" regcache: unallocate %s from ST(%d)",CRegName::FPR[Reg],(i - StackTopPos() + 8) & 7);
|
|
if (WriteBackValue) {
|
|
int RegPos;
|
|
|
|
if (((i - StackTopPos() + 8) & 7) != 0)
|
|
{
|
|
if (x86fpu_MappedTo[StackTopPos()] == -1 && x86fpu_MappedTo[(StackTopPos() + 1) & 7] == Reg)
|
|
{
|
|
fpuIncStack(&StackTopPos());
|
|
} else {
|
|
CRegInfo::FPU_ROUND RoundingModel = FpuRoundingModel(StackTopPos());
|
|
FPU_STATE RegState = x86fpu_State[StackTopPos()];
|
|
BOOL Changed = x86fpu_StateChanged[StackTopPos()];
|
|
DWORD MappedTo = x86fpu_MappedTo[StackTopPos()];
|
|
FpuRoundingModel(StackTopPos()) = FpuRoundingModel(i);
|
|
x86fpu_MappedTo[StackTopPos()] = x86fpu_MappedTo[i];
|
|
x86fpu_State[StackTopPos()] = x86fpu_State[i];
|
|
x86fpu_StateChanged[StackTopPos()] = x86fpu_StateChanged[i];
|
|
FpuRoundingModel(i) = RoundingModel;
|
|
x86fpu_MappedTo[i] = MappedTo;
|
|
x86fpu_State[i] = RegState;
|
|
x86fpu_StateChanged[i] = Changed;
|
|
fpuExchange((x86FpuValues)((i - StackTopPos()) & 7));
|
|
}
|
|
}
|
|
|
|
FixRoundModel(FpuRoundingModel(i));
|
|
|
|
RegPos = StackTopPos();
|
|
x86Reg TempReg = Map_TempReg(x86_Any,-1,FALSE);
|
|
switch (x86fpu_State[StackTopPos()]) {
|
|
case FPU_Dword:
|
|
sprintf(Name,"_FPR_S[%d]",x86fpu_MappedTo[StackTopPos()]);
|
|
MoveVariableToX86reg(&_FPR_S[x86fpu_MappedTo[StackTopPos()]],Name,TempReg);
|
|
fpuStoreIntegerDwordFromX86Reg(&StackTopPos(),TempReg, TRUE);
|
|
break;
|
|
case FPU_Qword:
|
|
sprintf(Name,"_FPR_D[%d]",x86fpu_MappedTo[StackTopPos()]);
|
|
MoveVariableToX86reg(&_FPR_D[x86fpu_MappedTo[StackTopPos()]],Name,TempReg);
|
|
fpuStoreIntegerQwordFromX86Reg(&StackTopPos(),TempReg, TRUE);
|
|
break;
|
|
case FPU_Float:
|
|
sprintf(Name,"_FPR_S[%d]",x86fpu_MappedTo[StackTopPos()]);
|
|
MoveVariableToX86reg(&_FPR_S[x86fpu_MappedTo[StackTopPos()]],Name,TempReg);
|
|
fpuStoreDwordFromX86Reg(&StackTopPos(),TempReg, TRUE);
|
|
break;
|
|
case FPU_Double:
|
|
sprintf(Name,"_FPR_D[%d]",x86fpu_MappedTo[StackTopPos()]);
|
|
MoveVariableToX86reg(&_FPR_D[x86fpu_MappedTo[StackTopPos()]],Name,TempReg);
|
|
fpuStoreQwordFromX86Reg(&StackTopPos(),TempReg, TRUE);
|
|
break;
|
|
#ifndef EXTERNAL_RELEASE
|
|
default:
|
|
_Notify->DisplayError("UnMap_FPR\nUnknown format to load %d",x86fpu_State[StackTopPos()]);
|
|
#endif
|
|
}
|
|
SetX86Protected(TempReg,FALSE);
|
|
FpuRoundingModel(RegPos) = RoundDefault;
|
|
x86fpu_MappedTo[RegPos] = -1;
|
|
x86fpu_State[RegPos] = FPU_Unknown;
|
|
x86fpu_StateChanged[RegPos] = false;
|
|
} else {
|
|
fpuFree((x86FpuValues)((i - StackTopPos()) & 7));
|
|
FpuRoundingModel(i) = RoundDefault;
|
|
x86fpu_MappedTo[i] = -1;
|
|
x86fpu_State[i] = FPU_Unknown;
|
|
x86fpu_StateChanged[i] = false;
|
|
}
|
|
return;
|
|
}
|
|
}
|
|
|
|
void CRegInfo::UnMap_GPR (DWORD Reg, bool WriteBackValue)
|
|
{
|
|
if (Reg == 0) {
|
|
#ifndef EXTERNAL_RELEASE
|
|
_Notify->DisplayError("UnMap_GPR\n\nWhy are you trying to unmap reg 0");
|
|
#endif
|
|
return;
|
|
}
|
|
|
|
if (IsUnknown(Reg)) { return; }
|
|
//CPU_Message("UnMap_GPR: State: %X\tReg: %s\tWriteBack: %s",State,CRegName::GPR[Reg],WriteBackValue?"TRUE":"FALSE");
|
|
if (IsConst(Reg)) {
|
|
if (!WriteBackValue) {
|
|
SetMipsRegState(Reg,STATE_UNKNOWN);
|
|
return;
|
|
}
|
|
if (Is64Bit(Reg)) {
|
|
MoveConstToVariable(MipsRegHi(Reg),&_GPR[Reg].UW[1],CRegName::GPR_Hi[Reg]);
|
|
MoveConstToVariable(MipsRegLo(Reg),&_GPR[Reg].UW[0],CRegName::GPR_Lo[Reg]);
|
|
SetMipsRegState(Reg,STATE_UNKNOWN);
|
|
return;
|
|
}
|
|
if ((MipsRegLo(Reg) & 0x80000000) != 0) {
|
|
MoveConstToVariable(0xFFFFFFFF,&_GPR[Reg].UW[1],CRegName::GPR_Hi[Reg]);
|
|
} else {
|
|
MoveConstToVariable(0,&_GPR[Reg].UW[1],CRegName::GPR_Hi[Reg]);
|
|
}
|
|
MoveConstToVariable(MipsRegLo(Reg),&_GPR[Reg].UW[0],CRegName::GPR_Lo[Reg]);
|
|
SetMipsRegState(Reg,STATE_UNKNOWN);
|
|
return;
|
|
}
|
|
if (Is64Bit(Reg)) {
|
|
CPU_Message(" regcache: unallocate %s from %s",x86_Name(MipsRegMapHi(Reg)),CRegName::GPR_Hi[Reg]);
|
|
SetX86Mapped(MipsRegMapHi(Reg),NotMapped);
|
|
SetX86Protected(MipsRegMapHi(Reg),FALSE);
|
|
}
|
|
CPU_Message(" regcache: unallocate %s from %s",x86_Name(MipsRegMapLo(Reg)),CRegName::GPR_Lo[Reg]);
|
|
SetX86Mapped(MipsRegMapLo(Reg),NotMapped);
|
|
SetX86Protected(MipsRegMapLo(Reg),FALSE);
|
|
if (!WriteBackValue)
|
|
{
|
|
SetMipsRegState(Reg,STATE_UNKNOWN);
|
|
return;
|
|
}
|
|
MoveX86regToVariable(MipsRegMapLo(Reg),&_GPR[Reg].UW[0],CRegName::GPR_Lo[Reg]);
|
|
if (Is64Bit(Reg)) {
|
|
SetMipsRegMapLo(Reg, x86_Unknown);
|
|
MoveX86regToVariable(MipsRegMapHi(Reg),&_GPR[Reg].UW[1],CRegName::GPR_Hi[Reg]);
|
|
SetMipsRegMapHi(Reg,x86_Unknown);
|
|
} else {
|
|
if (!b32BitCore()) {
|
|
if (IsSigned(Reg)) {
|
|
ShiftRightSignImmed(MipsRegMapLo(Reg),31);
|
|
MoveX86regToVariable(MipsRegMapLo(Reg),&_GPR[Reg].UW[1],CRegName::GPR_Hi[Reg]);
|
|
} else {
|
|
MoveConstToVariable(0,&_GPR[Reg].UW[1],CRegName::GPR_Hi[Reg]);
|
|
}
|
|
}
|
|
SetMipsRegMapLo(Reg, x86_Unknown);
|
|
}
|
|
SetMipsRegState(Reg,STATE_UNKNOWN);
|
|
}
|
|
|
|
CX86Ops::x86Reg CRegInfo::UnMap_TempReg ( void )
|
|
{
|
|
CX86Ops::x86Reg Reg = x86_Unknown;
|
|
|
|
if (GetX86Mapped(x86_EAX) == Temp_Mapped && !GetX86Protected(x86_EAX)) { Reg = x86_EAX; }
|
|
else if (GetX86Mapped(x86_EBX) == Temp_Mapped && !GetX86Protected(x86_EBX)) { Reg = x86_EBX; }
|
|
else if (GetX86Mapped(x86_ECX) == Temp_Mapped && !GetX86Protected(x86_ECX)) { Reg = x86_ECX; }
|
|
else if (GetX86Mapped(x86_EDX) == Temp_Mapped && !GetX86Protected(x86_EDX)) { Reg = x86_EDX; }
|
|
else if (GetX86Mapped(x86_ESI) == Temp_Mapped && !GetX86Protected(x86_ESI)) { Reg = x86_ESI; }
|
|
else if (GetX86Mapped(x86_EDI) == Temp_Mapped && !GetX86Protected(x86_EDI)) { Reg = x86_EDI; }
|
|
else if (GetX86Mapped(x86_EBP) == Temp_Mapped && !GetX86Protected(x86_EBP)) { Reg = x86_EBP; }
|
|
else if (GetX86Mapped(x86_ESP) == Temp_Mapped && !GetX86Protected(x86_ESP)) { Reg = x86_ESP; }
|
|
|
|
if (Reg != x86_Unknown)
|
|
{
|
|
if (GetX86Mapped(Reg) == Temp_Mapped)
|
|
{
|
|
CPU_Message(" regcache: unallocate %s from temp storage",x86_Name(Reg));
|
|
}
|
|
SetX86Mapped(Reg,NotMapped);
|
|
}
|
|
return Reg;
|
|
}
|
|
|
|
bool CRegInfo::UnMap_X86reg ( CX86Ops::x86Reg Reg )
|
|
{
|
|
int count;
|
|
|
|
if (GetX86Mapped(Reg) == NotMapped)
|
|
{
|
|
if (!GetX86Protected(Reg))
|
|
{
|
|
return TRUE;
|
|
}
|
|
} else if (GetX86Mapped(Reg) == CRegInfo::GPR_Mapped) {
|
|
for (count = 1; count < 32; count ++)
|
|
{
|
|
if (!IsMapped(count))
|
|
{
|
|
continue;
|
|
}
|
|
if (Is64Bit(count) && MipsRegMapHi(count) == Reg)
|
|
{
|
|
if (GetX86Protected(Reg) == FALSE)
|
|
{
|
|
UnMap_GPR(count,TRUE);
|
|
return TRUE;
|
|
}
|
|
break;
|
|
}
|
|
if (MipsRegMapLo(count) == Reg)
|
|
{
|
|
if (GetX86Protected(Reg) == FALSE)
|
|
{
|
|
UnMap_GPR(count,TRUE);
|
|
return TRUE;
|
|
}
|
|
break;
|
|
}
|
|
}
|
|
} else if (GetX86Mapped(Reg) == CRegInfo::Temp_Mapped) {
|
|
if (GetX86Protected(Reg) == FALSE) {
|
|
CPU_Message(" regcache: unallocate %s from temp storage",x86_Name(Reg));
|
|
SetX86Mapped(Reg,NotMapped);
|
|
return TRUE;
|
|
}
|
|
} else if (GetX86Mapped(Reg) == CRegInfo::Stack_Mapped) {
|
|
CPU_Message(" regcache: unallocate %s from Memory Stack",x86_Name(Reg));
|
|
MoveX86regToVariable(Reg,&(_Recompiler->MemoryStackPos()),"MemoryStack");
|
|
SetX86Mapped(Reg,NotMapped);
|
|
return TRUE;
|
|
}
|
|
return FALSE;
|
|
}
|
|
|
|
void CRegInfo::WriteBackRegisters ()
|
|
{
|
|
UnMap_AllFPRs();
|
|
|
|
int count;
|
|
BOOL bEdiZero = FALSE;
|
|
BOOL bEsiSign = FALSE;
|
|
|
|
int X86RegCount = sizeof(x86_Registers)/ sizeof(x86_Registers[0]);
|
|
for (int i = 0; i < X86RegCount; i++) { SetX86Protected(x86_Registers[i],FALSE); }
|
|
for (int i = 0; i < X86RegCount; i++) { UnMap_X86reg(x86_Registers[i]); }
|
|
|
|
/*************************************/
|
|
|
|
for (count = 1; count < 32; count ++) {
|
|
switch (MipsRegState(count)) {
|
|
case CRegInfo::STATE_UNKNOWN: break;
|
|
case CRegInfo::STATE_CONST_32:
|
|
if (!b32BitCore())
|
|
{
|
|
if (!bEdiZero && (!MipsRegLo(count) || !(MipsRegLo(count) & 0x80000000))) {
|
|
XorX86RegToX86Reg(x86_EDI, x86_EDI);
|
|
bEdiZero = TRUE;
|
|
}
|
|
if (!bEsiSign && (MipsRegLo(count) & 0x80000000)) {
|
|
MoveConstToX86reg(0xFFFFFFFF, x86_ESI);
|
|
bEsiSign = TRUE;
|
|
}
|
|
if ((MipsRegLo(count) & 0x80000000) != 0) {
|
|
MoveX86regToVariable(x86_ESI,&_GPR[count].UW[1],CRegName::GPR_Hi[count]);
|
|
} else {
|
|
MoveX86regToVariable(x86_EDI,&_GPR[count].UW[1],CRegName::GPR_Hi[count]);
|
|
}
|
|
}
|
|
|
|
if (MipsRegLo(count) == 0) {
|
|
if (b32BitCore())
|
|
{
|
|
if (!bEdiZero)
|
|
{
|
|
XorX86RegToX86Reg(x86_EDI, x86_EDI);
|
|
bEdiZero = TRUE;
|
|
}
|
|
}
|
|
MoveX86regToVariable(x86_EDI,&_GPR[count].UW[0],CRegName::GPR_Lo[count]);
|
|
} else if (MipsRegLo(count) == 0xFFFFFFFF) {
|
|
if (b32BitCore())
|
|
{
|
|
if (!bEsiSign)
|
|
{
|
|
MoveConstToX86reg(0xFFFFFFFF, x86_ESI);
|
|
bEsiSign = TRUE;
|
|
}
|
|
}
|
|
MoveX86regToVariable(x86_ESI,&_GPR[count].UW[0],CRegName::GPR_Lo[count]);
|
|
} else
|
|
MoveConstToVariable(MipsRegLo(count),&_GPR[count].UW[0],CRegName::GPR_Lo[count]);
|
|
|
|
SetMipsRegState(count, CRegInfo::STATE_UNKNOWN);
|
|
break;
|
|
case CRegInfo::STATE_CONST_64:
|
|
if (MipsRegLo(count) == 0 || MipsRegHi(count) == 0) {
|
|
XorX86RegToX86Reg(x86_EDI, x86_EDI);
|
|
bEdiZero = TRUE;
|
|
}
|
|
if (MipsRegLo(count) == 0xFFFFFFFF || MipsRegHi(count) == 0xFFFFFFFF) {
|
|
MoveConstToX86reg(0xFFFFFFFF, x86_ESI);
|
|
bEsiSign = TRUE;
|
|
}
|
|
|
|
if (MipsRegHi(count) == 0) {
|
|
MoveX86regToVariable(x86_EDI,&_GPR[count].UW[1],CRegName::GPR_Hi[count]);
|
|
} else if (MipsRegLo(count) == 0xFFFFFFFF) {
|
|
MoveX86regToVariable(x86_ESI,&_GPR[count].UW[1],CRegName::GPR_Hi[count]);
|
|
} else {
|
|
MoveConstToVariable(MipsRegHi(count),&_GPR[count].UW[1],CRegName::GPR_Hi[count]);
|
|
}
|
|
|
|
if (MipsRegLo(count) == 0) {
|
|
MoveX86regToVariable(x86_EDI,&_GPR[count].UW[0],CRegName::GPR_Lo[count]);
|
|
} else if (MipsRegLo(count) == 0xFFFFFFFF) {
|
|
MoveX86regToVariable(x86_ESI,&_GPR[count].UW[0],CRegName::GPR_Lo[count]);
|
|
} else {
|
|
MoveConstToVariable(MipsRegLo(count),&_GPR[count].UW[0],CRegName::GPR_Lo[count]);
|
|
}
|
|
SetMipsRegState(count, CRegInfo::STATE_UNKNOWN);
|
|
break;
|
|
default:
|
|
CPU_Message(__FUNCTION__ ": Unknown State: %d reg %d (%s)",MipsRegState(count),count,CRegName::GPR[count])
|
|
_Notify->BreakPoint(__FILE__,__LINE__);
|
|
}
|
|
}
|
|
}
|
|
|
|
const char * CRegInfo::RoundingModelName ( FPU_ROUND RoundType )
|
|
{
|
|
switch (RoundType)
|
|
{
|
|
case RoundUnknown: return "RoundUnknown";
|
|
case RoundDefault: return "RoundDefault";
|
|
case RoundTruncate: return "RoundTruncate";
|
|
case RoundNearest: return "RoundNearest";
|
|
case RoundDown: return "RoundDown";
|
|
case RoundUp: return "RoundUp";
|
|
}
|
|
return "** Invalid **";
|
|
}
|