110 lines
3.6 KiB
C++
110 lines
3.6 KiB
C++
#include "stdafx.h"
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#include "SerialInterfaceHandler.h"
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#include <Project64-core\N64System\Mips\MemoryVirtualMem.h>
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#include <Project64-core\N64System\Mips\Register.h>
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#include <Project64-core\N64System\SystemGlobals.h>
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SerialInterfaceReg::SerialInterfaceReg(uint32_t * Interface) :
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SI_DRAM_ADDR_REG(Interface[0]),
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SI_PIF_ADDR_RD64B_REG(Interface[1]),
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SI_PIF_ADDR_WR64B_REG(Interface[2]),
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SI_STATUS_REG(Interface[3])
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{
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}
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SerialInterfaceHandler::SerialInterfaceHandler(CMipsMemoryVM & MMU, CRegisters & Reg) :
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SerialInterfaceReg(Reg.m_SerialInterface),
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MIPSInterfaceReg(Reg.m_Mips_Interface),
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m_MMU(MMU),
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m_Reg(Reg),
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m_PC(Reg.m_PROGRAM_COUNTER)
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{
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}
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bool SerialInterfaceHandler::Read32(uint32_t Address, uint32_t & Value)
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{
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switch (Address & 0x1FFFFFFF)
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{
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case 0x04800018: Value = SI_STATUS_REG; break;
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default:
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Value = 0;
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if (HaveDebugger())
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}
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if (LogSerialInterface())
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{
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switch (Address & 0x1FFFFFFF)
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{
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case 0x04800000: LogMessage("%08X: read from SI_DRAM_ADDR_REG (%08X)", m_PC, Value); break;
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case 0x04800004: LogMessage("%08X: read from SI_PIF_ADDR_RD64B_REG (%08X)", m_PC, Value); break;
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case 0xA4800010: LogMessage("%08X: read from SI_PIF_ADDR_WR64B_REG (%08X)", m_PC, Value); break;
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case 0x04800018: LogMessage("%08X: read from SI_STATUS_REG (%08X)", m_PC, Value); break;
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default:
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if (HaveDebugger())
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}
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}
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return true;
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}
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bool SerialInterfaceHandler::Write32(uint32_t Address, uint32_t Value, uint32_t Mask)
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{
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if (GenerateLog())
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{
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if (LogSerialInterface())
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{
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switch (Address & 0x1FFFFFFF)
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{
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case 0x04800000: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SI_DRAM_ADDR_REG", m_PC, Value, Mask); break;
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case 0x04800004: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SI_PIF_ADDR_RD64B_REG", m_PC, Value, Mask); break;
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case 0x04800010: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SI_PIF_ADDR_WR64B_REG", m_PC, Value, Mask); break;
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case 0x04800018: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SI_STATUS_REG", m_PC, Value, Mask); break;
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default:
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if (HaveDebugger())
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}
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}
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if (LogPRDMAOperations())
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{
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switch (Address & 0x1FFFFFFF)
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{
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case 0x04800004: LogMessage("%08X: A DMA transfer from the PIF RAM has occurred", m_PC); break;
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case 0x04800010: LogMessage("%08X: A DMA transfer to the PIF RAM has occurred", m_PC); break;
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}
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}
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}
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uint32_t MaskedValue = Value & Mask;
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switch (Address & 0x1FFFFFFF)
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{
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case 0x04800000: SI_DRAM_ADDR_REG = (SI_DRAM_ADDR_REG & ~Mask) | (MaskedValue); break;
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case 0x04800004:
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SI_PIF_ADDR_RD64B_REG = (SI_PIF_ADDR_RD64B_REG & ~Mask) | (MaskedValue);
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m_MMU.SI_DMA_READ();
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break;
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case 0x04800010:
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SI_PIF_ADDR_WR64B_REG = (SI_PIF_ADDR_WR64B_REG & ~Mask) | (MaskedValue);
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m_MMU.SI_DMA_WRITE();
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break;
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case 0x04800018:
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MI_INTR_REG &= ~MI_INTR_SI;
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m_Reg.SI_STATUS_REG &= ~SI_STATUS_INTERRUPT;
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m_Reg.CheckInterrupts();
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break;
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default:
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if (HaveDebugger())
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}
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return true;
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}
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