325 lines
6.5 KiB
C
325 lines
6.5 KiB
C
/****************************************************************************
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* *
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* Project64 - A Nintendo 64 emulator. *
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* http://www.pj64-emu.com/ *
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* Copyright (C) 2012 Project64. All rights reserved. *
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* *
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* License: *
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* GNU/GPLv2 http://www.gnu.org/licenses/gpl-2.0.html *
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* *
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****************************************************************************/
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#pragma once
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#if defined(__arm__) || defined(_M_ARM)
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#pragma warning(push)
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#pragma warning(disable : 4201) // warning C4201: nonstandard extension used : nameless struct/union
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union ArmThumbOpcode
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{
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uint16_t Hex;
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uint8_t Ascii[2];
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struct
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{
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unsigned reserved : 3;
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unsigned rm : 4;
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unsigned opcode : 9;
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} Branch;
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struct
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{
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unsigned imm : 11;
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unsigned opcode : 5;
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} BranchImm;
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struct
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{
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unsigned imm : 8;
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unsigned cond : 4;
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unsigned opcode : 4;
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} BranchImmCond;
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struct
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{
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unsigned rt : 3;
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unsigned rn : 3;
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unsigned rm : 3;
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unsigned opcode : 7;
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} Reg;
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struct
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{
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unsigned rd : 3;
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unsigned rn : 3;
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unsigned imm3 : 3;
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unsigned opcode : 7;
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} Imm3;
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struct
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{
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unsigned rt : 3;
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unsigned rn : 3;
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unsigned imm5 : 5;
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unsigned opcode : 5;
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} Imm5;
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struct
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{
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unsigned imm8 : 8;
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unsigned rdn : 3;
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unsigned opcode : 5;
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} Imm8;
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struct
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{
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unsigned rn : 3;
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unsigned rm : 3;
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unsigned opcode : 10;
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} Reg2;
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struct
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{
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unsigned register_list : 8;
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unsigned m : 1;
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unsigned opcode : 7;
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} Push;
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struct
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{
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unsigned register_list : 8;
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unsigned p : 1;
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unsigned opcode : 7;
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} Pop;
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};
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union Arm32Opcode
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{
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uint32_t Hex;
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uint8_t Ascii[4];
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// uint16 + uint16 type instuction
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struct
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{
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unsigned rn : 4;
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unsigned opcode : 12;
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unsigned rm : 4;
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unsigned imm2 : 2;
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unsigned reserved : 6;
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unsigned rt : 4;
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} uint16;
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struct
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{
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unsigned Rn : 4;
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unsigned s : 1;
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unsigned opcode : 5;
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unsigned i : 1;
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unsigned opcode2 : 5;
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unsigned imm8 : 8;
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unsigned rd : 4;
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unsigned imm3 : 3;
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unsigned reserved : 1;
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} RnRdImm12;
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struct
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{
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unsigned Rn : 4;
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unsigned op3 : 2;
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unsigned D : 1;
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unsigned U : 1;
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unsigned op2 : 8;
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unsigned imm8 : 8;
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unsigned op1 : 4;
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unsigned vd : 4;
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} RnVdImm8;
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struct
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{
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unsigned vn : 4;
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unsigned op1 : 2;
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unsigned d : 1;
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unsigned op2 : 9;
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unsigned vm : 4;
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unsigned op3 : 1;
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unsigned m : 1;
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unsigned op4 : 1;
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unsigned n : 1;
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unsigned sz : 1;
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unsigned op5 : 3;
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unsigned vd : 4;
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} VnVmVd;
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struct
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{
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unsigned rn : 4;
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unsigned opcode : 12;
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unsigned rm : 4;
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unsigned imm : 2;
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unsigned Opcode2 : 6;
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unsigned rt : 4;
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} imm2;
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struct
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{
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unsigned rn : 4;
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unsigned s : 1;
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unsigned opcode : 11;
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unsigned rm : 4;
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unsigned type : 2;
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unsigned imm2 : 2;
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unsigned rd : 4;
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unsigned imm3 : 3;
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unsigned opcode2 : 1;
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} imm5;
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struct
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{
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unsigned rn : 4;
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unsigned opcode : 12;
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unsigned imm : 12;
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unsigned rt : 4;
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} imm12;
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struct
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{
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unsigned rn : 4;
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unsigned s : 1;
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unsigned opcode : 5;
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unsigned i : 1;
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unsigned opcode2 : 5;
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unsigned imm8 : 8;
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unsigned rd : 4;
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unsigned imm3 : 3;
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unsigned opcode3 : 1;
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} imm8_3_1;
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struct
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{
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unsigned imm4 : 4;
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unsigned opcode2 : 6;
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unsigned i : 1;
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unsigned opcode : 5;
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unsigned imm8 : 8;
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unsigned rd : 4;
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unsigned imm3 : 3;
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unsigned reserved : 1;
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} imm16;
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struct
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{
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unsigned imm6 : 6;
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unsigned cond : 4;
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unsigned S : 1;
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unsigned Opcode : 5;
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unsigned imm11 : 11;
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unsigned J2 : 1;
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unsigned val12 : 1;
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unsigned J1 : 1;
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unsigned val14 : 2;
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} Branch20;
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struct
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{
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unsigned rm : 4;
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unsigned opcode2 : 8;
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unsigned rt : 4;
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unsigned rn : 4;
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unsigned opcode : 12;
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} uint32;
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struct
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{
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unsigned rm : 4;
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unsigned opcode3 : 8;
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unsigned rt : 4;
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unsigned rn : 4;
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unsigned opcode2 : 1;
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unsigned w : 1;
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unsigned opcode1 : 1;
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unsigned u : 1;
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unsigned p : 1;
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unsigned opcode : 3;
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unsigned cond : 4;
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} reg_cond;
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struct
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{
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unsigned rm : 4;
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unsigned opcode3 : 1;
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unsigned type : 2;
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unsigned imm5 : 5;
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unsigned rt : 4;
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unsigned rn : 4;
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unsigned opcode2 : 1;
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unsigned w : 1;
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unsigned opcode1 : 1;
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unsigned u : 1;
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unsigned p : 1;
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unsigned opcode : 3;
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unsigned cond : 4;
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} reg_cond_imm5;
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struct
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{
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unsigned imm12 : 12;
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unsigned rt : 4;
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unsigned rn : 4;
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unsigned opcode2 : 1;
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unsigned w : 1;
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unsigned opcode1 : 1;
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unsigned u : 1;
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unsigned p : 1;
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unsigned opcode : 3;
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unsigned cond : 4;
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} reg_cond_imm12;
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struct
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{
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unsigned opcode : 16;
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unsigned opcode2 : 12;
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unsigned rt : 4;
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} fpscr;
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struct
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{
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unsigned opcode : 16;
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unsigned rm : 4;
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unsigned rotate : 2;
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unsigned opcode2 : 2;
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unsigned rd : 4;
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unsigned opcode3 : 4;
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} rotate;
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struct
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{
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unsigned opcode : 16;
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unsigned register_list : 16;
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} PushPop;
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};
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#pragma warning(pop)
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enum ArmThumbOpCodes
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{
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ArmSTR_ThumbImm = 0xC,
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ArmSTR_Reg = 40,
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ArmLDR_ThumbImm = 0xD,
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ArmLDR_Reg = 44,
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ArmLDRH_Reg = 0xE19,
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ArmLDRH_W = 0xF83,
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ArmMOV_IMM16 = 0x1E,
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ArmMOVW_IMM16 = 0x24,
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ArmMOVT_IMM16 = 0x2C,
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ArmPUSH = 0x5A,
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ArmPOP = 0x5E,
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};
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#endif |