358 lines
11 KiB
C++
358 lines
11 KiB
C++
#include "X86.h"
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#include <Project64-rsp-core/RSPInfo.h>
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#include <Project64-rsp-core/cpu/RSPRegisters.h>
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#include <Project64-rsp-core/cpu/RspLog.h>
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#include <Project64-rsp-core/cpu/RspMemory.h>
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#define PUTDST8(dest, value) \
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(*((uint8_t *)(dest)) = (uint8_t)(value)); \
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dest += 1;
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#define PUTDST16(dest, value) \
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(*((uint16_t *)(dest)) = (uint16_t)(value)); \
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dest += 2;
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#define PUTDST32(dest, value) \
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(*((uint32_t *)(dest)) = (uint32_t)(value)); \
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dest += 4;
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#define PUTDSTPTR(dest, value) \
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*(void **)(dest) = (void *)(value); \
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dest += sizeof(void *);
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const char * sse_Strings[8] = {
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"xmm0",
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"xmm1",
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"xmm2",
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"xmm3",
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"xmm4",
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"xmm5",
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"xmm6",
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"xmm7",
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};
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#define sse_Name(Reg) (sse_Strings[(Reg)])
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void SseMoveAlignedVariableToReg(void * Variable, const char * VariableName, int sseReg)
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{
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uint8_t x86Command = 0;
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CPU_Message(" movaps %s, xmmword ptr [%s]", sse_Name(sseReg), VariableName);
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switch (sseReg)
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{
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case x86_XMM0: x86Command = 0x05; break;
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case x86_XMM1: x86Command = 0x0D; break;
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case x86_XMM2: x86Command = 0x15; break;
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case x86_XMM3: x86Command = 0x1D; break;
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case x86_XMM4: x86Command = 0x25; break;
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case x86_XMM5: x86Command = 0x2D; break;
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case x86_XMM6: x86Command = 0x35; break;
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case x86_XMM7: x86Command = 0x3D; break;
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}
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PUTDST16(RecompPos, 0x280f);
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PUTDST8(RecompPos, x86Command);
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PUTDSTPTR(RecompPos, Variable);
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}
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void SseMoveAlignedN64MemToReg(int sseReg, int AddrReg)
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{
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uint8_t x86Command = 0;
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CPU_Message(" movaps %s, xmmword ptr [Dmem+%s]", sse_Name(sseReg), x86_Name(AddrReg));
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switch (sseReg)
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{
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case x86_XMM0: x86Command = 0x80; break;
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case x86_XMM1: x86Command = 0x88; break;
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case x86_XMM2: x86Command = 0x90; break;
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case x86_XMM3: x86Command = 0x98; break;
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case x86_XMM4: x86Command = 0xA0; break;
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case x86_XMM5: x86Command = 0xA8; break;
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case x86_XMM6: x86Command = 0xB0; break;
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case x86_XMM7: x86Command = 0xB8; break;
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}
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switch (AddrReg)
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{
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case x86_EAX: x86Command += 0x00; break;
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case x86_EBX: x86Command += 0x03; break;
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case x86_ECX: x86Command += 0x01; break;
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case x86_EDX: x86Command += 0x02; break;
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case x86_ESI: x86Command += 0x06; break;
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case x86_EDI: x86Command += 0x07; break;
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case x86_ESP: x86Command += 0x04; break;
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case x86_EBP: x86Command += 0x05; break;
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}
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PUTDST16(RecompPos, 0x280f);
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PUTDST8(RecompPos, x86Command);
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PUTDSTPTR(RecompPos, RSPInfo.DMEM);
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}
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void SseMoveAlignedRegToVariable(int sseReg, void * Variable, const char * VariableName)
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{
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uint8_t x86Command = 0;
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CPU_Message(" movaps xmmword ptr [%s], %s", VariableName, sse_Name(sseReg));
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switch (sseReg)
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{
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case x86_XMM0: x86Command = 0x05; break;
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case x86_XMM1: x86Command = 0x0D; break;
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case x86_XMM2: x86Command = 0x15; break;
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case x86_XMM3: x86Command = 0x1D; break;
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case x86_XMM4: x86Command = 0x25; break;
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case x86_XMM5: x86Command = 0x2D; break;
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case x86_XMM6: x86Command = 0x35; break;
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case x86_XMM7: x86Command = 0x3D; break;
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}
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PUTDST16(RecompPos, 0x290f);
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PUTDST8(RecompPos, x86Command);
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PUTDSTPTR(RecompPos, Variable);
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}
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void SseMoveAlignedRegToN64Mem(int sseReg, int AddrReg)
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{
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uint8_t x86Command = 0;
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CPU_Message(" movaps xmmword ptr [Dmem+%s], %s", x86_Name(AddrReg), sse_Name(sseReg));
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switch (sseReg)
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{
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case x86_XMM0: x86Command = 0x80; break;
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case x86_XMM1: x86Command = 0x88; break;
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case x86_XMM2: x86Command = 0x90; break;
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case x86_XMM3: x86Command = 0x98; break;
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case x86_XMM4: x86Command = 0xA0; break;
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case x86_XMM5: x86Command = 0xA8; break;
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case x86_XMM6: x86Command = 0xB0; break;
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case x86_XMM7: x86Command = 0xB8; break;
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}
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switch (AddrReg)
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{
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case x86_EAX: x86Command += 0x00; break;
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case x86_EBX: x86Command += 0x03; break;
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case x86_ECX: x86Command += 0x01; break;
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case x86_EDX: x86Command += 0x02; break;
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case x86_ESI: x86Command += 0x06; break;
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case x86_EDI: x86Command += 0x07; break;
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case x86_ESP: x86Command += 0x04; break;
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case x86_EBP: x86Command += 0x05; break;
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}
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PUTDST16(RecompPos, 0x290f);
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PUTDST8(RecompPos, x86Command);
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PUTDSTPTR(RecompPos, RSPInfo.DMEM);
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}
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void SseMoveUnalignedVariableToReg(void * Variable, const char * VariableName, int sseReg)
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{
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uint8_t x86Command = 0;
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CPU_Message(" movups %s, xmmword ptr [%s]", sse_Name(sseReg), VariableName);
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switch (sseReg)
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{
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case x86_XMM0: x86Command = 0x05; break;
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case x86_XMM1: x86Command = 0x0D; break;
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case x86_XMM2: x86Command = 0x15; break;
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case x86_XMM3: x86Command = 0x1D; break;
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case x86_XMM4: x86Command = 0x25; break;
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case x86_XMM5: x86Command = 0x2D; break;
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case x86_XMM6: x86Command = 0x35; break;
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case x86_XMM7: x86Command = 0x3D; break;
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}
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PUTDST16(RecompPos, 0x100f);
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PUTDST8(RecompPos, x86Command);
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PUTDSTPTR(RecompPos, Variable);
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}
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void SseMoveUnalignedN64MemToReg(int sseReg, int AddrReg)
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{
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uint8_t x86Command = 0;
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CPU_Message(" movups %s, xmmword ptr [Dmem+%s]", sse_Name(sseReg), x86_Name(AddrReg));
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switch (sseReg)
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{
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case x86_XMM0: x86Command = 0x80; break;
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case x86_XMM1: x86Command = 0x88; break;
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case x86_XMM2: x86Command = 0x90; break;
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case x86_XMM3: x86Command = 0x98; break;
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case x86_XMM4: x86Command = 0xA0; break;
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case x86_XMM5: x86Command = 0xA8; break;
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case x86_XMM6: x86Command = 0xB0; break;
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case x86_XMM7: x86Command = 0xB8; break;
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}
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switch (AddrReg)
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{
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case x86_EAX: x86Command += 0x00; break;
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case x86_EBX: x86Command += 0x03; break;
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case x86_ECX: x86Command += 0x01; break;
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case x86_EDX: x86Command += 0x02; break;
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case x86_ESI: x86Command += 0x06; break;
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case x86_EDI: x86Command += 0x07; break;
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case x86_ESP: x86Command += 0x04; break;
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case x86_EBP: x86Command += 0x05; break;
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}
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PUTDST16(RecompPos, 0x100f);
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PUTDST8(RecompPos, x86Command);
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PUTDSTPTR(RecompPos, RSPInfo.DMEM);
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}
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void SseMoveUnalignedRegToVariable(int sseReg, void * Variable, const char * VariableName)
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{
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uint8_t x86Command = 0;
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CPU_Message(" movups xmmword ptr [%s], %s", VariableName, sse_Name(sseReg));
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switch (sseReg)
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{
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case x86_XMM0: x86Command = 0x05; break;
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case x86_XMM1: x86Command = 0x0D; break;
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case x86_XMM2: x86Command = 0x15; break;
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case x86_XMM3: x86Command = 0x1D; break;
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case x86_XMM4: x86Command = 0x25; break;
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case x86_XMM5: x86Command = 0x2D; break;
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case x86_XMM6: x86Command = 0x35; break;
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case x86_XMM7: x86Command = 0x3D; break;
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}
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PUTDST16(RecompPos, 0x110f);
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PUTDST8(RecompPos, x86Command);
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PUTDSTPTR(RecompPos, Variable);
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}
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void SseMoveUnalignedRegToN64Mem(int sseReg, int AddrReg)
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{
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uint8_t x86Command = 0;
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CPU_Message(" movups xmmword ptr [Dmem+%s], %s", x86_Name(AddrReg), sse_Name(sseReg));
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switch (sseReg)
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{
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case x86_XMM0: x86Command = 0x80; break;
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case x86_XMM1: x86Command = 0x88; break;
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case x86_XMM2: x86Command = 0x90; break;
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case x86_XMM3: x86Command = 0x98; break;
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case x86_XMM4: x86Command = 0xA0; break;
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case x86_XMM5: x86Command = 0xA8; break;
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case x86_XMM6: x86Command = 0xB0; break;
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case x86_XMM7: x86Command = 0xB8; break;
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}
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switch (AddrReg)
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{
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case x86_EAX: x86Command += 0x00; break;
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case x86_EBX: x86Command += 0x03; break;
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case x86_ECX: x86Command += 0x01; break;
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case x86_EDX: x86Command += 0x02; break;
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case x86_ESI: x86Command += 0x06; break;
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case x86_EDI: x86Command += 0x07; break;
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case x86_ESP: x86Command += 0x04; break;
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case x86_EBP: x86Command += 0x05; break;
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}
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PUTDST16(RecompPos, 0x110f);
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PUTDST8(RecompPos, x86Command);
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PUTDSTPTR(RecompPos, RSPInfo.DMEM);
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}
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void SseMoveRegToReg(int Dest, int Source)
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{
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uint8_t x86Command = 0;
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CPU_Message(" movaps %s, %s", sse_Name(Dest), sse_Name(Source));
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switch (Dest)
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{
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case x86_XMM0: x86Command = 0x00; break;
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case x86_XMM1: x86Command = 0x08; break;
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case x86_XMM2: x86Command = 0x10; break;
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case x86_XMM3: x86Command = 0x18; break;
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case x86_XMM4: x86Command = 0x20; break;
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case x86_XMM5: x86Command = 0x28; break;
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case x86_XMM6: x86Command = 0x30; break;
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case x86_XMM7: x86Command = 0x38; break;
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}
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switch (Source)
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{
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case x86_XMM0: x86Command += 0x00; break;
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case x86_XMM1: x86Command += 0x01; break;
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case x86_XMM2: x86Command += 0x02; break;
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case x86_XMM3: x86Command += 0x03; break;
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case x86_XMM4: x86Command += 0x04; break;
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case x86_XMM5: x86Command += 0x05; break;
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case x86_XMM6: x86Command += 0x06; break;
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case x86_XMM7: x86Command += 0x07; break;
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}
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PUTDST16(RecompPos, 0x280f);
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PUTDST8(RecompPos, 0xC0 | x86Command);
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}
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void SseXorRegToReg(int Dest, int Source)
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{
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uint8_t x86Command = 0;
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CPU_Message(" xorps %s, %s", sse_Name(Dest), sse_Name(Source));
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switch (Dest)
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{
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case x86_XMM0: x86Command = 0x00; break;
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case x86_XMM1: x86Command = 0x08; break;
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case x86_XMM2: x86Command = 0x10; break;
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case x86_XMM3: x86Command = 0x18; break;
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case x86_XMM4: x86Command = 0x20; break;
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case x86_XMM5: x86Command = 0x28; break;
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case x86_XMM6: x86Command = 0x30; break;
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case x86_XMM7: x86Command = 0x38; break;
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}
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switch (Source)
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{
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case x86_XMM0: x86Command += 0x00; break;
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case x86_XMM1: x86Command += 0x01; break;
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case x86_XMM2: x86Command += 0x02; break;
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case x86_XMM3: x86Command += 0x03; break;
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case x86_XMM4: x86Command += 0x04; break;
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case x86_XMM5: x86Command += 0x05; break;
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case x86_XMM6: x86Command += 0x06; break;
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case x86_XMM7: x86Command += 0x07; break;
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}
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PUTDST16(RecompPos, 0x570f);
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PUTDST8(RecompPos, 0xC0 | x86Command);
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}
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void SseShuffleReg(int Dest, int Source, uint8_t Immed)
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{
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uint8_t x86Command = 0;
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CPU_Message(" shufps %s, %s, %02X", sse_Name(Dest), sse_Name(Source), Immed);
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switch (Dest)
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{
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case x86_XMM0: x86Command = 0x00; break;
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case x86_XMM1: x86Command = 0x08; break;
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case x86_XMM2: x86Command = 0x10; break;
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case x86_XMM3: x86Command = 0x18; break;
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case x86_XMM4: x86Command = 0x20; break;
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case x86_XMM5: x86Command = 0x28; break;
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case x86_XMM6: x86Command = 0x30; break;
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case x86_XMM7: x86Command = 0x38; break;
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}
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switch (Source)
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{
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case x86_XMM0: x86Command += 0x00; break;
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case x86_XMM1: x86Command += 0x01; break;
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case x86_XMM2: x86Command += 0x02; break;
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case x86_XMM3: x86Command += 0x03; break;
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case x86_XMM4: x86Command += 0x04; break;
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case x86_XMM5: x86Command += 0x05; break;
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case x86_XMM6: x86Command += 0x06; break;
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case x86_XMM7: x86Command += 0x07; break;
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}
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PUTDST16(RecompPos, 0xC60f);
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PUTDST8(RecompPos, 0xC0 | x86Command);
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PUTDST8(RecompPos, Immed);
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}
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