905 lines
35 KiB
C++
905 lines
35 KiB
C++
#pragma once
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#include "globals.h"
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#include "../core/support.h"
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#include "../core/type.h"
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ASMJIT_BEGIN_NAMESPACE
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//! \addtogroup asmjit_assembler
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//! \{
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//! Operand type used by \ref Operand_.
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enum class OperandType : uint32_t {
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//! Not an operand or not initialized.
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kNone = 0,
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//! Operand is a register.
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kReg = 1,
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//! Operand is a memory.
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kMem = 2,
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//! Operand is an immediate value.
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kImm = 3,
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//! Operand is a label.
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kLabel = 4,
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//! Maximum value of `OperandType`.
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kMaxValue = kLabel
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};
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//! Register type.
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//!
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//! Provides a unique type that can be used to identify a register or its view.
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enum class RegType : uint8_t {
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//! No register - unused, invalid, multiple meanings.
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kNone = 0,
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//! This is not a register type. This value is reserved for a \ref Label that used in \ref BaseMem as a base.
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//!
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//! Label tag is used as a sub-type, forming a unique signature across all operand types as 0x1 is never associated
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//! with any register type. This means that a memory operand's BASE register can be constructed from virtually any
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//! operand (register vs. label) by just assigning its type (register type or label-tag) and operand id.
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kLabelTag = 1,
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//! Universal type describing program counter (PC) or instruction pointer (IP) register, if the target architecture
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//! actually exposes it as a separate register type, which most modern targets do.
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kPC = 2,
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//! 8-bit low general purpose register (X86).
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kGp8Lo = 3,
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//! 8-bit high general purpose register (X86).
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kGp8Hi = 4,
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//! 16-bit general purpose register (X86).
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kGp16 = 5,
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//! 32-bit general purpose register (X86|ARM).
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kGp32 = 6,
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//! 64-bit general purpose register (X86|ARM).
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kGp64 = 7,
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//! 8-bit view of a vector register (ARM).
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kVec8 = 8,
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//! 16-bit view of a vector register (ARM).
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kVec16 = 9,
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//! 32-bit view of a vector register (ARM).
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kVec32 = 10,
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//! 64-bit view of a vector register (ARM).
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//!
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//! \note This is never used for MMX registers on X86, MMX registers have its own category.
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kVec64 = 11,
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//! 128-bit view of a vector register (X86|ARM).
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kVec128 = 12,
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//! 256-bit view of a vector register (X86).
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kVec256 = 13,
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//! 512-bit view of a vector register (X86).
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kVec512 = 14,
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//! 1024-bit view of a vector register (future).
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kVec1024 = 15,
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//! View of a vector register, which width is implementation specific (AArch64).
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kVecNLen = 16,
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//! Mask register (X86).
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kMask = 17,
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//! Start of architecture dependent register types.
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kExtra = 18,
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// X86 Specific Register Types
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// ---------------------------
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// X86 Specific Register Types
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// ===========================
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//! Instruction pointer (RIP), only addressable in \ref x86::Mem in 64-bit targets.
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kX86_Rip = kPC,
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//! Low GPB register (AL, BL, CL, DL, ...).
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kX86_GpbLo = kGp8Lo,
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//! High GPB register (AH, BH, CH, DH only).
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kX86_GpbHi = kGp8Hi,
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//! GPW register.
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kX86_Gpw = kGp16,
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//! GPD register.
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kX86_Gpd = kGp32,
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//! GPQ register (64-bit).
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kX86_Gpq = kGp64,
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//! XMM register (SSE+).
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kX86_Xmm = kVec128,
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//! YMM register (AVX+).
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kX86_Ymm = kVec256,
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//! ZMM register (AVX512+).
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kX86_Zmm = kVec512,
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//! K register (AVX512+).
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kX86_KReg = kMask,
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//! MMX register.
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kX86_Mm = kExtra + 0,
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//! Segment register (None, ES, CS, SS, DS, FS, GS).
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kX86_SReg = kExtra + 1,
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//! Control register (CR).
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kX86_CReg = kExtra + 2,
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//! Debug register (DR).
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kX86_DReg = kExtra + 3,
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//! FPU (x87) register.
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kX86_St = kExtra + 4,
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//! Bound register (BND).
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kX86_Bnd = kExtra + 5,
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//! TMM register (AMX_TILE)
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kX86_Tmm = kExtra + 6,
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// ARM Specific Register Types
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// ===========================
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//! Program pointer (PC) register (AArch64).
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kARM_PC = kPC,
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//! 32-bit general purpose register (R or W).
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kARM_GpW = kGp32,
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//! 64-bit general purpose register (X).
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kARM_GpX = kGp64,
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//! 8-bit view of VFP/ASIMD register (B).
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kARM_VecB = kVec8,
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//! 16-bit view of VFP/ASIMD register (H).
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kARM_VecH = kVec16,
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//! 32-bit view of VFP/ASIMD register (S).
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kARM_VecS = kVec32,
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//! 64-bit view of VFP/ASIMD register (D).
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kARM_VecD = kVec64,
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//! 128-bit view of VFP/ASIMD register (Q|V).
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kARM_VecV = kVec128,
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//! Maximum value of `RegType`.
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kMaxValue = 31
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};
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enum class RegGroup : uint8_t {
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//! General purpose register group compatible with all backends.
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kGp = 0,
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//! Vector register group compatible with all backends.
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//!
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//! Describes X86 XMM|YMM|ZMM registers ARM/AArch64 V registers.
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kVec = 1,
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//! Extra virtual group #2 that can be used by Compiler for register allocation.
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kExtraVirt2 = 2,
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//! Extra virtual group #3 that can be used by Compiler for register allocation.
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kExtraVirt3 = 3,
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//! Program counter group.
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kPC = 4,
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//! Extra non-virtual group that can be used by registers not managed by Compiler.
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kExtraNonVirt = 5,
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// X86 Specific Register Groups
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// ----------------------------
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//! K register group (KReg) - maps to \ref RegGroup::kExtraVirt2 (X86, X86_64).
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kX86_K = kExtraVirt2,
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//! MMX register group (MM) - maps to \ref RegGroup::kExtraVirt3 (X86, X86_64).
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kX86_MM = kExtraVirt3,
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//! Instruction pointer (X86, X86_64).
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kX86_Rip = kPC,
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//! Segment register group (X86, X86_64).
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kX86_SReg = kExtraNonVirt + 0,
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//! CR register group (X86, X86_64).
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kX86_CReg = kExtraNonVirt + 1,
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//! DR register group (X86, X86_64).
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kX86_DReg = kExtraNonVirt + 2,
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//! FPU register group (X86, X86_64).
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kX86_St = kExtraNonVirt + 3,
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//! BND register group (X86, X86_64).
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kX86_Bnd = kExtraNonVirt + 4,
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//! TMM register group (X86, X86_64).
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kX86_Tmm = kExtraNonVirt + 5,
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//! First group - only used in loops.
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k0 = 0,
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//! Last value of a virtual register that is managed by \ref BaseCompiler.
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kMaxVirt = Globals::kNumVirtGroups - 1,
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//! Maximum value of `RegGroup`.
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kMaxValue = 15
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};
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//! Operand signature is a 32-bit number describing \ref Operand and some of its payload.
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//!
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//! In AsmJit operand signature is used to store additional payload of register, memory, and immediate operands.
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//! In practice the biggest pressure on OperandSignature is from \ref BaseMem and architecture specific memory
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//! operands that need to store additional payload that cannot be stored elsewhere as values of all other members
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//! are fully specified by \ref BaseMem.
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struct OperandSignature {
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//! \name Constants
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//! \{
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enum : uint32_t {
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// Operand type (3 least significant bits).
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// |........|........|........|.....XXX|
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kOpTypeShift = 0,
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kOpTypeMask = 0x07u << kOpTypeShift,
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// Register type (5 bits).
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// |........|........|........|XXXXX...|
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kRegTypeShift = 3,
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kRegTypeMask = 0x1Fu << kRegTypeShift,
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// Register group (4 bits).
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// |........|........|....XXXX|........|
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kRegGroupShift = 8,
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kRegGroupMask = 0x0Fu << kRegGroupShift,
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// Memory base type (5 bits).
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// |........|........|........|XXXXX...|
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kMemBaseTypeShift = 3,
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kMemBaseTypeMask = 0x1Fu << kMemBaseTypeShift,
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// Memory index type (5 bits).
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// |........|........|...XXXXX|........|
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kMemIndexTypeShift = 8,
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kMemIndexTypeMask = 0x1Fu << kMemIndexTypeShift,
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// Memory base+index combined (10 bits).
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// |........|........|...XXXXX|XXXXX...|
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kMemBaseIndexShift = 3,
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kMemBaseIndexMask = 0x3FFu << kMemBaseIndexShift,
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// This memory operand represents a home-slot or stack (Compiler) (1 bit).
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// |........|........|..X.....|........|
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kMemRegHomeShift = 13,
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kMemRegHomeFlag = 0x01u << kMemRegHomeShift,
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// Immediate type (1 bit).
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// |........|........|........|....X...|
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kImmTypeShift = 3,
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kImmTypeMask = 0x01u << kImmTypeShift,
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// Predicate used by either registers or immediate values (4 bits).
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// |........|XXXX....|........|........|
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kPredicateShift = 20,
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kPredicateMask = 0x0Fu << kPredicateShift,
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// Operand size (8 most significant bits).
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// |XXXXXXXX|........|........|........|
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kSizeShift = 24,
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kSizeMask = 0xFFu << kSizeShift
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};
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//! \}
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//! \name Members
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//! \{
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uint32_t _bits;
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//! \}
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//! \name Overloaded Operators
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//!
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//! Overloaded operators make `OperandSignature` behave like regular integer.
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//!
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//! \{
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inline constexpr bool operator!() const noexcept { return _bits != 0; }
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inline constexpr explicit operator bool() const noexcept { return _bits != 0; }
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inline OperandSignature& operator|=(uint32_t x) noexcept { _bits |= x; return *this; }
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inline OperandSignature& operator&=(uint32_t x) noexcept { _bits &= x; return *this; }
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inline OperandSignature& operator^=(uint32_t x) noexcept { _bits ^= x; return *this; }
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inline OperandSignature& operator|=(const OperandSignature& other) noexcept { return operator|=(other._bits); }
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inline OperandSignature& operator&=(const OperandSignature& other) noexcept { return operator&=(other._bits); }
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inline OperandSignature& operator^=(const OperandSignature& other) noexcept { return operator^=(other._bits); }
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inline constexpr OperandSignature operator~() const noexcept { return OperandSignature{~_bits}; }
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inline constexpr OperandSignature operator|(uint32_t x) const noexcept { return OperandSignature{_bits | x}; }
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inline constexpr OperandSignature operator&(uint32_t x) const noexcept { return OperandSignature{_bits & x}; }
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inline constexpr OperandSignature operator^(uint32_t x) const noexcept { return OperandSignature{_bits ^ x}; }
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inline constexpr OperandSignature operator|(const OperandSignature& other) const noexcept { return OperandSignature{_bits | other._bits}; }
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inline constexpr OperandSignature operator&(const OperandSignature& other) const noexcept { return OperandSignature{_bits & other._bits}; }
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inline constexpr OperandSignature operator^(const OperandSignature& other) const noexcept { return OperandSignature{_bits ^ other._bits}; }
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inline constexpr bool operator==(uint32_t x) const noexcept { return _bits == x; }
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inline constexpr bool operator!=(uint32_t x) const noexcept { return _bits != x; }
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inline constexpr bool operator==(const OperandSignature& other) const noexcept { return _bits == other._bits; }
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inline constexpr bool operator!=(const OperandSignature& other) const noexcept { return _bits != other._bits; }
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//! \}
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//! \name Accessors
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//! \{
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inline constexpr uint32_t bits() const noexcept { return _bits; }
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template<uint32_t kFieldMask, uint32_t kFieldShift = Support::ConstCTZ<kFieldMask>::value>
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inline constexpr bool hasField() const noexcept {
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return (_bits & kFieldMask) != 0;
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}
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template<uint32_t kFieldMask, uint32_t kFieldShift = Support::ConstCTZ<kFieldMask>::value>
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inline constexpr bool hasField(uint32_t value) const noexcept {
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return (_bits & kFieldMask) != value << kFieldShift;
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}
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template<uint32_t kFieldMask, uint32_t kFieldShift = Support::ConstCTZ<kFieldMask>::value>
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inline constexpr uint32_t getField() const noexcept {
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return (_bits >> kFieldShift) & (kFieldMask >> kFieldShift);
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}
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inline constexpr bool isValid() const noexcept { return _bits != 0; }
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inline constexpr OperandType opType() const noexcept { return (OperandType)getField<kOpTypeMask>(); }
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inline constexpr RegType regType() const noexcept { return (RegType)getField<kRegTypeMask>(); }
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inline constexpr RegGroup regGroup() const noexcept { return (RegGroup)getField<kRegGroupMask>(); }
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inline constexpr uint32_t size() const noexcept { return getField<kSizeMask>(); }
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//! \}
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//! \name Static Constructors
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//! \{
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static inline constexpr OperandSignature fromBits(uint32_t bits) noexcept {
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return OperandSignature{bits};
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}
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template<uint32_t kFieldMask, typename T>
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static inline constexpr OperandSignature fromValue(const T& value) noexcept {
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return OperandSignature{uint32_t(value) << Support::ConstCTZ<kFieldMask>::value};
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}
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static inline constexpr OperandSignature fromOpType(OperandType opType) noexcept {
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return OperandSignature{uint32_t(opType) << kOpTypeShift};
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}
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static inline constexpr OperandSignature fromRegType(RegType regType) noexcept {
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return OperandSignature{uint32_t(regType) << kRegTypeShift};
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}
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static inline constexpr OperandSignature fromRegGroup(RegGroup regGroup) noexcept {
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return OperandSignature{uint32_t(regGroup) << kRegGroupShift};
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}
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static inline constexpr OperandSignature fromMemBaseType(RegType baseType) noexcept {
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return OperandSignature{uint32_t(baseType) << kMemBaseTypeShift};
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}
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static inline constexpr OperandSignature fromMemIndexType(RegType indexType) noexcept {
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return OperandSignature{uint32_t(indexType) << kMemIndexTypeShift};
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}
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static inline constexpr OperandSignature fromPredicate(uint32_t predicate) noexcept {
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return OperandSignature{predicate << kPredicateShift};
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}
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static inline constexpr OperandSignature fromSize(uint32_t size) noexcept {
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return OperandSignature{size << kSizeShift};
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}
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//! \}
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};
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//! Base class representing an operand in AsmJit (non-default constructed version).
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//!
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//! Contains no initialization code and can be used safely to define an array of operands that won't be initialized.
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//! This is a \ref Operand base structure designed to be statically initialized, static const, or to be used by user
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//! code to define an array of operands without having them default initialized at construction time.
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//!
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//! The key difference between \ref Operand and \ref Operand_ is:
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//!
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//! ```
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//! Operand_ xArray[10]; // Not initialized, contains garbage.
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//! Operand_ yArray[10] {}; // All operands initialized to none explicitly (zero initialized).
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//! Operand yArray[10]; // All operands initialized to none implicitly (zero initialized).
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//! ```
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struct Operand_ {
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//! \name Types
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//! \{
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typedef OperandSignature Signature;
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//! \}
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//! \name Constants
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//! \{
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// Indexes to `_data` array.
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enum DataIndex : uint32_t {
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kDataMemIndexId = 0,
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kDataMemOffsetLo = 1,
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kDataImmValueLo = ASMJIT_ARCH_LE ? 0 : 1,
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kDataImmValueHi = ASMJIT_ARCH_LE ? 1 : 0
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};
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//! \}
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//! \name Members
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//! \{
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//! Provides operand type and additional payload.
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Signature _signature;
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//! Either base id as used by memory operand or any id as used by others.
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uint32_t _baseId;
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//! Data specific to the operand type.
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//!
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//! The reason we don't use union is that we have `constexpr` constructors that construct operands and other
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//!`constexpr` functions that return whether another Operand or something else. These cannot generally work with
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//! unions so we also cannot use `union` if we want to be standard compliant.
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uint32_t _data[2];
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//! \}
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//! \name Overloaded Operators
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//! \{
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//! Tests whether this operand is the same as `other`.
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inline constexpr bool operator==(const Operand_& other) const noexcept { return equals(other); }
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//! Tests whether this operand is not the same as `other`.
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inline constexpr bool operator!=(const Operand_& other) const noexcept { return !equals(other); }
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//! \}
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//! \name Cast
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//! \{
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//! Casts this operand to `T` type.
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template<typename T>
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inline T& as() noexcept { return static_cast<T&>(*this); }
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//! Casts this operand to `T` type (const).
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template<typename T>
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inline const T& as() const noexcept { return static_cast<const T&>(*this); }
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//! \}
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//! \name Accessors
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//! \{
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//! Returns the type of the operand, see `OpType`.
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inline constexpr OperandType opType() const noexcept { return _signature.opType(); }
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//! Tests whether the operand is none (`OperandType::kNone`).
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inline constexpr bool isNone() const noexcept { return _signature == Signature::fromBits(0); }
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//! Tests whether the operand is a register (`OperandType::kReg`).
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inline constexpr bool isReg() const noexcept { return opType() == OperandType::kReg; }
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//! Tests whether the operand is a memory location (`OperandType::kMem`).
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inline constexpr bool isMem() const noexcept { return opType() == OperandType::kMem; }
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//! Tests whether the operand is an immediate (`OperandType::kImm`).
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inline constexpr bool isImm() const noexcept { return opType() == OperandType::kImm; }
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//! Returns the size of the operand in bytes.
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//!
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//! The value returned depends on the operand type:
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//! * None - Should always return zero size.
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//! * Reg - Should always return the size of the register. If the register size depends on architecture
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//! (like `x86::CReg` and `x86::DReg`) the size returned should be the greatest possible (so it
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//! should return 64-bit size in such case).
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//! * Mem - Size is optional and will be in most cases zero.
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//! * Imm - Should always return zero size.
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//! * Label - Should always return zero size.
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inline constexpr uint32_t size() const noexcept { return _signature.getField<Signature::kSizeMask>(); }
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//! Returns the operand id.
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//!
|
|
//! The value returned should be interpreted accordingly to the operand type:
|
|
//! * None - Should be `0`.
|
|
//! * Reg - Physical or virtual register id.
|
|
//! * Mem - Multiple meanings - BASE address (register or label id), or high value of a 64-bit absolute address.
|
|
//! * Imm - Should be `0`.
|
|
//! * Label - Label id if it was created by using `newLabel()` or `Globals::kInvalidId` if the label is invalid or
|
|
//! not initialized.
|
|
inline constexpr uint32_t id() const noexcept { return _baseId; }
|
|
|
|
//! Tests whether the operand is 100% equal to `other` operand.
|
|
//!
|
|
//! \note This basically performs a binary comparison, if aby bit is
|
|
//! different the operands are not equal.
|
|
inline constexpr bool equals(const Operand_& other) const noexcept {
|
|
return (_signature == other._signature) &
|
|
(_baseId == other._baseId ) &
|
|
(_data[0] == other._data[0] ) &
|
|
(_data[1] == other._data[1] ) ;
|
|
}
|
|
};
|
|
|
|
//! Base class representing an operand in AsmJit (default constructed version).
|
|
class Operand : public Operand_ {
|
|
public:
|
|
//! \name Construction & Destruction
|
|
//! \{
|
|
|
|
//! Creates `kOpNone` operand having all members initialized to zero.
|
|
inline constexpr Operand() noexcept
|
|
: Operand_{ Signature::fromOpType(OperandType::kNone), 0u, { 0u, 0u }} {}
|
|
|
|
//! Creates a cloned `other` operand.
|
|
inline constexpr Operand(const Operand& other) noexcept = default;
|
|
|
|
//! Creates a cloned `other` operand.
|
|
inline constexpr explicit Operand(const Operand_& other)
|
|
: Operand_(other) {}
|
|
|
|
//! Creates an operand initialized to raw `[u0, u1, u2, u3]` values.
|
|
inline constexpr Operand(Globals::Init_, const Signature& u0, uint32_t u1, uint32_t u2, uint32_t u3) noexcept
|
|
: Operand_{ u0, u1, { u2, u3 }} {}
|
|
|
|
//! Creates an uninitialized operand (dangerous).
|
|
inline explicit Operand(Globals::NoInit_) noexcept {}
|
|
|
|
//! \}
|
|
|
|
//! \name Overloaded Operators
|
|
//! \{
|
|
|
|
inline Operand& operator=(const Operand& other) noexcept = default;
|
|
inline Operand& operator=(const Operand_& other) noexcept { return operator=(static_cast<const Operand&>(other)); }
|
|
|
|
//! \}
|
|
|
|
//! \}
|
|
};
|
|
|
|
static_assert(sizeof(Operand) == 16, "asmjit::Operand must be exactly 16 bytes long");
|
|
|
|
//! Label (jump target or data location).
|
|
//!
|
|
//! Label represents a location in code typically used as a jump target, but may be also a reference to some data or
|
|
//! a static variable. Label has to be explicitly created by BaseEmitter.
|
|
//!
|
|
//! Example of using labels:
|
|
//!
|
|
//! ```
|
|
//! // Create some emitter (for example x86::Assembler).
|
|
//! x86::Assembler a;
|
|
//!
|
|
//! // Create Label instance.
|
|
//! Label L1 = a.newLabel();
|
|
//!
|
|
//! // ... your code ...
|
|
//!
|
|
//! // Using label.
|
|
//! a.jump(L1);
|
|
//!
|
|
//! // ... your code ...
|
|
//!
|
|
//! // Bind label to the current position, see `BaseEmitter::bind()`.
|
|
//! a.bind(L1);
|
|
//! ```
|
|
class Label : public Operand {
|
|
public:
|
|
//! \name Construction & Destruction
|
|
//! \{
|
|
|
|
//! Creates a label operand without ID (you must set the ID to make it valid).
|
|
inline constexpr Label() noexcept
|
|
: Operand(Globals::Init, Signature::fromOpType(OperandType::kLabel), Globals::kInvalidId, 0, 0) {}
|
|
|
|
//! Creates a cloned label operand of `other`.
|
|
inline constexpr Label(const Label& other) noexcept
|
|
: Operand(other) {}
|
|
|
|
//! Creates a label operand of the given `id`.
|
|
inline constexpr explicit Label(uint32_t id) noexcept
|
|
: Operand(Globals::Init, Signature::fromOpType(OperandType::kLabel), id, 0, 0) {}
|
|
|
|
inline explicit Label(Globals::NoInit_) noexcept
|
|
: Operand(Globals::NoInit) {}
|
|
|
|
//! Resets the label, will reset all properties and set its ID to `Globals::kInvalidId`.
|
|
inline void reset() noexcept {
|
|
_signature = Signature::fromOpType(OperandType::kLabel);
|
|
_baseId = Globals::kInvalidId;
|
|
_data[0] = 0;
|
|
_data[1] = 0;
|
|
}
|
|
|
|
//! \}
|
|
|
|
//! \name Overloaded Operators
|
|
//! \{
|
|
|
|
inline Label& operator=(const Label& other) noexcept = default;
|
|
|
|
//! \}
|
|
|
|
//! \name Accessors
|
|
//! \{
|
|
|
|
//! Tests whether the label was created by CodeHolder and/or an attached emitter.
|
|
inline constexpr bool isValid() const noexcept { return _baseId != Globals::kInvalidId; }
|
|
//! Sets the label `id`.
|
|
inline void setId(uint32_t id) noexcept { _baseId = id; }
|
|
|
|
//! \}
|
|
};
|
|
|
|
//! \cond INTERNAL
|
|
//! Default register traits.
|
|
struct BaseRegTraits {
|
|
enum : uint32_t {
|
|
//! \ref TypeId representing this register type, could be \ref TypeId::kVoid if such type doesn't exist.
|
|
kTypeId = uint32_t(TypeId::kVoid),
|
|
//! RegType is not valid by default.
|
|
kValid = 0,
|
|
//! Count of registers (0 if none).
|
|
kCount = 0,
|
|
|
|
//! Zero type by default (defeaults to None).
|
|
kType = uint32_t(RegType::kNone),
|
|
//! Zero group by default (defaults to GP).
|
|
kGroup = uint32_t(RegGroup::kGp),
|
|
//! No size by default.
|
|
kSize = 0,
|
|
|
|
//! Empty signature by default (not even having operand type set to register).
|
|
kSignature = 0
|
|
};
|
|
};
|
|
//! \endcond
|
|
|
|
//! Physical or virtual register operand.
|
|
class BaseReg : public Operand {
|
|
public:
|
|
//! \name Constants
|
|
//! \{
|
|
|
|
enum : uint32_t {
|
|
//! None or any register (mostly internal).
|
|
kIdBad = 0xFFu,
|
|
|
|
kBaseSignatureMask =
|
|
Signature::kOpTypeMask |
|
|
Signature::kRegTypeMask |
|
|
Signature::kRegGroupMask |
|
|
Signature::kSizeMask,
|
|
|
|
kTypeNone = uint32_t(RegType::kNone),
|
|
kSignature = Signature::fromOpType(OperandType::kReg).bits()
|
|
};
|
|
|
|
//! \}
|
|
|
|
//! \name Construction & Destruction
|
|
//! \{
|
|
|
|
//! Creates a dummy register operand.
|
|
inline constexpr BaseReg() noexcept
|
|
: Operand(Globals::Init, Signature::fromOpType(OperandType::kReg), kIdBad, 0, 0) {}
|
|
|
|
//! Creates a new register operand which is the same as `other` .
|
|
inline constexpr BaseReg(const BaseReg& other) noexcept
|
|
: Operand(other) {}
|
|
|
|
//! Creates a new register operand compatible with `other`, but with a different `id`.
|
|
inline constexpr BaseReg(const BaseReg& other, uint32_t id) noexcept
|
|
: Operand(Globals::Init, other._signature, id, 0, 0) {}
|
|
|
|
//! Creates a register initialized to the given `signature` and `id`.
|
|
inline constexpr BaseReg(const Signature& signature, uint32_t id) noexcept
|
|
: Operand(Globals::Init, signature, id, 0, 0) {}
|
|
|
|
inline explicit BaseReg(Globals::NoInit_) noexcept
|
|
: Operand(Globals::NoInit) {}
|
|
|
|
//! \}
|
|
|
|
//! \name Accessors
|
|
//! \{
|
|
|
|
//! Returns base signature of the register associated with each register type.
|
|
//!
|
|
//! Base signature only contains the operand type, register type, register group, and register size. It doesn't
|
|
//! contain element type, predicate, or other architecture-specific data. Base signature is a signature that is
|
|
//! provided by architecture-specific `RegTraits`, like \ref x86::RegTraits.
|
|
inline constexpr OperandSignature baseSignature() const noexcept { return _signature & kBaseSignatureMask; }
|
|
|
|
//! Tests whether the operand's base signature matches the given signature `sign`.
|
|
inline constexpr bool hasBaseSignature(uint32_t signature) const noexcept { return baseSignature() == signature; }
|
|
//! Tests whether the register is valid (either virtual or physical).
|
|
inline constexpr bool isValid() const noexcept { return (_signature != 0) & (_baseId != kIdBad); }
|
|
inline constexpr RegType type() const noexcept { return _signature.regType(); }
|
|
};
|
|
|
|
#define ASMJIT_DEFINE_REG_TRAITS(REG, REG_TYPE, GROUP, SIZE, COUNT, TYPE_ID) \
|
|
template<> \
|
|
struct RegTraits<REG_TYPE> { \
|
|
typedef REG RegT; \
|
|
\
|
|
enum : uint32_t { \
|
|
kValid = uint32_t(true), \
|
|
kCount = uint32_t(COUNT), \
|
|
kType = uint32_t(REG_TYPE), \
|
|
kGroup = uint32_t(GROUP), \
|
|
kSize = uint32_t(SIZE), \
|
|
kTypeId = uint32_t(TYPE_ID), \
|
|
\
|
|
kSignature = (OperandSignature::fromOpType(OperandType::kReg) | \
|
|
OperandSignature::fromRegType(REG_TYPE) | \
|
|
OperandSignature::fromRegGroup(GROUP) | \
|
|
OperandSignature::fromSize(kSize)).bits(), \
|
|
}; \
|
|
}
|
|
|
|
//! Adds constructors and member functions to a class that implements abstract register. Abstract register is register
|
|
//! that doesn't have type or signature yet, it's a base class like `x86::Reg` or `arm::Reg`.
|
|
#define ASMJIT_DEFINE_ABSTRACT_REG(REG, BASE) \
|
|
public: \
|
|
/*! Default constructor that only setups basics. */ \
|
|
inline constexpr REG() noexcept \
|
|
: BASE(Signature{kSignature}, kIdBad) {} \
|
|
\
|
|
/*! Makes a copy of the `other` register operand. */ \
|
|
inline constexpr REG(const REG& other) noexcept \
|
|
: BASE(other) {} \
|
|
\
|
|
/*! Makes a copy of the `other` register having id set to `id` */ \
|
|
inline constexpr REG(const BaseReg& other, uint32_t id) noexcept \
|
|
: BASE(other, id) {} \
|
|
\
|
|
/*! Creates a register based on `signature` and `id`. */ \
|
|
inline constexpr REG(const OperandSignature& sgn, uint32_t id) noexcept \
|
|
: BASE(sgn, id) {} \
|
|
\
|
|
/*! Creates a completely uninitialized REG register operand (garbage). */ \
|
|
inline explicit REG(Globals::NoInit_) noexcept \
|
|
: BASE(Globals::NoInit) {} \
|
|
\
|
|
/*! Creates a new register from register type and id. */ \
|
|
static inline REG fromTypeAndId(RegType type, uint32_t id) noexcept { \
|
|
return REG(signatureOf(type), id); \
|
|
} \
|
|
\
|
|
/*! Clones the register operand. */ \
|
|
inline constexpr REG clone() const noexcept { return REG(*this); } \
|
|
\
|
|
inline REG& operator=(const REG& other) noexcept = default;
|
|
|
|
//! Adds constructors and member functions to a class that implements final register. Final registers MUST HAVE a valid
|
|
//! signature.
|
|
#define ASMJIT_DEFINE_FINAL_REG(REG, BASE, TRAITS) \
|
|
public: \
|
|
enum : uint32_t { \
|
|
kThisType = TRAITS::kType, \
|
|
kThisGroup = TRAITS::kGroup, \
|
|
kThisSize = TRAITS::kSize, \
|
|
kSignature = TRAITS::kSignature \
|
|
}; \
|
|
\
|
|
ASMJIT_DEFINE_ABSTRACT_REG(REG, BASE) \
|
|
\
|
|
/*! Creates a register operand having its id set to `id`. */ \
|
|
inline constexpr explicit REG(uint32_t id) noexcept \
|
|
: BASE(Signature{kSignature}, id) {}
|
|
//! \endcond
|
|
|
|
//! Base class for all memory operands.
|
|
//!
|
|
//! The data is split into the following parts:
|
|
//!
|
|
//! - BASE - Base register or label - requires 36 bits total. 4 bits are used to encode the type of the BASE operand
|
|
//! (label vs. register type) and the remaining 32 bits define the BASE id, which can be a physical or virtual
|
|
//! register index. If BASE type is zero, which is never used as a register type and label doesn't use it as well
|
|
//! then BASE field contains a high DWORD of a possible 64-bit absolute address, which is possible on X64.
|
|
//!
|
|
//! - INDEX - Index register (or theoretically Label, which doesn't make sense). Encoding is similar to BASE - it
|
|
//! also requires 36 bits and splits the encoding to INDEX type (4 bits defining the register type) and 32-bit id.
|
|
//!
|
|
//! - OFFSET - A relative offset of the address. Basically if BASE is specified the relative displacement adjusts
|
|
//! BASE and an optional INDEX. if BASE is not specified then the OFFSET should be considered as ABSOLUTE address
|
|
//! (at least on X86). In that case its low 32 bits are stored in DISPLACEMENT field and the remaining high 32
|
|
//! bits are stored in BASE.
|
|
//!
|
|
//! - OTHER - There is rest 8 bits that can be used for whatever purpose. For example \ref x86::Mem operand uses
|
|
//! these bits to store segment override prefix and index shift (or scale).
|
|
class BaseMem : public Operand {
|
|
public:
|
|
//! \name Construction & Destruction
|
|
//! \{
|
|
|
|
//! Creates a default `BaseMem` operand, that points to [0].
|
|
inline constexpr BaseMem() noexcept
|
|
: Operand(Globals::Init, Signature::fromOpType(OperandType::kMem), 0, 0, 0) {}
|
|
|
|
//! Creates a `BaseMem` operand that is a clone of `other`.
|
|
inline constexpr BaseMem(const BaseMem& other) noexcept
|
|
: Operand(other) {}
|
|
|
|
//! Creates a `BaseMem` operand from `baseReg` and `offset`.
|
|
//!
|
|
//! \note This is an architecture independent constructor that can be used to create an architecture
|
|
//! independent memory operand to be used in portable code that can handle multiple architectures.
|
|
inline constexpr explicit BaseMem(const BaseReg& baseReg, int32_t offset = 0) noexcept
|
|
: Operand(Globals::Init,
|
|
Signature::fromOpType(OperandType::kMem) | Signature::fromMemBaseType(baseReg.type()),
|
|
baseReg.id(),
|
|
0,
|
|
uint32_t(offset)) {}
|
|
|
|
//! \cond INTERNAL
|
|
//! Creates a `BaseMem` operand from 4 integers as used by `Operand_` struct.
|
|
inline constexpr BaseMem(const OperandSignature& u0, uint32_t baseId, uint32_t indexId, int32_t offset) noexcept
|
|
: Operand(Globals::Init, u0, baseId, indexId, uint32_t(offset)) {}
|
|
//! \endcond
|
|
|
|
//! Creates a completely uninitialized `BaseMem` operand.
|
|
inline explicit BaseMem(Globals::NoInit_) noexcept
|
|
: Operand(Globals::NoInit) {}
|
|
|
|
//! \name Accessors
|
|
//! \{
|
|
|
|
//! Tests whether the memory operand has a BASE register or label specified.
|
|
inline constexpr bool hasBase() const noexcept {
|
|
return (_signature & Signature::kMemBaseTypeMask) != 0;
|
|
}
|
|
|
|
//! Tests whether the memory operand has an INDEX register specified.
|
|
inline constexpr bool hasIndex() const noexcept {
|
|
return (_signature & Signature::kMemIndexTypeMask) != 0;
|
|
}
|
|
|
|
//! Tests whether the memory operand has BASE or INDEX register.
|
|
inline constexpr bool hasBaseOrIndex() const noexcept {
|
|
return (_signature & Signature::kMemBaseIndexMask) != 0;
|
|
}
|
|
|
|
//! This is used internally for BASE+INDEX validation.
|
|
inline constexpr uint32_t baseAndIndexTypes() const noexcept { return _signature.getField<Signature::kMemBaseIndexMask>(); }
|
|
|
|
//! Returns both BASE (4:0 bits) and INDEX (9:5 bits) types combined into a single value.
|
|
//!
|
|
//! \remarks Returns id of the BASE register or label (if the BASE was specified as label).
|
|
inline constexpr uint32_t baseId() const noexcept { return _baseId; }
|
|
|
|
//! Returns the id of the INDEX register.
|
|
inline constexpr uint32_t indexId() const noexcept { return _data[kDataMemIndexId]; }
|
|
//! Returns a 32-bit low part of a 64-bit offset or absolute address.
|
|
inline constexpr int32_t offsetLo32() const noexcept { return int32_t(_data[kDataMemOffsetLo]); }
|
|
};
|
|
|
|
//! Immediate operands are encoded with instruction data.
|
|
class Imm : public Operand {
|
|
public:
|
|
//! \cond INTERNAL
|
|
template<typename T>
|
|
struct IsConstexprConstructibleAsImmType
|
|
: public std::integral_constant<bool, std::is_enum<T>::value ||
|
|
std::is_pointer<T>::value ||
|
|
std::is_integral<T>::value ||
|
|
std::is_function<T>::value> {};
|
|
//! \endcond
|
|
|
|
//! \name Construction & Destruction
|
|
//! \{
|
|
|
|
//! Creates a new immediate value (initial value is 0).
|
|
inline constexpr Imm() noexcept
|
|
: Operand(Globals::Init, Signature::fromOpType(OperandType::kImm), 0, 0, 0) {}
|
|
|
|
//! Creates a new immediate value from `other`.
|
|
inline constexpr Imm(const Imm& other) noexcept
|
|
: Operand(other) {}
|
|
|
|
//! Creates a new signed immediate value, assigning the value to `val` and an architecture-specific predicate
|
|
//! to `predicate`.
|
|
//!
|
|
//! \note Predicate is currently only used by ARM architectures.
|
|
template<typename T, typename = typename std::enable_if<IsConstexprConstructibleAsImmType<typename std::decay<T>::type>::value>::type>
|
|
inline constexpr Imm(const T& val, const uint32_t predicate = 0) noexcept
|
|
: Operand(Globals::Init,
|
|
Signature::fromOpType(OperandType::kImm) | Signature::fromPredicate(predicate),
|
|
0,
|
|
Support::unpackU32At0(int64_t(val)),
|
|
Support::unpackU32At1(int64_t(val))) {}
|
|
|
|
//! Returns the immediate value as `int64_t`, which is the internal format Imm uses.
|
|
inline constexpr int64_t value() const noexcept {
|
|
return int64_t((uint64_t(_data[kDataImmValueHi]) << 32) | _data[kDataImmValueLo]);
|
|
}
|
|
};
|
|
|
|
//! Creates a new immediate operand.
|
|
template<typename T>
|
|
static inline constexpr Imm imm(const T& val) noexcept { return Imm(val); }
|
|
|
|
//! \}
|
|
|
|
ASMJIT_END_NAMESPACE
|