zilmar
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c7d8a70a4d
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Core: fix jump in CX86RecompilerOps::CompileSystemCheck
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2024-12-27 09:02:37 +10:30 |
|
zilmar
|
bfa3788562
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Core: CX86RecompilerOps::COP1_D_Opcode fix return type of floating point register
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2024-12-26 14:29:52 +10:30 |
|
zilmar
|
3c7e71adca
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Core: Fix up CX86RecompilerOps::COP1_D_Opcode for the registers it is using
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2024-12-26 14:16:26 +10:30 |
|
zilmar
|
fc79cb0344
|
Core: Add DwordLower for cvt.w
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2024-12-26 09:35:07 +10:30 |
|
zilmar
|
7e74b98d5b
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Core: Fix up labels in CX86RecompilerOps::COP1_S_CVT
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2024-12-19 21:59:42 +10:30 |
|
zilmar
|
57f278416e
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core: better handling of fpu registers with COP1_S_Opcode
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2024-12-19 19:09:31 +10:30 |
|
zilmar
|
13a974e687
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Core: in CX86RecompilerOps::COP1_CT ignore write to other registers
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2024-12-19 09:58:30 +10:30 |
|
zilmar
|
fba1c4bc3b
|
Core: Fix up bug in CX86RecompilerOps::SPECIAL_AND
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2024-12-19 09:57:25 +10:30 |
|
zilmar
|
473aeba2cf
|
Core: Fix order of value in call to CMipsMemoryVM::SD_VAddr32 in recompiler
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2024-12-12 21:22:32 +10:30 |
|
zilmar
|
5d64b3d920
|
Core: Better handling of Storing non 32bit values to non memory
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2024-12-12 16:50:36 +10:30 |
|
zilmar
|
3164caf2d0
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Core: allow Store/load ops be forced to 32bit version
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2024-12-08 11:15:39 +10:30 |
|
zilmar
|
77cd679756
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Core: Fix a bug in CX86RecompilerOps::SPECIAL_DIV
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2024-12-05 17:05:52 +10:30 |
|
zilmar
|
fc1210aac5
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Core: Do not allow CX86RecompilerOps::SPECIAL_DSRL32 and CX86RecompilerOps::SPECIAL_DSRA32 to write to R0
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2024-12-05 11:25:20 +10:30 |
|
zilmar
|
1e4ab04121
|
Core: Fix up CX86RecompilerOps::SPECIAL_DSUB when rd == rt
|
2024-12-05 11:06:42 +10:30 |
|
zilmar
|
04c1c3d024
|
Core: Fix up CX86RecompilerOps::SPECIAL_DADD
|
2024-12-05 10:03:45 +10:30 |
|
zilmar
|
1f3ef6d505
|
Core: CX86RecompilerOps::SPECIAL_NOR Ignore write to r0
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2024-11-28 15:54:36 +10:30 |
|
zilmar
|
95015302d6
|
Core: Have CX86RecompilerOps::SPECIAL_XOR treat R0 as 64bit constant
|
2024-11-28 15:38:54 +10:30 |
|
zilmar
|
a3c777ed84
|
Core: Have CX86RecompilerOps::SPECIAL_AND unmap the register on const write
|
2024-11-28 15:14:26 +10:30 |
|
zilmar
|
0de0bea07a
|
Core: Ignore write in CX86RecompilerOps::SPECIAL_OR
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2024-11-28 12:37:42 +10:30 |
|
zilmar
|
8d69671e93
|
Core: CX86RecompilerOps::ADDIU should not ignore when not 32bit mapped
|
2024-11-28 12:29:35 +10:30 |
|
zilmar
|
52d904702f
|
Core: With CONST64 CX86RegInfo::WriteBackRegisters might not write the high 32bit correct
|
2024-11-28 11:39:41 +10:30 |
|
zilmar
|
d5367d9291
|
Core: Better handling of SW with address not sign extended
|
2024-11-28 11:02:38 +10:30 |
|
zilmar
|
fd05d9f42f
|
core: if lwl or lwr, in CX86RecompilerOps::CompileLoadMemoryValue, make sure that we are loading rt
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2024-11-21 21:33:42 +10:30 |
|
zilmar
|
5e1a40fffb
|
Core: fix CX86RecompilerOps::CompileLoadMemoryValue Map_GPR_32bit when called from LWC1
|
2024-11-21 11:10:01 +10:30 |
|
zilmar
|
2ec9ed08a4
|
Core: Improve LW with address not sign extended test in recompiler
|
2024-11-14 17:02:18 +10:30 |
|
zilmar
|
97b2579b4b
|
Core: Have the recompiler just deal with the Program Counter as 32bit
|
2024-11-07 17:05:16 +10:30 |
|
zilmar
|
e419508c2b
|
Core: On ExitReason_CheckPCAlignment make sure CompileSystemCheck is called
|
2024-11-07 12:13:28 +10:30 |
|
zilmar
|
d06212e766
|
Core: CX86RecompilerOps::JAL stop double call to UpdateCounters
|
2024-11-07 11:05:55 +10:30 |
|
zilmar
|
905254615d
|
Core: Change the handling of symbols inside asmjit usage
|
2024-10-31 06:50:17 +10:30 |
|
zilmar
|
17c501fa08
|
Core: clean up some code related to CompileStoreMemoryValue, like the exit method being an exception
|
2024-10-24 13:32:02 +10:30 |
|
zilmar
|
440894992a
|
Core: remove the BreakPoint in handling ExitReason_CheckPCAlignment
|
2024-10-24 11:58:53 +10:30 |
|
zilmar
|
65ede5e3e8
|
Core: If jumping to an unaligned address then generate an exception
|
2024-10-24 10:31:48 +10:30 |
|
zilmar
|
c39582b9ed
|
Core: Make sure CX86RecompilerOps::SPECIAL_AND can not write to R0
|
2024-10-17 18:42:45 +10:30 |
|
zilmar
|
45e52e1d2a
|
Core: in SPECIAL_SYSCALL, SPECIAL_BREAK only exit the block is the stage is PIPELINE_STAGE_NORMAL
|
2024-10-17 14:12:46 +10:30 |
|
zilmar
|
91f9cdaaa7
|
Core: Change the Program counter to be 64bit
|
2024-06-06 14:09:12 +09:30 |
|
zilmar
|
77ac4744a5
|
Core: Make sure fpu stack is being cleared
|
2024-05-23 11:52:58 +09:30 |
|
zilmar
|
ec714cd90d
|
Core: in CX86RecompilerOps::CompileCheckFPUResult64 protect RegPointer before Map_TempReg(asmjit::x86::eax)
|
2024-05-23 11:41:15 +09:30 |
|
zilmar
|
3baaa829de
|
Core: Remove g_TLBLoadAddress, g_TLBStoreAddress global variables
|
2024-05-16 16:34:17 +09:30 |
|
zilmar
|
13bd420b2a
|
Core: Sync FP status register in advanced block linking
|
2024-05-16 15:45:38 +09:30 |
|
zilmar
|
703a09d034
|
Core: Remove protecting memory option
|
2024-05-09 17:56:28 +09:30 |
|
zilmar
|
f478f16269
|
Core: Clear FP Status flag in recompiler on BC1FL and BC1TL
|
2024-05-09 10:55:38 +09:30 |
|
zilmar
|
c786bc3251
|
Core: Force Fpu exception in recompiler
|
2024-05-02 16:34:13 +09:30 |
|
zilmar
|
b3e8b760e6
|
Core: get COP1_S_TRUNC_L, COP1_S_CEIL_L, COP1_S_FLOOR_L, COP1_W_CVT_S, COP1_W_CVT_D, COP1_L_CVT_S, COP1_L_CVT_D to use COP1_S_CVT function
|
2024-05-02 15:48:43 +09:30 |
|
zilmar
|
dd0f7ad776
|
Core: Have CX86RecompilerOps::COP1_S_CVT be able to handle the old format of FPU_Dword and FPU_Qword
|
2024-05-02 15:46:03 +09:30 |
|
zilmar
|
046f27ce98
|
Core: fix up some bugs in CX86RecompilerOps::COP1_S_CVT
|
2024-04-25 20:47:02 +09:30 |
|
zilmar
|
627b4d6103
|
Core: Get CompileCheckFPUInput check InvalidValueMax, InvalidMinValue in conv
|
2024-04-25 20:41:03 +09:30 |
|
zilmar
|
b92e6bd752
|
Core: get to COP1_S_ROUND_L and COP1_S_CVT_L to use COP1_S_CVT
|
2024-04-25 20:22:47 +09:30 |
|
zilmar
|
d658477cf4
|
Core: get CX86RecompilerOps::Compile_Branch to clear status flags
|
2024-04-18 17:31:19 +09:30 |
|
zilmar
|
1172b6e04d
|
Core: get CX86RecompilerOps::SW_Const on 0x04300000 to call MIPSInterfaceHandler directly
|
2024-04-18 17:21:39 +09:30 |
|
zilmar
|
38738b783d
|
Core: get CX86RecompilerOps::COP1_S_CVT to handle NewFormat == CRegInfo::FPU_Qword
|
2024-04-18 17:11:45 +09:30 |