zilmar
|
f3d6d3fc7c
|
Core: for tlb miss only use special address when address is not defined
|
2023-09-14 18:39:15 +09:30 |
|
zilmar
|
e0c125e837
|
Core: Fix clang issue
|
2023-09-14 16:33:20 +09:30 |
|
zilmar
|
c02858c7a0
|
Core: Add LLD opcode
|
2023-09-14 16:31:37 +09:30 |
|
zilmar
|
f559aed2ad
|
Core: Get CRegisters::DoAddressError, CRegisters::DoTLBReadMiss, CRegisters::DoTLBWriteMiss to use TriggerException function
|
2023-09-14 16:23:26 +09:30 |
|
zilmar
|
ae4af8746b
|
Core: replace GenerateTLBReadException and void GenerateTLBWriteException with CRegisters::DoTLBReadMiss/CRegisters::DoTLBWriteMiss
|
2023-09-14 13:09:11 +09:30 |
|
zilmar
|
8b14b6d7d1
|
Core: Move InitRegisters to register class
|
2023-09-14 12:01:16 +09:30 |
|
zilmar
|
a5a4873e84
|
Core: Have CRegisters::DoAddressError to not directly modify program counter
|
2023-09-14 11:37:21 +09:30 |
|
zilmar
|
2d09178449
|
Core: Add calls to CPO1_UNIMPLEMENTED_OP for Cop1.w functions
|
2023-09-14 11:15:42 +09:30 |
|
zilmar
|
5da5dab3c5
|
Core: Have CRegisters::DoTLBReadMiss set the target pipe line to jump, not directly modify the PC
|
2023-09-14 11:09:28 +09:30 |
|
zilmar
|
fcd7257adc
|
Core: Change COP0 Status register to a struct breaking up the bits
|
2023-09-14 10:23:36 +09:30 |
|
zilmar
|
9ffd87168a
|
Core: DisplayControlRegHandler::Read32 read more of the registers
|
2023-09-14 09:40:11 +09:30 |
|
zilmar
|
ab03916a70
|
Core: let the stack pointer equal end of rdram
|
2023-09-07 11:13:54 +09:30 |
|
zilmar
|
7199096748
|
Core: Merge CheckFPUException into CheckFPUResult64
|
2023-08-31 18:52:34 +09:30 |
|
zilmar
|
91d1c6e237
|
Core: Add fpu exceptions to COP1_S_MUL
|
2023-08-31 11:09:48 +09:30 |
|
zilmar
|
2f7a35613f
|
Core: Add exception to COP1_S_SUB
|
2023-08-31 10:54:41 +09:30 |
|
zilmar
|
c28c6bb4a1
|
Core: Add fpu exceptions to COP1_S_ADD
|
2023-08-31 10:08:49 +09:30 |
|
zilmar
|
416c85ecda
|
Core: some code clean up of Load_FPR_ToTop
|
2023-08-31 09:30:05 +09:30 |
|
zilmar
|
2dcfcf250d
|
Core: Do not force unmapping of fpr registers before CX86RegInfo::BeforeCallDirect(void)
|
2023-08-31 09:28:23 +09:30 |
|
zilmar
|
e49438cdab
|
Core: Add exit reason exception
|
2023-08-30 12:16:07 +09:30 |
|
zilmar
|
41fa1fd5dd
|
Core: use m_TLB_WriteMap not m_TLB_ReadMap for NonMemory
|
2023-08-30 11:35:53 +09:30 |
|
zilmar
|
d300dc002a
|
Core: remove exception catch around RSP
|
2023-08-17 15:27:18 +09:30 |
|
zilmar
|
6884c8d2c9
|
Core: fix up how recompiler handles rounding
|
2023-08-17 15:24:57 +09:30 |
|
zilmar
|
b5db44c12d
|
Core: Get CheckFPUInput64Conv to return true on exception
|
2023-08-03 17:25:03 +09:30 |
|
zilmar
|
5ff45c43c4
|
Core: Get R4300iOp::CheckFPUInput64 to return true on exception
|
2023-08-03 17:11:56 +09:30 |
|
zilmar
|
bc1b027c94
|
Core: get CheckFPUInput32Conv to return true on exception
|
2023-08-03 16:24:54 +09:30 |
|
zilmar
|
930e463bbc
|
Core: Move TriggerException(EXC_FPE) into R4300iOp::CheckFPUInput32
|
2023-08-03 15:38:07 +09:30 |
|
zilmar
|
07cf94bde3
|
RSP: only look at SP_STATUS_HALT when seeing if the RSP should run
|
2023-07-06 20:49:14 +09:30 |
|
zilmar
|
187bd64915
|
Core: Update how exceptions are handled with the recompiler
|
2023-06-08 16:25:05 +09:30 |
|
zilmar
|
a39ebe7d37
|
Core: Create InitFpuOperation
|
2023-05-27 10:01:19 +09:30 |
|
zilmar
|
e2eebe566d
|
Core: fix up for clang
|
2023-05-18 18:05:54 +09:30 |
|
zilmar
|
b438fddf2e
|
Core: Add CP2 handling
|
2023-05-18 18:04:41 +09:30 |
|
zilmar
|
3b8dfce64a
|
Core: Convert DoBreakException to TriggerException
|
2023-05-18 11:47:00 +09:30 |
|
zilmar
|
b2c2a03a2e
|
Core: convert DoFloatingPointException to TriggerException
|
2023-05-18 11:41:20 +09:30 |
|
zilmar
|
0dfab78c88
|
Core: Convert DoCopUnusableException to TriggerException
|
2023-05-18 11:26:36 +09:30 |
|
zilmar
|
456f25eb6b
|
Core: Get DoIntrException to use TriggerException
|
2023-05-18 11:19:26 +09:30 |
|
zilmar
|
252f629e14
|
Core: Convert DoIllegalInstructionException to TriggerException
|
2023-05-18 11:13:22 +09:30 |
|
zilmar
|
59a1277bed
|
Core: Convert GenerateOverflowException to TriggerException
|
2023-05-18 11:05:27 +09:30 |
|
zilmar
|
69fd74ba56
|
Core: Convert DoSysCallException to TriggerException
|
2023-05-18 10:56:06 +09:30 |
|
zilmar
|
17df17805d
|
Core: convert DoTrapException to TriggerException
|
2023-05-18 10:49:58 +09:30 |
|
zilmar
|
74912ca8c2
|
Core: handle jump to unaligned addresses
|
2023-05-18 10:33:57 +09:30 |
|
zilmar
|
6e58edb076
|
Core: Merge CheckFPUException into CheckFPUResult32
|
2023-05-15 23:16:54 +09:30 |
|
zilmar
|
62b29622ca
|
Core: remove usage of fpclassify in CheckFPUInput32 and CheckFPUResult32
|
2023-05-15 22:57:13 +09:30 |
|
zilmar
|
0ddeb6b981
|
Core: remove exception out of R4300iOp::CheckFPUInput32
|
2023-05-15 20:56:56 +09:30 |
|
zilmar
|
fdc637516f
|
Core: remove Double_RoundToInteger64
|
2023-05-09 13:05:58 +09:30 |
|
zilmar
|
5a23f48629
|
Core: remove Double_RoundToInteger32
|
2023-05-09 12:57:08 +09:30 |
|
zilmar
|
e5b1a9469a
|
Core: remove Float_RoundToInteger64
|
2023-05-09 12:50:23 +09:30 |
|
zilmar
|
2c19c2c362
|
Core: Handle CPO1 unimplemented op
|
2023-05-09 11:28:59 +09:30 |
|
zilmar
|
85f4f147a1
|
Core: Remove Float_RoundToInteger32
|
2023-05-09 09:40:10 +09:30 |
|
zilmar
|
49a385e743
|
Core: Split CheckFPUException into CheckFPUException and CheckFPUInvalidException
|
2023-05-09 08:06:15 +09:30 |
|
zilmar
|
fa25b6d2af
|
Core: clear FPU StatusReg cause in CX86RecompilerOps::COP1_S_ADD
|
2023-05-02 11:12:13 +09:30 |