MoveOffsetToX86reg
This commit is contained in:
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068811dc22
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fbc9b80270
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@ -2451,14 +2451,14 @@ void Compile_Vector_VMUDM ( void ) {
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Push(x86_EBP);
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Push(x86_EBP);
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.rd);
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.rd);
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MoveOffsetToX86reg((DWORD)&RSP_Vect[RSPOpC.rd].HW[0], Reg, x86_EBP);
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MoveOffsetToX86reg((size_t)&RSP_Vect[RSPOpC.rd].HW[0], Reg, x86_EBP);
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if (bWriteToDest) {
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if (bWriteToDest) {
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.sa);
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.sa);
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MoveOffsetToX86reg((DWORD)&RSP_Vect[RSPOpC.sa].HW[0], Reg, x86_ECX);
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MoveOffsetToX86reg((size_t)&RSP_Vect[RSPOpC.sa].HW[0], Reg, x86_ECX);
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} else if (!bOptimize) {
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} else if (!bOptimize) {
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.rt);
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.rt);
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MoveOffsetToX86reg((DWORD)&RSP_Vect[RSPOpC.rt].HW[0], Reg, x86_ECX);
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MoveOffsetToX86reg((size_t)&RSP_Vect[RSPOpC.rt].HW[0], Reg, x86_ECX);
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}
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}
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for (count = 0; count < 8; count++) {
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for (count = 0; count < 8; count++) {
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@ -2575,7 +2575,7 @@ void Compile_Vector_VMUDN ( void ) {
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Push(x86_EBP);
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Push(x86_EBP);
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.rd);
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.rd);
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MoveOffsetToX86reg((DWORD)&RSP_Vect[RSPOpC.rd].HW[0], Reg, x86_EBP);
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MoveOffsetToX86reg((size_t)&RSP_Vect[RSPOpC.rd].HW[0], Reg, x86_EBP);
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for (count = 0; count < 8; count++) {
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for (count = 0; count < 8; count++) {
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CPU_Message(" Iteration: %i", count);
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CPU_Message(" Iteration: %i", count);
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@ -2719,7 +2719,7 @@ void Compile_Vector_VMUDH ( void ) {
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*/
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*/
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.rd);
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.rd);
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MoveOffsetToX86reg((DWORD)&RSP_Vect[RSPOpC.rd].HW[0], Reg, x86_EBP);
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MoveOffsetToX86reg((size_t)&RSP_Vect[RSPOpC.rd].HW[0], Reg, x86_EBP);
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MoveSxX86RegPtrDispToX86RegHalf(x86_EBP, 0, x86_EAX);
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MoveSxX86RegPtrDispToX86RegHalf(x86_EBP, 0, x86_EAX);
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MoveSxX86RegPtrDispToX86RegHalf(x86_EBP, 2, x86_ECX);
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MoveSxX86RegPtrDispToX86RegHalf(x86_EBP, 2, x86_ECX);
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@ -2732,7 +2732,7 @@ void Compile_Vector_VMUDH ( void ) {
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ImulX86RegToX86Reg(x86_ESI, x86_EBX);
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ImulX86RegToX86Reg(x86_ESI, x86_EBX);
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XorX86RegToX86Reg(x86_EDX, x86_EDX);
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XorX86RegToX86Reg(x86_EDX, x86_EDX);
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MoveOffsetToX86reg((DWORD)&RSP_ACCUM[0].W[0], "RSP_ACCUM[0].W[0]", x86_EBP);
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MoveOffsetToX86reg((size_t)&RSP_ACCUM[0].W[0], "RSP_ACCUM[0].W[0]", x86_EBP);
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MoveX86RegToX86regPointerDisp(x86_EDX, x86_EBP, 0);
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MoveX86RegToX86regPointerDisp(x86_EDX, x86_EBP, 0);
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MoveX86RegToX86regPointerDisp(x86_EAX, x86_EBP, 4);
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MoveX86RegToX86regPointerDisp(x86_EAX, x86_EBP, 4);
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@ -2748,7 +2748,7 @@ void Compile_Vector_VMUDH ( void ) {
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*/
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*/
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.rd);
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.rd);
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MoveOffsetToX86reg((DWORD)&RSP_Vect[RSPOpC.rd].HW[0], Reg, x86_EBP);
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MoveOffsetToX86reg((size_t)&RSP_Vect[RSPOpC.rd].HW[0], Reg, x86_EBP);
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MoveSxX86RegPtrDispToX86RegHalf(x86_EBP, 8, x86_EAX);
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MoveSxX86RegPtrDispToX86RegHalf(x86_EBP, 8, x86_EAX);
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MoveSxX86RegPtrDispToX86RegHalf(x86_EBP, 10, x86_ECX);
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MoveSxX86RegPtrDispToX86RegHalf(x86_EBP, 10, x86_ECX);
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@ -2761,7 +2761,7 @@ void Compile_Vector_VMUDH ( void ) {
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ImulX86RegToX86Reg(x86_ESI, x86_EBX);
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ImulX86RegToX86Reg(x86_ESI, x86_EBX);
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XorX86RegToX86Reg(x86_EDX, x86_EDX);
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XorX86RegToX86Reg(x86_EDX, x86_EDX);
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MoveOffsetToX86reg((DWORD)&RSP_ACCUM[0].W[0], "RSP_ACCUM[0].W[0]", x86_EBP);
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MoveOffsetToX86reg((size_t)&RSP_ACCUM[0].W[0], "RSP_ACCUM[0].W[0]", x86_EBP);
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MoveX86RegToX86regPointerDisp(x86_EDX, x86_EBP, 32);
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MoveX86RegToX86regPointerDisp(x86_EDX, x86_EBP, 32);
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MoveX86RegToX86regPointerDisp(x86_EAX, x86_EBP, 36);
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MoveX86RegToX86regPointerDisp(x86_EAX, x86_EBP, 36);
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@ -2987,14 +2987,14 @@ void Compile_Vector_VMADM ( void ) {
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Push(x86_EBP);
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Push(x86_EBP);
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.rd);
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.rd);
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MoveOffsetToX86reg((DWORD)&RSP_Vect[RSPOpC.rd].HW[0], Reg, x86_EBP);
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MoveOffsetToX86reg((size_t)&RSP_Vect[RSPOpC.rd].HW[0], Reg, x86_EBP);
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if (bWriteToDest) {
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if (bWriteToDest) {
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.sa);
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.sa);
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MoveOffsetToX86reg((DWORD)&RSP_Vect[RSPOpC.sa].HW[0], Reg, x86_ECX);
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MoveOffsetToX86reg((size_t)&RSP_Vect[RSPOpC.sa].HW[0], Reg, x86_ECX);
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} else if (!bOptimize) {
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} else if (!bOptimize) {
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.rt);
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.rt);
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MoveOffsetToX86reg((DWORD)&RSP_Vect[RSPOpC.rt].HW[0], Reg, x86_ECX);
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MoveOffsetToX86reg((size_t)&RSP_Vect[RSPOpC.rt].HW[0], Reg, x86_ECX);
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}
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}
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for (count = 0; count < 8; count++) {
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for (count = 0; count < 8; count++) {
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@ -3070,7 +3070,7 @@ void Compile_Vector_VMADN ( void ) {
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Push(x86_EBP);
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Push(x86_EBP);
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.rd);
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.rd);
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MoveOffsetToX86reg((DWORD)&RSP_Vect[RSPOpC.rd].HW[0], Reg, x86_EBP);
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MoveOffsetToX86reg((size_t)&RSP_Vect[RSPOpC.rd].HW[0], Reg, x86_EBP);
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for (count = 0; count < 8; count++) {
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for (count = 0; count < 8; count++) {
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CPU_Message(" Iteration: %i", count);
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CPU_Message(" Iteration: %i", count);
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@ -3146,7 +3146,7 @@ void Compile_Vector_VMADH ( void ) {
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if (bWriteToDest == FALSE && bOptimize == TRUE) {
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if (bWriteToDest == FALSE && bOptimize == TRUE) {
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Push(x86_EBP);
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Push(x86_EBP);
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.rd);
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.rd);
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MoveOffsetToX86reg((DWORD)&RSP_Vect[RSPOpC.rd].HW[0], Reg, x86_EBP);
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MoveOffsetToX86reg((size_t)&RSP_Vect[RSPOpC.rd].HW[0], Reg, x86_EBP);
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/*
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/*
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* Pipe lined segment 0
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* Pipe lined segment 0
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@ -3196,14 +3196,14 @@ void Compile_Vector_VMADH ( void ) {
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} else {
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} else {
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Push(x86_EBP);
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Push(x86_EBP);
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.rd);
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.rd);
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MoveOffsetToX86reg((DWORD)&RSP_Vect[RSPOpC.rd].HW[0], Reg, x86_EBP);
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MoveOffsetToX86reg((size_t)&RSP_Vect[RSPOpC.rd].HW[0], Reg, x86_EBP);
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if (bWriteToDest) {
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if (bWriteToDest) {
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.sa);
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.sa);
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MoveOffsetToX86reg((DWORD)&RSP_Vect[RSPOpC.sa].HW[0], Reg, x86_ECX);
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MoveOffsetToX86reg((size_t)&RSP_Vect[RSPOpC.sa].HW[0], Reg, x86_ECX);
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} else if (!bOptimize) {
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} else if (!bOptimize) {
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.rt);
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.rt);
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MoveOffsetToX86reg((DWORD)&RSP_Vect[RSPOpC.rt].HW[0], Reg, x86_ECX);
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MoveOffsetToX86reg((size_t)&RSP_Vect[RSPOpC.rt].HW[0], Reg, x86_ECX);
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}
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}
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for (count = 0; count < 8; count++) {
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for (count = 0; count < 8; count++) {
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@ -3686,7 +3686,7 @@ void Compile_Vector_VADDC ( void ) {
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Push(x86_EBP);
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Push(x86_EBP);
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.rd);
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sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.rd);
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MoveOffsetToX86reg((DWORD)&RSP_Vect[RSPOpC.rd].HW[0], Reg, x86_EBP);
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MoveOffsetToX86reg((size_t)&RSP_Vect[RSPOpC.rd].HW[0], Reg, x86_EBP);
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for (count = 0; count < 8; count++) {
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for (count = 0; count < 8; count++) {
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CPU_Message(" Iteration: %i", count);
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CPU_Message(" Iteration: %i", count);
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@ -5251,7 +5251,7 @@ void Compile_Opcode_LDV ( void ) {
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CPU_Message(" Unaligned:");
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CPU_Message(" Unaligned:");
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x86_SetBranch32b(Jump[0], RecompPos);
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x86_SetBranch32b(Jump[0], RecompPos);
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sprintf(Reg, "RSP_Vect[%i].UB[%i]", RSPOpC.rt, 15 - RSPOpC.del);
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sprintf(Reg, "RSP_Vect[%i].UB[%i]", RSPOpC.rt, 15 - RSPOpC.del);
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MoveOffsetToX86reg((DWORD)&RSP_Vect[RSPOpC.rt].UB[15 - RSPOpC.del], Reg, x86_EDI);
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MoveOffsetToX86reg((size_t)&RSP_Vect[RSPOpC.rt].UB[15 - RSPOpC.del], Reg, x86_EDI);
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length = 8;
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length = 8;
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if (RSPOpC.del == 12){
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if (RSPOpC.del == 12){
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length = 4;
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length = 4;
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@ -5993,7 +5993,7 @@ void Compile_Opcode_SDV ( void ) {
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x86_SetBranch32b((DWORD*)Jump[0], (DWORD*)RecompPos);
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x86_SetBranch32b((DWORD*)Jump[0], (DWORD*)RecompPos);
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sprintf(Reg, "RSP_Vect[%i].UB[%i]", RSPOpC.rt, 15 - RSPOpC.del);
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sprintf(Reg, "RSP_Vect[%i].UB[%i]", RSPOpC.rt, 15 - RSPOpC.del);
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MoveOffsetToX86reg((DWORD)&RSP_Vect[RSPOpC.rt].UB[15 - RSPOpC.del], Reg, x86_EDI);
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MoveOffsetToX86reg((size_t)&RSP_Vect[RSPOpC.rt].UB[15 - RSPOpC.del], Reg, x86_EDI);
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MoveConstToX86reg(8, x86_ECX);
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MoveConstToX86reg(8, x86_ECX);
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CPU_Message(" Loop:");
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CPU_Message(" Loop:");
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@ -1178,7 +1178,7 @@ void MoveConstToX86reg(DWORD Const, int x86reg) {
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PUTDST32(RecompPos,Const);
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PUTDST32(RecompPos,Const);
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}
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}
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void MoveOffsetToX86reg(DWORD Const, char * VariableName, int x86reg) {
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void MoveOffsetToX86reg(size_t Const, char * VariableName, int x86reg) {
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CPU_Message(" mov %s, offset %s",x86_Name(x86reg),VariableName);
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CPU_Message(" mov %s, offset %s",x86_Name(x86reg),VariableName);
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switch (x86reg) {
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switch (x86reg) {
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case x86_EAX: PUTDST16(RecompPos,0xC0C7); break;
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case x86_EAX: PUTDST16(RecompPos,0xC0C7); break;
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@ -114,7 +114,7 @@ void MoveConstToN64Mem ( DWORD Const, int AddrReg );
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void MoveConstToN64MemDisp ( DWORD Const, int AddrReg, BYTE Disp );
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void MoveConstToN64MemDisp ( DWORD Const, int AddrReg, BYTE Disp );
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void MoveConstToVariable ( DWORD Const, void *Variable, char *VariableName );
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void MoveConstToVariable ( DWORD Const, void *Variable, char *VariableName );
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void MoveConstToX86reg ( DWORD Const, int x86reg );
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void MoveConstToX86reg ( DWORD Const, int x86reg );
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void MoveOffsetToX86reg ( DWORD Const, char * VariableName, int x86reg );
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void MoveOffsetToX86reg ( size_t Const, char * VariableName, int x86reg );
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void MoveX86regByteToX86regPointer ( int Source, int AddrReg );
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void MoveX86regByteToX86regPointer ( int Source, int AddrReg );
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void MoveX86regHalfToX86regPointer ( int Source, int AddrReg );
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void MoveX86regHalfToX86regPointer ( int Source, int AddrReg );
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void MoveX86regHalfToX86regPointerDisp ( int Source, int AddrReg, BYTE Disp);
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void MoveX86regHalfToX86regPointerDisp ( int Source, int AddrReg, BYTE Disp);
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