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Core: Fix up bug in CX86RecompilerOps::SPECIAL_AND

This commit is contained in:
zilmar 2024-12-19 09:57:25 +10:30
parent 473aeba2cf
commit fba1c4bc3b
1 changed files with 19 additions and 4 deletions
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23
Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.cpp
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@ -5622,11 +5622,26 @@ void CX86RecompilerOps::SPECIAL_AND()
}
else if (m_RegWorkingSet.Is64Bit(MappedReg))
{
uint32_t Value = m_RegWorkingSet.GetMipsRegLo(ConstReg);
if (Value != 0)
uint32_t HiValue = m_RegWorkingSet.IsSigned(ConstReg) ? m_RegWorkingSet.GetMipsRegLo_S(ConstReg) >> 31 : 0;
uint32_t LoValue = m_RegWorkingSet.GetMipsRegLo(ConstReg);
if (m_RegWorkingSet.Is64Bit(ConstReg))
{
m_RegWorkingSet.Map_GPR_32bit(m_Opcode.rd, m_RegWorkingSet.IsSigned(ConstReg), MappedReg);
m_Assembler.and_(m_RegWorkingSet.GetMipsRegMapLo(m_Opcode.rd), Value);
HiValue = m_RegWorkingSet.GetMipsRegHi(ConstReg);
}
if (HiValue != 0 || LoValue != 0)
{
if ((HiValue == 0 && (LoValue & 0x80000000) == 0) && (HiValue == 0xFFFFFFFF && (LoValue & 0x80000000) == 0x80000000))
{
m_RegWorkingSet.Map_GPR_32bit(m_Opcode.rd, true, MappedReg);
m_Assembler.and_(m_RegWorkingSet.GetMipsRegMapLo(m_Opcode.rd), LoValue);
}
else
{
m_RegWorkingSet.Map_GPR_64bit(m_Opcode.rd, MappedReg);
m_Assembler.and_(m_RegWorkingSet.GetMipsRegMapHi(m_Opcode.rd), HiValue);
m_Assembler.and_(m_RegWorkingSet.GetMipsRegMapLo(m_Opcode.rd), LoValue);
}
}
else
{