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RSP: Create CRSPRegisters

This commit is contained in:
zilmar 2024-08-08 07:26:15 +09:30
parent 1924030266
commit f7ab608976
13 changed files with 1774 additions and 1683 deletions
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3
Source/Project64-rsp-core/RSPInfo.cpp
View File

@ -8,6 +8,7 @@
#include <Project64-rsp-core/cpu/RSPRegisters.h>
#include <Project64-rsp-core/cpu/RspLog.h>
#include <Project64-rsp-core/cpu/RspMemory.h>
#include <Project64-rsp-core/cpu/RspSystem.h>
#include <Settings/Settings.h>
#if defined(_MSC_VER)
@ -122,7 +123,7 @@ void InitilizeRSP(RSP_INFO & Rsp_Info)
GraphicsHle = Set_GraphicsHle != 0 ? GetSystemSetting(Set_GraphicsHle) != 0 : true;
AllocateMemory();
InitilizeRSPRegisters();
RSPSystem.Reset();
Build_RSP();
#ifdef GenerateLog
Start_Log();

2
Source/Project64-rsp-core/Recompiler/RspRecompilerCPU.cpp
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@ -855,7 +855,7 @@ void CompilerRSPBlock(void)
if (Compiler.bSections)
{
if (RSP_DoSections())
if (RecompilerOps.RSP_DoSections())
{
continue;
}

1
Source/Project64-rsp-core/Recompiler/RspRecompilerCPU.h
View File

@ -39,7 +39,6 @@ void BuildRecompilerCPU(void);
void CompilerRSPBlock(void);
void CompilerToggleBuffer(void);
bool RSP_DoSections(void);
typedef struct
{

2159
Source/Project64-rsp-core/Recompiler/RspRecompilerOps.cpp
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File diff suppressed because it is too large Load Diff

46
Source/Project64-rsp-core/Recompiler/RspRecompilerOps.h
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@ -1,6 +1,8 @@
// Opcode functions
#include <Project64-rsp-core/cpu/RSPInterpreterOps.h>
class CRSPSystem;
class CRSPRegisters;
class CRSPRecompilerOps
{
@ -158,9 +160,53 @@ public:
// Other functions
void UnknownOpcode(void);
bool RSP_DoSections(void);
private:
void Cheat_r4300iOpcode(RSPOp::Func FunctAddress, const char * FunctName);
void Cheat_r4300iOpcodeNoMessage(RSPOp::Func FunctAddress, const char * FunctName);
void RSP_Element2Mmx(int MmxReg);
void RSP_MultiElement2Mmx(int MmxReg1, int MmxReg2);
bool Compile_Vector_VMULF_MMX(void);
bool Compile_Vector_VMUDL_MMX(void);
bool Compile_Vector_VMUDM_MMX(void);
bool Compile_Vector_VMUDN_MMX(void);
bool Compile_Vector_VMUDH_MMX(void);
bool Compile_Vector_VADD_MMX(void);
bool Compile_Vector_VSUB_MMX(void);
bool Compile_Vector_VABS_MMX(void);
bool Compile_Vector_VGE_MMX(void);
bool Compile_Vector_VAND_MMX(void);
bool Compile_Vector_VNAND_MMX(void);
bool Compile_Vector_VOR_MMX(void);
bool Compile_Vector_VNOR_MMX(void);
bool Compile_Vector_VXOR_MMX(void);
bool Compile_Vector_VNXOR_MMX(void);
void RSP_Sections_VMUDH(RSPOpcode RspOp, uint32_t AccumStyle);
void RSP_Sections_VMADH(RSPOpcode RspOp, uint32_t AccumStyle);
void RSP_Sections_VMUDL(RSPOpcode RspOp, uint32_t AccumStyle);
void RSP_Sections_VMUDN(RSPOpcode RspOp, uint32_t AccumStyle);
void RSP_Sections_VMADN(RSPOpcode RspOp, uint32_t AccumStyle);
void RSP_Sections_VMULF(RSPOpcode RspOp, uint32_t AccumStyle);
void RSP_Sections_VMACF(RSPOpcode RspOp, uint32_t AccumStyle);
bool Check_Section_000(void);
bool Check_Section_001(void);
bool Check_Section_002(void);
bool Check_Section_003(void);
void Compile_Section_000(void);
void Compile_Section_001(void);
void Compile_Section_002(void);
void Compile_Section_003(void);
void resampler_hle();
CRSPSystem & m_System;
CRSPRegisters & m_Reg;
UWORD32 * m_GPR;
UDWORD * m_ACCUM;
UWORD32 * m_Flags;
RSPVector * m_Vect;
};
typedef void (CRSPRecompilerOps::*p_Recompfunc)(void);

252
Source/Project64-rsp-core/Recompiler/RspRecompilerSections.cpp
View File

@ -1,5 +1,6 @@
#include "RspRecompilerCPU.h"
#include "X86.h"
#include <Project64-rsp-core/Recompiler/RspRecompilerOps.h>
#include <Project64-rsp-core/cpu/RSPCpu.h>
#include <Project64-rsp-core/cpu/RSPInstruction.h>
#include <Project64-rsp-core/cpu/RSPRegisters.h>
@ -9,7 +10,7 @@
#pragma warning(disable : 4152) // Non-standard extension, function/data pointer conversion in expression
void RSP_Sections_VMUDH(RSPOpcode RspOp, uint32_t AccumStyle)
void CRSPRecompilerOps::RSP_Sections_VMUDH(RSPOpcode RspOp, uint32_t AccumStyle)
{
char Reg[256];
@ -25,18 +26,18 @@ void RSP_Sections_VMUDH(RSPOpcode RspOp, uint32_t AccumStyle)
RSPOpC = RspOp;
// Load source registers
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM0, &RSP_Vect[RspOp.rd].s16(0), Reg);
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM1, &RSP_Vect[RspOp.rd].s16(4), Reg);
sprintf(Reg, "m_Vect[%i].HW[0]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM0, &m_Vect[RspOp.rd].s16(0), Reg);
sprintf(Reg, "m_Vect[%i].HW[4]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM1, &m_Vect[RspOp.rd].s16(4), Reg);
// VMUDH
if ((RspOp.rs & 0x0f) < 2)
{
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rt);
MmxMoveQwordVariableToReg(x86_MM2, &RSP_Vect[RspOp.rt].s16(0), Reg);
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rt);
MmxMoveQwordVariableToReg(x86_MM3, &RSP_Vect[RspOp.rt].s16(4), Reg);
sprintf(Reg, "m_Vect[%i].HW[0]", RspOp.rt);
MmxMoveQwordVariableToReg(x86_MM2, &m_Vect[RspOp.rt].s16(0), Reg);
sprintf(Reg, "m_Vect[%i].HW[4]", RspOp.rt);
MmxMoveQwordVariableToReg(x86_MM3, &m_Vect[RspOp.rt].s16(4), Reg);
if (AccumStyle == Middle16BitAccum)
{
@ -79,7 +80,7 @@ void RSP_Sections_VMUDH(RSPOpcode RspOp, uint32_t AccumStyle)
}
}
void RSP_Sections_VMADH(RSPOpcode RspOp, uint32_t AccumStyle)
void CRSPRecompilerOps::RSP_Sections_VMADH(RSPOpcode RspOp, uint32_t AccumStyle)
{
char Reg[256];
@ -93,18 +94,18 @@ void RSP_Sections_VMADH(RSPOpcode RspOp, uint32_t AccumStyle)
RSPOpC = RspOp;
// Load source registers
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM0 + 2, &RSP_Vect[RspOp.rd].s16(0), Reg);
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM1 + 2, &RSP_Vect[RspOp.rd].s16(4), Reg);
sprintf(Reg, "m_Vect[%i].HW[0]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM0 + 2, &m_Vect[RspOp.rd].s16(0), Reg);
sprintf(Reg, "m_Vect[%i].HW[4]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM1 + 2, &m_Vect[RspOp.rd].s16(4), Reg);
// VMUDH
if ((RspOp.rs & 0x0f) < 2)
{
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rt);
MmxMoveQwordVariableToReg(x86_MM2 + 2, &RSP_Vect[RspOp.rt].s16(0), Reg);
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rt);
MmxMoveQwordVariableToReg(x86_MM3 + 2, &RSP_Vect[RspOp.rt].s16(4), Reg);
sprintf(Reg, "m_Vect[%i].HW[0]", RspOp.rt);
MmxMoveQwordVariableToReg(x86_MM2 + 2, &m_Vect[RspOp.rt].s16(0), Reg);
sprintf(Reg, "m_Vect[%i].HW[4]", RspOp.rt);
MmxMoveQwordVariableToReg(x86_MM3 + 2, &m_Vect[RspOp.rt].s16(4), Reg);
if (AccumStyle == Middle16BitAccum)
{
@ -150,7 +151,7 @@ void RSP_Sections_VMADH(RSPOpcode RspOp, uint32_t AccumStyle)
MmxPaddswRegToReg(x86_MM1, x86_MM1 + 2);
}
void RSP_Sections_VMUDL(RSPOpcode RspOp, uint32_t AccumStyle)
void CRSPRecompilerOps::RSP_Sections_VMUDL(RSPOpcode RspOp, uint32_t AccumStyle)
{
char Reg[256];
@ -166,18 +167,18 @@ void RSP_Sections_VMUDL(RSPOpcode RspOp, uint32_t AccumStyle)
RSPOpC = RspOp;
// Load source registers
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM0, &RSP_Vect[RspOp.rd].s16(0), Reg);
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM1, &RSP_Vect[RspOp.rd].s16(4), Reg);
sprintf(Reg, "m_Vect[%i].HW[0]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM0, &m_Vect[RspOp.rd].s16(0), Reg);
sprintf(Reg, "m_Vect[%i].HW[4]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM1, &m_Vect[RspOp.rd].s16(4), Reg);
// VMUDL
if ((RspOp.rs & 0x0f) < 2)
{
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rt);
MmxMoveQwordVariableToReg(x86_MM2, &RSP_Vect[RspOp.rt].s16(0), Reg);
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rt);
MmxMoveQwordVariableToReg(x86_MM3, &RSP_Vect[RspOp.rt].s16(4), Reg);
sprintf(Reg, "m_Vect[%i].HW[0]", RspOp.rt);
MmxMoveQwordVariableToReg(x86_MM2, &m_Vect[RspOp.rt].s16(0), Reg);
sprintf(Reg, "m_Vect[%i].HW[4]", RspOp.rt);
MmxMoveQwordVariableToReg(x86_MM3, &m_Vect[RspOp.rt].s16(4), Reg);
MmxPmullwRegToReg(x86_MM0, x86_MM2);
MmxPmullwRegToReg(x86_MM1, x86_MM3);
@ -196,7 +197,7 @@ void RSP_Sections_VMUDL(RSPOpcode RspOp, uint32_t AccumStyle)
}
}
void RSP_Sections_VMUDN(RSPOpcode RspOp, uint32_t AccumStyle)
void CRSPRecompilerOps::RSP_Sections_VMUDN(RSPOpcode RspOp, uint32_t AccumStyle)
{
char Reg[256];
@ -216,17 +217,17 @@ void RSP_Sections_VMUDN(RSPOpcode RspOp, uint32_t AccumStyle)
{
// Load source registers
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM0, &RSP_Vect[RspOp.rd].s16(0), Reg);
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM1, &RSP_Vect[RspOp.rd].s16(4), Reg);
sprintf(Reg, "m_Vect[%i].HW[0]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM0, &m_Vect[RspOp.rd].s16(0), Reg);
sprintf(Reg, "m_Vect[%i].HW[4]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM1, &m_Vect[RspOp.rd].s16(4), Reg);
if ((RspOp.rs & 0x0f) < 2)
{
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rt);
MmxMoveQwordVariableToReg(x86_MM2, &RSP_Vect[RspOp.rt].s16(0), Reg);
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rt);
MmxMoveQwordVariableToReg(x86_MM3, &RSP_Vect[RspOp.rt].s16(4), Reg);
sprintf(Reg, "m_Vect[%i].HW[0]", RspOp.rt);
MmxMoveQwordVariableToReg(x86_MM2, &m_Vect[RspOp.rt].s16(0), Reg);
sprintf(Reg, "m_Vect[%i].HW[4]", RspOp.rt);
MmxMoveQwordVariableToReg(x86_MM3, &m_Vect[RspOp.rt].s16(4), Reg);
MmxPmullwRegToReg(x86_MM0, x86_MM2);
MmxPmullwRegToReg(x86_MM1, x86_MM3);
@ -253,17 +254,17 @@ void RSP_Sections_VMUDN(RSPOpcode RspOp, uint32_t AccumStyle)
// just the MMX registers are swapped, this is easier
// Load source registers
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM4, &RSP_Vect[RspOp.rd].s16(0), Reg);
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM5, &RSP_Vect[RspOp.rd].s16(4), Reg);
sprintf(Reg, "m_Vect[%i].HW[0]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM4, &m_Vect[RspOp.rd].s16(0), Reg);
sprintf(Reg, "m_Vect[%i].HW[4]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM5, &m_Vect[RspOp.rd].s16(4), Reg);
if ((RSPOpC.rs & 0xF) < 2)
{
sprintf(Reg, "RSP_Vect[%i].UHW[0]", RSPOpC.rt);
MmxMoveQwordVariableToReg(x86_MM0, &RSP_Vect[RSPOpC.vt].u16(0), Reg);
sprintf(Reg, "RSP_Vect[%i].UHW[4]", RSPOpC.rt);
MmxMoveQwordVariableToReg(x86_MM1, &RSP_Vect[RSPOpC.vt].u16(4), Reg);
sprintf(Reg, "m_Vect[%i].UHW[0]", RSPOpC.rt);
MmxMoveQwordVariableToReg(x86_MM0, &m_Vect[RSPOpC.vt].u16(0), Reg);
sprintf(Reg, "m_Vect[%i].UHW[4]", RSPOpC.rt);
MmxMoveQwordVariableToReg(x86_MM1, &m_Vect[RSPOpC.vt].u16(4), Reg);
}
else if ((RSPOpC.rs & 0xF) >= 8)
{
@ -295,7 +296,7 @@ void RSP_Sections_VMUDN(RSPOpcode RspOp, uint32_t AccumStyle)
}
}
void RSP_Sections_VMADN(RSPOpcode RspOp, uint32_t AccumStyle)
void CRSPRecompilerOps::RSP_Sections_VMADN(RSPOpcode RspOp, uint32_t AccumStyle)
{
char Reg[256];
@ -312,17 +313,17 @@ void RSP_Sections_VMADN(RSPOpcode RspOp, uint32_t AccumStyle)
if (AccumStyle != Middle16BitAccum)
{
// Load source registers
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM0 + 2, &RSP_Vect[RspOp.rd].s16(0), Reg);
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM1 + 2, &RSP_Vect[RspOp.rd].s16(4), Reg);
sprintf(Reg, "m_Vect[%i].HW[0]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM0 + 2, &m_Vect[RspOp.rd].s16(0), Reg);
sprintf(Reg, "m_Vect[%i].HW[4]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM1 + 2, &m_Vect[RspOp.rd].s16(4), Reg);
if ((RspOp.rs & 0x0f) < 2)
{
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rt);
MmxMoveQwordVariableToReg(x86_MM2 + 2, &RSP_Vect[RspOp.rt].s16(0), Reg);
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rt);
MmxMoveQwordVariableToReg(x86_MM3 + 2, &RSP_Vect[RspOp.rt].s16(4), Reg);
sprintf(Reg, "m_Vect[%i].HW[0]", RspOp.rt);
MmxMoveQwordVariableToReg(x86_MM2 + 2, &m_Vect[RspOp.rt].s16(0), Reg);
sprintf(Reg, "m_Vect[%i].HW[4]", RspOp.rt);
MmxMoveQwordVariableToReg(x86_MM3 + 2, &m_Vect[RspOp.rt].s16(4), Reg);
MmxPmullwRegToReg(x86_MM0 + 2, x86_MM2 + 2);
MmxPmullwRegToReg(x86_MM1 + 2, x86_MM3 + 2);
@ -349,17 +350,17 @@ void RSP_Sections_VMADN(RSPOpcode RspOp, uint32_t AccumStyle)
// just the MMX registers are swapped, this is easier
// Load source registers
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM4 + 2, &RSP_Vect[RspOp.rd].s16(0), Reg);
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM5 + 2, &RSP_Vect[RspOp.rd].s16(4), Reg);
sprintf(Reg, "m_Vect[%i].HW[0]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM4 + 2, &m_Vect[RspOp.rd].s16(0), Reg);
sprintf(Reg, "m_Vect[%i].HW[4]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM5 + 2, &m_Vect[RspOp.rd].s16(4), Reg);
if ((RSPOpC.rs & 0xF) < 2)
{
sprintf(Reg, "RSP_Vect[%i].UHW[0]", RSPOpC.rt);
MmxMoveQwordVariableToReg(x86_MM0 + 2, &RSP_Vect[RSPOpC.vt].u16(0), Reg);
sprintf(Reg, "RSP_Vect[%i].UHW[4]", RSPOpC.rt);
MmxMoveQwordVariableToReg(x86_MM1 + 2, &RSP_Vect[RSPOpC.vt].u16(4), Reg);
sprintf(Reg, "m_Vect[%i].UHW[0]", RSPOpC.rt);
MmxMoveQwordVariableToReg(x86_MM0 + 2, &m_Vect[RSPOpC.vt].u16(0), Reg);
sprintf(Reg, "m_Vect[%i].UHW[4]", RSPOpC.rt);
MmxMoveQwordVariableToReg(x86_MM1 + 2, &m_Vect[RSPOpC.vt].u16(4), Reg);
}
else if ((RSPOpC.rs & 0xF) >= 8)
{
@ -397,7 +398,7 @@ void RSP_Sections_VMADN(RSPOpcode RspOp, uint32_t AccumStyle)
MmxPaddswRegToReg(x86_MM1, x86_MM1 + 2);
}
void RSP_Sections_VMULF(RSPOpcode RspOp, uint32_t AccumStyle)
void CRSPRecompilerOps::RSP_Sections_VMULF(RSPOpcode RspOp, uint32_t AccumStyle)
{
char Reg[256];
@ -413,18 +414,18 @@ void RSP_Sections_VMULF(RSPOpcode RspOp, uint32_t AccumStyle)
RSPOpC = RspOp;
// Load source registers
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM0, &RSP_Vect[RspOp.rd].s16(0), Reg);
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM1, &RSP_Vect[RspOp.rd].s16(4), Reg);
sprintf(Reg, "m_Vect[%i].HW[0]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM0, &m_Vect[RspOp.rd].s16(0), Reg);
sprintf(Reg, "m_Vect[%i].HW[4]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM1, &m_Vect[RspOp.rd].s16(4), Reg);
// VMULF
if ((RspOp.rs & 0x0f) < 2)
{
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rt);
MmxMoveQwordVariableToReg(x86_MM2, &RSP_Vect[RspOp.rt].s16(0), Reg);
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rt);
MmxMoveQwordVariableToReg(x86_MM3, &RSP_Vect[RspOp.rt].s16(4), Reg);
sprintf(Reg, "m_Vect[%i].HW[0]", RspOp.rt);
MmxMoveQwordVariableToReg(x86_MM2, &m_Vect[RspOp.rt].s16(0), Reg);
sprintf(Reg, "m_Vect[%i].HW[4]", RspOp.rt);
MmxMoveQwordVariableToReg(x86_MM3, &m_Vect[RspOp.rt].s16(4), Reg);
if (AccumStyle != Middle16BitAccum)
{
@ -470,7 +471,7 @@ void RSP_Sections_VMULF(RSPOpcode RspOp, uint32_t AccumStyle)
MmxPsllwImmed(x86_MM1, 1);
}
void RSP_Sections_VMACF(RSPOpcode RspOp, uint32_t AccumStyle)
void CRSPRecompilerOps::RSP_Sections_VMACF(RSPOpcode RspOp, uint32_t AccumStyle)
{
char Reg[256];
@ -484,18 +485,18 @@ void RSP_Sections_VMACF(RSPOpcode RspOp, uint32_t AccumStyle)
RSPOpC = RspOp;
// Load source registers
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM0 + 2, &RSP_Vect[RspOp.rd].s16(0), Reg);
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM1 + 2, &RSP_Vect[RspOp.rd].s16(4), Reg);
sprintf(Reg, "m_Vect[%i].HW[0]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM0 + 2, &m_Vect[RspOp.rd].s16(0), Reg);
sprintf(Reg, "m_Vect[%i].HW[4]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM1 + 2, &m_Vect[RspOp.rd].s16(4), Reg);
// VMACF
if ((RspOp.rs & 0x0f) < 2)
{
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rt);
MmxMoveQwordVariableToReg(x86_MM2 + 2, &RSP_Vect[RspOp.rt].s16(0), Reg);
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rt);
MmxMoveQwordVariableToReg(x86_MM3 + 2, &RSP_Vect[RspOp.rt].s16(4), Reg);
sprintf(Reg, "m_Vect[%i].HW[0]", RspOp.rt);
MmxMoveQwordVariableToReg(x86_MM2 + 2, &m_Vect[RspOp.rt].s16(0), Reg);
sprintf(Reg, "m_Vect[%i].HW[4]", RspOp.rt);
MmxMoveQwordVariableToReg(x86_MM3 + 2, &m_Vect[RspOp.rt].s16(4), Reg);
if (AccumStyle != Middle16BitAccum)
{
@ -547,7 +548,7 @@ void RSP_Sections_VMACF(RSPOpcode RspOp, uint32_t AccumStyle)
static uint32_t Section_000_VMADN; // Yeah I know, but leave it
bool Check_Section_000(void)
bool CRSPRecompilerOps::Check_Section_000(void)
{
uint32_t i;
RSPOpcode op0, op1;
@ -601,7 +602,7 @@ bool Check_Section_000(void)
return true;
}
void Compile_Section_000(void)
void CRSPRecompilerOps::Compile_Section_000(void)
{
char Reg[256];
RSPOpcode vmudn, vmadn = {0};
@ -645,24 +646,24 @@ void Compile_Section_000(void)
RSP_Sections_VMADN(vmadn, Low16BitAccum);
if (WriteToVectorDest(vmadn.sa, CompilePC - 4) == true)
{
sprintf(Reg, "RSP_Vect[%i].HW[0]", vmadn.sa);
MmxMoveQwordRegToVariable(x86_MM0, &RSP_Vect[vmadn.sa].s16(0), Reg);
sprintf(Reg, "RSP_Vect[%i].HW[4]", vmadn.sa);
MmxMoveQwordRegToVariable(x86_MM1, &RSP_Vect[vmadn.sa].s16(4), Reg);
sprintf(Reg, "m_Vect[%i].HW[0]", vmadn.sa);
MmxMoveQwordRegToVariable(x86_MM0, &m_Vect[vmadn.sa].s16(0), Reg);
sprintf(Reg, "m_Vect[%i].HW[4]", vmadn.sa);
MmxMoveQwordRegToVariable(x86_MM1, &m_Vect[vmadn.sa].s16(4), Reg);
}
}
sprintf(Reg, "RSP_Vect[%i].HW[0]", vmadn.sa);
MmxMoveQwordRegToVariable(x86_MM0, &RSP_Vect[vmadn.sa].s16(0), Reg);
sprintf(Reg, "RSP_Vect[%i].HW[4]", vmadn.sa);
MmxMoveQwordRegToVariable(x86_MM1, &RSP_Vect[vmadn.sa].s16(4), Reg);
sprintf(Reg, "m_Vect[%i].HW[0]", vmadn.sa);
MmxMoveQwordRegToVariable(x86_MM0, &m_Vect[vmadn.sa].s16(0), Reg);
sprintf(Reg, "m_Vect[%i].HW[4]", vmadn.sa);
MmxMoveQwordRegToVariable(x86_MM1, &m_Vect[vmadn.sa].s16(4), Reg);
MmxEmptyMultimediaState();
}
static uint32_t Section_001_VMACF;
bool Check_Section_001(void)
bool CRSPRecompilerOps::Check_Section_001(void)
{
uint32_t i;
RSPOpcode op0, op1;
@ -718,7 +719,7 @@ bool Check_Section_001(void)
return true;
}
void Compile_Section_001(void)
void CRSPRecompilerOps::Compile_Section_001(void)
{
uint32_t i;
char Reg[256];
@ -739,10 +740,10 @@ void Compile_Section_001(void)
if (WriteToVectorDest(vmulf.sa, CompilePC) == true)
{
sprintf(Reg, "RSP_Vect[%i].HW[0]", vmulf.sa);
MmxMoveQwordRegToVariable(x86_MM0, &RSP_Vect[vmulf.sa].s16(0), Reg);
sprintf(Reg, "RSP_Vect[%i].HW[4]", vmulf.sa);
MmxMoveQwordRegToVariable(x86_MM1, &RSP_Vect[vmulf.sa].s16(4), Reg);
sprintf(Reg, "m_Vect[%i].HW[0]", vmulf.sa);
MmxMoveQwordRegToVariable(x86_MM0, &m_Vect[vmulf.sa].s16(0), Reg);
sprintf(Reg, "m_Vect[%i].HW[4]", vmulf.sa);
MmxMoveQwordRegToVariable(x86_MM1, &m_Vect[vmulf.sa].s16(4), Reg);
}
CompilePC += 4;
@ -754,17 +755,17 @@ void Compile_Section_001(void)
RSP_Sections_VMACF(vmacf, Middle16BitAccum);
if (WriteToVectorDest(vmacf.sa, CompilePC - 4) == true)
{
sprintf(Reg, "RSP_Vect[%i].HW[0]", vmacf.sa);
MmxMoveQwordRegToVariable(x86_MM0, &RSP_Vect[vmacf.sa].s16(0), Reg);
sprintf(Reg, "RSP_Vect[%i].HW[4]", vmacf.sa);
MmxMoveQwordRegToVariable(x86_MM1, &RSP_Vect[vmacf.sa].s16(4), Reg);
sprintf(Reg, "m_Vect[%i].HW[0]", vmacf.sa);
MmxMoveQwordRegToVariable(x86_MM0, &m_Vect[vmacf.sa].s16(0), Reg);
sprintf(Reg, "m_Vect[%i].HW[4]", vmacf.sa);
MmxMoveQwordRegToVariable(x86_MM1, &m_Vect[vmacf.sa].s16(4), Reg);
}
}
MmxEmptyMultimediaState();
}
bool Check_Section_002(void)
bool CRSPRecompilerOps::Check_Section_002(void)
{
uint32_t Count;
RSPOpcode op[0x0C];
@ -834,7 +835,7 @@ bool Check_Section_002(void)
return true;
}
void Compile_Section_002(void)
void CRSPRecompilerOps::Compile_Section_002(void)
{
char Reg[256];
@ -870,23 +871,23 @@ void Compile_Section_002(void)
// VSAWs
vsaw = op[10];
MmxXorRegToReg(x86_MM4, x86_MM4);
sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.sa);
MmxMoveQwordRegToVariable(x86_MM4, &RSP_Vect[vsaw.sa].s16(0), Reg);
sprintf(Reg, "RSP_Vect[%i].HW[4]", RSPOpC.sa);
MmxMoveQwordRegToVariable(x86_MM4, &RSP_Vect[vsaw.sa].s16(4), Reg);
sprintf(Reg, "m_Vect[%i].HW[0]", RSPOpC.sa);
MmxMoveQwordRegToVariable(x86_MM4, &m_Vect[vsaw.sa].s16(0), Reg);
sprintf(Reg, "m_Vect[%i].HW[4]", RSPOpC.sa);
MmxMoveQwordRegToVariable(x86_MM4, &m_Vect[vsaw.sa].s16(4), Reg);
vsaw = op[11];
sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.sa);
MmxMoveQwordRegToVariable(x86_MM0, &RSP_Vect[vsaw.sa].s16(0), Reg);
sprintf(Reg, "RSP_Vect[%i].HW[4]", RSPOpC.sa);
MmxMoveQwordRegToVariable(x86_MM1, &RSP_Vect[vsaw.sa].s16(4), Reg);
sprintf(Reg, "m_Vect[%i].HW[0]", RSPOpC.sa);
MmxMoveQwordRegToVariable(x86_MM0, &m_Vect[vsaw.sa].s16(0), Reg);
sprintf(Reg, "m_Vect[%i].HW[4]", RSPOpC.sa);
MmxMoveQwordRegToVariable(x86_MM1, &m_Vect[vsaw.sa].s16(4), Reg);
MmxEmptyMultimediaState();
CompilePC += 12 * sizeof(RSPOpcode);
}
bool Check_Section_003(void)
bool CRSPRecompilerOps::Check_Section_003(void)
{
uint32_t Count;
RSPOpcode op[4];
@ -912,61 +913,62 @@ bool Check_Section_003(void)
return false;
}
static void resampler_hle()
void CRSPRecompilerOps::resampler_hle()
{
UDWORD accum, initial;
uint32_t const2 = (uint32_t)RSP_Vect[18].u16(4 ^ 7);
int64_t const3 = (int64_t)((int)RSP_Vect[30].s16(0 ^ 7)) << 16;
uint32_t const2 = (uint32_t)m_Vect[18].u16(4 ^ 7);
int64_t const3 = (int64_t)((int)m_Vect[30].s16(0 ^ 7)) << 16;
// VMUDM $v23, $v31, $v23 [7]
initial.DW = (int64_t)((uint32_t)RSP_Vect[23].u16(7 ^ 7)) << 16;
initial.DW = (int64_t)((uint32_t)m_Vect[23].u16(7 ^ 7)) << 16;
// VMADH $v23, $v31, $v22 [7]
initial.W[1] += (int)RSP_Vect[22].s16(7 ^ 7);
initial.W[1] += (int)m_Vect[22].s16(7 ^ 7);
for (uint8_t i = 0; i < 8; i++)
{
accum.DW = initial.DW;
// VMADM $v22, $v25, $v18 [4]
accum.DW += (int64_t)((int)RSP_Vect[25].s16(i) * const2) << 16;
accum.DW += (int64_t)((int)m_Vect[25].s16(i) * const2) << 16;
if (accum.W[1] > 0x7FFF)
{
RSP_Vect[22].s16(i) = 0x7FFF;
m_Vect[22].s16(i) = 0x7FFF;
}
else if (accum.W[1] < -0x8000)
{
RSP_Vect[22].s16(i) = -0x8000;
m_Vect[22].s16(i) = -0x8000;
}
else
{
RSP_Vect[22].s16(i) = accum.HW[2];
m_Vect[22].s16(i) = accum.HW[2];
}
// VMADN $v23, $v31, $v30 [0]
accum.DW += const3;
if (accum.W[1] > 0x7FFF)
{
RSP_Vect[23].u16(i) = 0xFFFF;
m_Vect[23].u16(i) = 0xFFFF;
}
else if (accum.W[1] < -0x8000)
{
RSP_Vect[23].s16(i) = 0;
m_Vect[23].s16(i) = 0;
}
else
{
RSP_Vect[23].s16(i) = accum.HW[1];
m_Vect[23].s16(i) = accum.HW[1];
}
}
}
void Compile_Section_003(void)
void CRSPRecompilerOps::Compile_Section_003(void)
{
CPU_Message("Compiling: %X to ..., RSP optimization $003", CompilePC);
Call_Direct((void *)resampler_hle, "Resampler_HLE");
MoveConstToX86reg((uint32_t)this, x86_ECX);
Call_Direct(AddressOf(&CRSPRecompilerOps::resampler_hle), "Resampler_HLE");
CompilePC += 4 * sizeof(RSPOpcode);
}
bool RSP_DoSections(void)
bool CRSPRecompilerOps::RSP_DoSections(void)
{
if (true == Check_Section_000())
{

828
Source/Project64-rsp-core/cpu/RSPInterpreterOps.cpp
View File

File diff suppressed because it is too large Load Diff

14
Source/Project64-rsp-core/cpu/RSPInterpreterOps.h
View File

@ -1,6 +1,8 @@
#pragma once
#include <Project64-rsp-core/cpu/RspTypes.h>
class CRSPSystem;
class CRSPRegisters;
class RSPOp
{
@ -163,8 +165,6 @@ public:
// Other functions
void UnknownOpcode(void);
CRSPSystem & m_System;
typedef void (RSPOp::*Func)();
Func Jump_Opcode[64];
@ -175,4 +175,14 @@ public:
Func Jump_Vector[64];
Func Jump_Lc2[32];
Func Jump_Sc2[32];
CRSPSystem & m_System;
CRSPRegisters & m_Reg;
UWORD32 * m_GPR;
UDWORD * m_ACCUM;
UWORD32 * m_Flags;
RSPVector * m_Vect;
RSPFlag &VCOL, &VCOH;
RSPFlag &VCCL, &VCCH;
RSPFlag & VCE;
};

75
Source/Project64-rsp-core/cpu/RSPRegister.cpp
View File

@ -1,19 +1,7 @@
#include "RspTypes.h"
#include <Project64-rsp-core/cpu/RSPRegisters.h>
#include <string.h>
// RSP registers
UWORD32 RSP_GPR[32], RSP_Flags[4];
UDWORD RSP_ACCUM[8];
RSPVector RSP_Vect[32];
uint16_t Reciprocals[512];
uint16_t InverseSquareRoots[512];
uint16_t RcpResult, RcpIn;
bool RcpHigh;
RSPFlag VCOL(RSP_Flags[0].UB[0]), VCOH(RSP_Flags[0].UB[1]);
RSPFlag VCCL(RSP_Flags[1].UB[0]), VCCH(RSP_Flags[1].UB[1]);
RSPFlag VCE(RSP_Flags[2].UB[0]);
const char * GPR_Strings[32] = {
"R0",
"AT",
@ -49,17 +37,27 @@ const char * GPR_Strings[32] = {
"RA",
};
void InitilizeRSPRegisters(void)
CRSPRegisters::CRSPRegisters() :
VCOL(m_Flags[0].UB[0]),
VCOH(m_Flags[0].UB[1]),
VCCL(m_Flags[1].UB[0]),
VCCH(m_Flags[1].UB[1]),
VCE(m_Flags[2].UB[0])
{
memset(RSP_GPR, 0, sizeof(RSP_GPR));
for (size_t i = 0, n = sizeof(RSP_Vect) / sizeof(RSP_Vect[0]); i < n; i++)
{
RSP_Vect[i] = RSPVector();
Reset();
}
Reciprocals[0] = 0xFFFF;
void CRSPRegisters::Reset(void)
{
memset(m_GPR, 0, sizeof(m_GPR));
for (size_t i = 0, n = sizeof(m_Vect) / sizeof(m_Vect[0]); i < n; i++)
{
m_Vect[i] = RSPVector();
}
m_Reciprocals[0] = 0xFFFF;
for (uint16_t i = 1; i < 512; i++)
{
Reciprocals[i] = uint16_t((((1ull << 34) / (uint64_t)(i + 512)) + 1) >> 8);
m_Reciprocals[i] = uint16_t((((1ull << 34) / (uint64_t)(i + 512)) + 1) >> 8);
}
for (uint16_t i = 0; i < 512; i++)
@ -70,42 +68,41 @@ void InitilizeRSPRegisters(void)
{
b++;
}
InverseSquareRoots[i] = uint16_t(b >> 1);
m_InverseSquareRoots[i] = uint16_t(b >> 1);
}
m_Result = 0;
m_In = 0;
m_High = false;
}
RcpResult = 0;
RcpIn = 0;
RcpHigh = false;
int64_t CRSPRegisters::AccumulatorGet(uint8_t el)
{
return (((int64_t)m_ACCUM[el].HW[3]) << 32) | (((int64_t)m_ACCUM[el].UHW[2]) << 16) | m_ACCUM[el].UHW[1];
}
int64_t AccumulatorGet(uint8_t el)
void CRSPRegisters::AccumulatorSet(uint8_t el, int64_t Accumulator)
{
return (((int64_t)RSP_ACCUM[el].HW[3]) << 32) | (((int64_t)RSP_ACCUM[el].UHW[2]) << 16) | RSP_ACCUM[el].UHW[1];
m_ACCUM[el].HW[3] = (int16_t)(Accumulator >> 32);
m_ACCUM[el].HW[2] = (int16_t)(Accumulator >> 16);
m_ACCUM[el].HW[1] = (int16_t)(Accumulator);
}
void AccumulatorSet(uint8_t el, int64_t Accumulator)
uint16_t CRSPRegisters::AccumulatorSaturate(uint8_t el, bool High)
{
RSP_ACCUM[el].HW[3] = (int16_t)(Accumulator >> 32);
RSP_ACCUM[el].HW[2] = (int16_t)(Accumulator >> 16);
RSP_ACCUM[el].HW[1] = (int16_t)(Accumulator);
}
uint16_t AccumulatorSaturate(uint8_t el, bool High)
if (m_ACCUM[el].HW[3] < 0)
{
if (RSP_ACCUM[el].HW[3] < 0)
{
if (RSP_ACCUM[el].UHW[3] != 0xFFFF || RSP_ACCUM[el].HW[2] >= 0)
if (m_ACCUM[el].UHW[3] != 0xFFFF || m_ACCUM[el].HW[2] >= 0)
{
return High ? 0x8000 : 0x0000;
}
else
{
return RSP_ACCUM[el].UHW[High ? 2 : 1];
return m_ACCUM[el].UHW[High ? 2 : 1];
}
}
if (RSP_ACCUM[el].UHW[3] != 0 || RSP_ACCUM[el].HW[2] < 0)
if (m_ACCUM[el].UHW[3] != 0 || m_ACCUM[el].HW[2] < 0)
{
return High ? 0x7fff : 0xffff;
}
return RSP_ACCUM[el].UHW[High ? 2 : 1];
return m_ACCUM[el].UHW[High ? 2 : 1];
}

44
Source/Project64-rsp-core/cpu/RSPRegisters.h
View File

@ -71,6 +71,31 @@ enum
MI_INTR_SP = 0x01, // Bit 0: SP INTR
};
class CRSPRegisters
{
public:
CRSPRegisters();
void Reset(void);
int64_t AccumulatorGet(uint8_t el);
void AccumulatorSet(uint8_t el, int64_t Accumulator);
uint16_t AccumulatorSaturate(uint8_t el, bool High);
UWORD32 m_GPR[32];
UWORD32 m_Flags[4];
UDWORD m_ACCUM[8];
RSPVector m_Vect[32];
uint16_t m_Reciprocals[512];
uint16_t m_InverseSquareRoots[512];
uint16_t m_Result;
uint16_t m_In;
bool m_High;
RSPFlag VCOL, VCOH;
RSPFlag VCCL, VCCH;
RSPFlag VCE;
};
extern const char * x86_Strings[8];
extern const char * GPR_Strings[32];
@ -94,22 +119,3 @@ extern const char * GPR_Strings[32];
: (Reg) == 14 ? "DP pipe busy counter" \
: (Reg) == 15 ? "DP TMEM load counter" \
: "Unknown Register"
void InitilizeRSPRegisters(void);
int64_t AccumulatorGet(uint8_t el);
void AccumulatorSet(uint8_t el, int64_t Accumulator);
uint16_t AccumulatorSaturate(uint8_t el, bool High);
// RSP registers
extern UWORD32 RSP_GPR[32], RSP_Flags[4];
extern UDWORD RSP_ACCUM[8];
extern RSPVector RSP_Vect[32];
extern uint16_t Reciprocals[512];
extern uint16_t InverseSquareRoots[512];
extern uint16_t RcpResult, RcpIn;
extern bool RcpHigh;
extern RSPFlag VCOL, VCOH;
extern RSPFlag VCCL, VCCH;
extern RSPFlag VCE;

8
Source/Project64-rsp-core/cpu/RspSystem.cpp
View File

@ -12,6 +12,11 @@ CRSPSystem::CRSPSystem() :
{
}
void CRSPSystem::Reset()
{
m_Reg.Reset();
}
uint32_t CRSPSystem::RunInterpreterCPU(uint32_t Cycles)
{
uint32_t CycleCount;
@ -21,6 +26,7 @@ uint32_t CRSPSystem::RunInterpreterCPU(uint32_t Cycles)
g_RSPDebugger->StartingCPU();
}
CycleCount = 0;
uint32_t & GprR0 = m_Reg.m_GPR[0].UW;
while (RSP_Running)
{
@ -30,7 +36,7 @@ uint32_t CRSPSystem::RunInterpreterCPU(uint32_t Cycles)
}
RSPOpC.Value = *(uint32_t *)(RSPInfo.IMEM + (*PrgCount & 0xFFC));
(m_OpCodes.*(m_OpCodes.Jump_Opcode[RSPOpC.op]))();
RSP_GPR[0].W = 0x00000000; // MIPS $zero hard-wired to 0
GprR0 = 0x00000000; // MIPS $zero hard-wired to 0
switch (RSP_NextInstruction)
{

7
Source/Project64-rsp-core/cpu/RspSystem.h
View File

@ -5,12 +5,19 @@
class CRSPSystem
{
friend class RSPOp;
friend class CRSPRecompilerOps;
friend void UpdateRSPRegistersScreen(void);
public:
CRSPSystem();
void Reset();
uint32_t RunInterpreterCPU(uint32_t Cycles);
private:
CRSPRegisters m_Reg;
RSPOp m_OpCodes;
};

24
Source/Project64-rsp/Debugger/RSPRegistersUI.cpp
View File

@ -1,8 +1,9 @@
#include <windows.h>
#include <Project64-rsp-core\RSPInfo.h>
#include <Project64-rsp-core\cpu\RSPRegisters.h>
#include <Project64-rsp\Rsp.h>
#include <Project64-rsp-core/RSPInfo.h>
#include <Project64-rsp-core/cpu/RSPRegisters.h>
#include <Project64-rsp-core/cpu/RspSystem.h>
#include <Project64-rsp/Rsp.h>
#include <commctrl.h>
#include <stdio.h>
@ -621,6 +622,7 @@ void ShowRSP_RegisterPanel(int Panel)
void UpdateRSPRegistersScreen(void)
{
CRSPRegisters & Reg = RSPSystem.m_Reg;
char RegisterValue[100];
int count, nSel;
TC_ITEM item;
@ -639,7 +641,7 @@ void UpdateRSPRegistersScreen(void)
case GeneralPurpose:
for (count = 0; count < 32; count++)
{
sprintf(RegisterValue, " 0x%08X", RSP_GPR[count].UW);
sprintf(RegisterValue, " 0x%08X", Reg.m_GPR[count].UW);
SetWindowTextA(hGPR[count], RegisterValue);
}
break;
@ -683,30 +685,30 @@ void UpdateRSPRegistersScreen(void)
case HiddenRegisters:
for (count = 0; count < 8; count++)
{
sprintf(RegisterValue, " 0x%08X - %08X", RSP_ACCUM[count].W[1], RSP_ACCUM[count].W[0]);
sprintf(RegisterValue, " 0x%08X - %08X", Reg.m_ACCUM[count].W[1], Reg.m_ACCUM[count].W[0]);
SetWindowTextA(hHIDDEN[count], RegisterValue);
}
for (count = 0; count < 3; count++)
{
sprintf(RegisterValue, " 0x%04X", RSP_Flags[count].UHW[0]);
sprintf(RegisterValue, " 0x%04X", Reg.m_Flags[count].UHW[0]);
SetWindowTextA(hHIDDEN[count + 8], RegisterValue);
}
sprintf(RegisterValue, " 0x%04X", RSP_Flags[2].UHW[0]);
sprintf(RegisterValue, " 0x%04X", Reg.m_Flags[2].UHW[0]);
SetWindowTextA(hHIDDEN[11], RegisterValue);
break;
case Vector1:
for (count = 0; count < 16; count++)
{
sprintf(RegisterValue, " 0x%08X - %08X - %08X - %08X", RSP_Vect[count].s32(3),
RSP_Vect[count].s32(2), RSP_Vect[count].s32(1), RSP_Vect[count].s32(0));
sprintf(RegisterValue, " 0x%08X - %08X - %08X - %08X", Reg.m_Vect[count].s32(3),
Reg.m_Vect[count].s32(2), Reg.m_Vect[count].s32(1), Reg.m_Vect[count].s32(0));
SetWindowTextA(hVECT1[count], RegisterValue);
}
break;
case Vector2:
for (count = 0; count < 16; count++)
{
sprintf(RegisterValue, " 0x%08X - %08X - %08X - %08X", RSP_Vect[count + 16].s32(3),
RSP_Vect[count + 16].s32(2), RSP_Vect[count + 16].s32(1), RSP_Vect[count + 16].s32(0));
sprintf(RegisterValue, " 0x%08X - %08X - %08X - %08X", Reg.m_Vect[count + 16].s32(3),
Reg.m_Vect[count + 16].s32(2), Reg.m_Vect[count + 16].s32(1), Reg.m_Vect[count + 16].s32(0));
SetWindowTextA(hVECT2[count], RegisterValue);
}
break;