ShuriZma
/
project64
mirror of https://github.com/project64/project64.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

cleaning up type and formating

This commit is contained in:
zilmar 2012-10-22 21:36:57 +11:00
parent 4a3073af6d
commit f6e7199118
10 changed files with 36 additions and 30 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Source/Project64/N64 System/Interpreter/Interpreter CPU.cpp
View File

@ -8,7 +8,7 @@ void ExecuteInterpreterOps (DWORD /*Cycles*/)
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
} }
int DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2) { bool DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2) {
OPCODE Command; OPCODE Command;
if (!_MMU->LW_VAddr(PC + 4, Command.Hex)) { if (!_MMU->LW_VAddr(PC + 4, Command.Hex)) {

2
Source/Project64/N64 System/Interpreter/Interpreter Ops 32.cpp
View File

@ -1,7 +1,7 @@
#include "stdafx.h" #include "stdafx.h"
//#include "../C Core/Logging.h" //#include "../C Core/Logging.h"
int DelaySlotEffectsCompare ( DWORD PC, DWORD Reg1, DWORD Reg2 ); bool DelaySlotEffectsCompare ( DWORD PC, DWORD Reg1, DWORD Reg2 );
#define ADDRESS_ERROR_EXCEPTION(Address,FromRead) \ #define ADDRESS_ERROR_EXCEPTION(Address,FromRead) \
_Reg->DoAddressError(m_NextInstruction == JUMP,Address,FromRead);\ _Reg->DoAddressError(m_NextInstruction == JUMP,Address,FromRead);\

2
Source/Project64/N64 System/Interpreter/Interpreter Ops.cpp
View File

@ -711,7 +711,7 @@ R4300iOp::Func * R4300iOp::BuildInterpreter (void )
return Jump_Opcode; return Jump_Opcode;
} }
int DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2); bool DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2);
void TestInterpreterJump (DWORD PC, DWORD TargetPC, int Reg1, int Reg2) void TestInterpreterJump (DWORD PC, DWORD TargetPC, int Reg1, int Reg2)
{ {

2
Source/Project64/N64 System/Recompiler/Code Block.cpp
View File

@ -1,6 +1,6 @@
#include "stdafx.h" #include "stdafx.h"
int DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2); bool DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2);
CCodeBlock::CCodeBlock(DWORD VAddrEnter, BYTE * RecompPos) : CCodeBlock::CCodeBlock(DWORD VAddrEnter, BYTE * RecompPos) :
m_VAddrEnter(VAddrEnter), m_VAddrEnter(VAddrEnter),

3
Source/Project64/N64 System/Recompiler/Code Section.cpp
View File

@ -2,7 +2,7 @@
void InPermLoop ( void ); void InPermLoop ( void );
int DelaySlotEffectsCompare ( DWORD PC, DWORD Reg1, DWORD Reg2 ); bool DelaySlotEffectsCompare ( DWORD PC, DWORD Reg1, DWORD Reg2 );
int DelaySlotEffectsJump (DWORD JumpPC) { int DelaySlotEffectsJump (DWORD JumpPC) {
OPCODE Command; OPCODE Command;
@ -1472,6 +1472,7 @@ void CCodeSection::UnlinkParent( CCodeSection * Parent, bool ContinueSection )
return; return;
} }
CPU_Message(__FUNCTION__ ": Section %d Parent: %d ContinueSection = %s",m_SectionID,Parent->m_SectionID,ContinueSection?"Yes" :"No");
if (Parent->m_ContinueSection == this && Parent->m_JumpSection == this) if (Parent->m_ContinueSection == this && Parent->m_JumpSection == this)
{ {
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);

6
Source/Project64/N64 System/Recompiler/Loop Analysis.cpp
View File

@ -2,7 +2,7 @@
#define CHECKED_BUILD 1 #define CHECKED_BUILD 1
int DelaySlotEffectsCompare ( DWORD PC, DWORD Reg1, DWORD Reg2 ); bool DelaySlotEffectsCompare ( DWORD PC, DWORD Reg1, DWORD Reg2 );
LoopAnalysis::LoopAnalysis(CCodeBlock * CodeBlock, CCodeSection * Section) : LoopAnalysis::LoopAnalysis(CCodeBlock * CodeBlock, CCodeSection * Section) :
m_EnterSection(Section), m_EnterSection(Section),
@ -413,7 +413,9 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
{ {
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
} }
if (Section->m_Jump.TargetPC != m_PC + ((short)m_Command.offset << 2) + 4) if (Section->m_Jump.TargetPC != m_PC + ((short)m_Command.offset << 2) + 4 &&
Section->m_JumpSection != NULL &&
Section->m_Jump.TargetPC != (DWORD)-1)
{ {
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
} }

16
Source/Project64/N64 System/Recompiler/Recompiler Ops.cpp
View File

@ -21,13 +21,13 @@ void CRecompilerOps::CompileWriteTLBMiss (x86Reg AddressReg, x86Reg LookUpReg )
m_Section->CompileExit(m_CompilePC, m_CompilePC,m_RegWorkingSet,CExitInfo::TLBWriteMiss,FALSE,JeLabel32); m_Section->CompileExit(m_CompilePC, m_CompilePC,m_RegWorkingSet,CExitInfo::TLBWriteMiss,FALSE,JeLabel32);
} }
int DelaySlotEffectsCompare ( DWORD PC, DWORD Reg1, DWORD Reg2 ); bool DelaySlotEffectsCompare ( DWORD PC, DWORD Reg1, DWORD Reg2 );
/************************** Branch functions ************************/ /************************** Branch functions ************************/
void CRecompilerOps::Compile_Branch (CRecompilerOps::BranchFunction CompareFunc, BRANCH_TYPE BranchType, BOOL Link) void CRecompilerOps::Compile_Branch (CRecompilerOps::BranchFunction CompareFunc, BRANCH_TYPE BranchType, BOOL Link)
{ {
static int EffectDelaySlot, DoneJumpDelay, DoneContinueDelay;
static CRegInfo RegBeforeDelay; static CRegInfo RegBeforeDelay;
static bool EffectDelaySlot;
if ( m_NextInstruction == NORMAL ) { if ( m_NextInstruction == NORMAL ) {
CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC));
@ -1183,9 +1183,7 @@ void CRecompilerOps::BLTZ_Compare (void) {
void CRecompilerOps::BGEZ_Compare (void) { void CRecompilerOps::BGEZ_Compare (void) {
if (IsConst(m_Opcode.rs)) { if (IsConst(m_Opcode.rs)) {
if (Is64Bit(m_Opcode.rs)) { if (Is64Bit(m_Opcode.rs)) {
#ifndef EXTERNAL_RELEASE _Notify->BreakPoint(__FILE__,__LINE__);
_Notify->DisplayError("BGEZ 1");
#endif
CRecompilerOps::UnknownOpcode(); CRecompilerOps::UnknownOpcode();
} else if (IsSigned(m_Opcode.rs)) { } else if (IsSigned(m_Opcode.rs)) {
if (MipsRegLo_S(m_Opcode.rs) >= 0) { if (MipsRegLo_S(m_Opcode.rs) >= 0) {
@ -2735,7 +2733,7 @@ void CRecompilerOps::SPECIAL_AND (void)
ProtectGPR(source1); ProtectGPR(source1);
ProtectGPR(source2); ProtectGPR(source2);
if (Is32Bit(source1) && Is32Bit(source2)) { if (Is32Bit(source1) && Is32Bit(source2)) {
int Sign = (IsSigned(m_Opcode.rt) && IsSigned(m_Opcode.rs))?TRUE:FALSE; bool Sign = (IsSigned(m_Opcode.rt) && IsSigned(m_Opcode.rs))?true:false;
Map_GPR_32bit(m_Opcode.rd,Sign,source1); Map_GPR_32bit(m_Opcode.rd,Sign,source1);
AndX86RegToX86Reg(MipsRegMapLo(m_Opcode.rd),MipsRegMapLo(source2)); AndX86RegToX86Reg(MipsRegMapLo(m_Opcode.rd),MipsRegMapLo(source2));
} else if (Is32Bit(source1) || Is32Bit(source2)) { } else if (Is32Bit(source1) || Is32Bit(source2)) {
@ -2785,13 +2783,13 @@ void CRecompilerOps::SPECIAL_AND (void)
} }
} else { } else {
DWORD Value = cMipsRegLo(ConstReg); DWORD Value = cMipsRegLo(ConstReg);
int Sign = FALSE; bool Sign = false;
if (IsSigned(ConstReg) && IsSigned(MappedReg)) { Sign = TRUE; } if (IsSigned(ConstReg) && IsSigned(MappedReg)) { Sign = true; }
if (Value != 0) { if (Value != 0) {
Map_GPR_32bit(m_Opcode.rd,Sign,MappedReg); Map_GPR_32bit(m_Opcode.rd,Sign,MappedReg);
AndConstToX86Reg(MipsRegMapLo(m_Opcode.rd),Value); AndConstToX86Reg(MipsRegMapLo(m_Opcode.rd),Value);
} else { } else {
Map_GPR_32bit(m_Opcode.rd,FALSE, 0); Map_GPR_32bit(m_Opcode.rd,false, 0);
} }
} }
} }

2
Source/Project64/N64 System/Recompiler/Recompiler Ops.h
View File

@ -274,7 +274,7 @@ protected:
{ {
return m_RegWorkingSet.Free8BitX86Reg(); return m_RegWorkingSet.Free8BitX86Reg();
} }
static inline void Map_GPR_32bit ( int Reg, BOOL SignValue, int MipsRegToLoad ) static inline void Map_GPR_32bit ( int Reg, bool SignValue, int MipsRegToLoad )
{ {
m_RegWorkingSet.Map_GPR_32bit(Reg,SignValue,MipsRegToLoad); m_RegWorkingSet.Map_GPR_32bit(Reg,SignValue,MipsRegToLoad);
} }

29
Source/Project64/N64 System/Recompiler/Reg Info.cpp
View File

@ -538,30 +538,31 @@ CRegInfo::x86Reg CRegInfo::Map_MemoryStack ( x86Reg Reg, bool bMapRegister, bool
return Reg; return Reg;
} }
void CRegInfo::Map_GPR_32bit (int MipsReg, BOOL SignValue, int MipsRegToLoad) void CRegInfo::Map_GPR_32bit (int MipsReg, bool SignValue, int MipsRegToLoad)
{ {
int count; int count;
x86Reg Reg; x86Reg Reg;
if (MipsReg == 0) { if (MipsReg == 0)
#ifndef EXTERNAL_RELEASE {
_Notify->DisplayError("Map_GPR_32bit\n\nWhy are you trying to map reg 0"); _Notify->BreakPoint(__FILE__,__LINE__);
#endif
return; return;
} }
if (IsUnknown(MipsReg) || IsConst(MipsReg)) { if (IsUnknown(MipsReg) || IsConst(MipsReg))
{
Reg = FreeX86Reg(); Reg = FreeX86Reg();
if (Reg < 0) { if (Reg < 0) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
_Notify->DisplayError("Map_GPR_32bit\n\nOut of registers"); _Notify->DisplayError("Map_GPR_32bit\n\nOut of registers");
_Notify->BreakPoint(__FILE__,__LINE__);
#endif #endif
_Notify->BreakPoint(__FILE__,__LINE__);
return; return;
} }
CPU_Message(" regcache: allocate %s to %s",x86_Name(Reg),CRegName::GPR[MipsReg]); CPU_Message(" regcache: allocate %s to %s",x86_Name(Reg),CRegName::GPR[MipsReg]);
} else { } else {
if (Is64Bit(MipsReg)) { if (Is64Bit(MipsReg))
{
CPU_Message(" regcache: unallocate %s from high 32bit of %s",x86_Name(MipsRegMapHi(MipsReg)),CRegName::GPR_Hi[MipsReg]); CPU_Message(" regcache: unallocate %s from high 32bit of %s",x86_Name(MipsRegMapHi(MipsReg)),CRegName::GPR_Hi[MipsReg]);
SetX86MapOrder(MipsRegMapHi(MipsReg),0); SetX86MapOrder(MipsRegMapHi(MipsReg),0);
SetX86Mapped(MipsRegMapHi(MipsReg),NotMapped); SetX86Mapped(MipsRegMapHi(MipsReg),NotMapped);
@ -573,17 +574,21 @@ void CRegInfo::Map_GPR_32bit (int MipsReg, BOOL SignValue, int MipsRegToLoad)
for (count = 0; count < 10; count ++) for (count = 0; count < 10; count ++)
{ {
DWORD Count = GetX86MapOrder((x86Reg)count); DWORD Count = GetX86MapOrder((x86Reg)count);
if ( Count > 0) { if ( Count > 0)
{
SetX86MapOrder((x86Reg)count,Count + 1); SetX86MapOrder((x86Reg)count,Count + 1);
} }
} }
SetX86MapOrder(Reg,1); SetX86MapOrder(Reg,1);
if (MipsRegToLoad > 0) { if (MipsRegToLoad > 0)
if (IsUnknown(MipsRegToLoad)) { {
if (IsUnknown(MipsRegToLoad))
{
MoveVariableToX86reg(&_GPR[MipsRegToLoad].UW[0],CRegName::GPR_Lo[MipsRegToLoad],Reg); MoveVariableToX86reg(&_GPR[MipsRegToLoad].UW[0],CRegName::GPR_Lo[MipsRegToLoad],Reg);
} else if (IsMapped(MipsRegToLoad)) { } else if (IsMapped(MipsRegToLoad)) {
if (MipsReg != MipsRegToLoad) { if (MipsReg != MipsRegToLoad)
{
MoveX86RegToX86Reg(MipsRegMapLo(MipsRegToLoad),Reg); MoveX86RegToX86Reg(MipsRegMapLo(MipsRegToLoad),Reg);
} }
} else { } else {

2
Source/Project64/N64 System/Recompiler/Reg Info.h
View File

@ -67,7 +67,7 @@ public:
x86Reg FreeX86Reg ( void ); x86Reg FreeX86Reg ( void );
x86Reg Free8BitX86Reg ( void ); x86Reg Free8BitX86Reg ( void );
void Map_GPR_32bit ( int MipsReg, BOOL SignValue, int MipsRegToLoad ); void Map_GPR_32bit ( int MipsReg, bool SignValue, int MipsRegToLoad );
void Map_GPR_64bit ( int MipsReg, int MipsRegToLoad ); void Map_GPR_64bit ( int MipsReg, int MipsRegToLoad );
x86Reg Get_MemoryStack ( void ) const; x86Reg Get_MemoryStack ( void ) const;
x86Reg Map_MemoryStack ( x86Reg Reg, bool bMapRegister, bool LoadValue = true ); x86Reg Map_MemoryStack ( x86Reg Reg, bool bMapRegister, bool LoadValue = true );