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Core: for tlb miss only use special address when address is not defined

This commit is contained in:
zilmar 2023-09-14 18:39:15 +09:30
parent e0c125e837
commit f3d6d3fc7c
4 changed files with 10 additions and 9 deletions
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9
Source/Project64-core/N64System/Mips/Register.cpp
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@ -279,7 +279,8 @@ CRegisters::CRegisters(CN64System & System, CSystemEvents & SystemEvents) :
DiskInterfaceReg(m_DiskInterface), DiskInterfaceReg(m_DiskInterface),
m_System(System), m_System(System),
m_SystemEvents(SystemEvents), m_SystemEvents(SystemEvents),
m_SystemTimer(System.m_SystemTimer) m_SystemTimer(System.m_SystemTimer),
m_TLB(System.m_TLB)
{ {
Init(); Init();
} }
@ -784,13 +785,13 @@ bool CRegisters::DoIntrException()
void CRegisters::DoTLBReadMiss(uint64_t BadVaddr) void CRegisters::DoTLBReadMiss(uint64_t BadVaddr)
{ {
AddressException(BadVaddr); AddressException(BadVaddr);
TriggerException(EXC_RMISS, 0, true); TriggerException(EXC_RMISS, 0, !m_TLB.AddressDefined(BadVaddr));
} }
void CRegisters::DoTLBWriteMiss(uint64_t BadVaddr) void CRegisters::DoTLBWriteMiss(uint64_t BadVaddr)
{ {
AddressException(BadVaddr); AddressException(BadVaddr);
TriggerException(EXC_WMISS, 0, true); TriggerException(EXC_WMISS, 0, !m_TLB.AddressDefined(BadVaddr));
} }
void CRegisters::AddressException(uint64_t Address) void CRegisters::AddressException(uint64_t Address)
@ -819,7 +820,7 @@ void CRegisters::TriggerException(uint32_t ExceptionCode, uint32_t Coprocessor,
uint32_t ExceptionBase = 0x80000000; uint32_t ExceptionBase = 0x80000000;
uint16_t ExceptionOffset = 0x0180; uint16_t ExceptionOffset = 0x0180;
if (SpecialOffset && STATUS_REGISTER.ExceptionLevel != 0) if (SpecialOffset && STATUS_REGISTER.ExceptionLevel == 0)
{ {
switch (STATUS_REGISTER.PrivilegeMode) switch (STATUS_REGISTER.PrivilegeMode)
{ {

2
Source/Project64-core/N64System/Mips/Register.h
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@ -407,6 +407,7 @@ protected:
class CN64System; class CN64System;
class CSystemEvents; class CSystemEvents;
class CTLB;
class CRegisters : class CRegisters :
public CLogging, public CLogging,
@ -521,4 +522,5 @@ private:
CN64System & m_System; CN64System & m_System;
CSystemEvents & m_SystemEvents; CSystemEvents & m_SystemEvents;
CSystemTimer & m_SystemTimer; CSystemTimer & m_SystemTimer;
CTLB & m_TLB;
}; };

6
Source/Project64-core/N64System/Mips/TLB.cpp
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@ -45,16 +45,14 @@ void CTLB::Reset(bool InvalidateTLB)
} }
} }
bool CTLB::AddressDefined(uint32_t VAddr) bool CTLB::AddressDefined(uint64_t VAddr)
{ {
uint32_t i;
if (VAddr >= 0x80000000 && VAddr <= 0xBFFFFFFF) if (VAddr >= 0x80000000 && VAddr <= 0xBFFFFFFF)
{ {
return true; return true;
} }
for (i = 0; i < 64; i++) for (uint32_t i = 0; i < 64; i++)
{ {
if (m_FastTlb[i].ValidEntry && if (m_FastTlb[i].ValidEntry &&
VAddr >= m_FastTlb[i].VSTART && VAddr >= m_FastTlb[i].VSTART &&

2
Source/Project64-core/N64System/Mips/TLB.h
View File

@ -94,7 +94,7 @@ public:
void WriteEntry(int32_t index, bool Random); void WriteEntry(int32_t index, bool Random);
// See if a VAddr has an entry to translate to a PAddr // See if a VAddr has an entry to translate to a PAddr
bool AddressDefined(uint32_t VAddr); bool AddressDefined(uint64_t VAddr);
const TLB_ENTRY & TlbEntry(int32_t Entry) const const TLB_ENTRY & TlbEntry(int32_t Entry) const
{ {