Fix loop analysis for BGEZ
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464c280fa6
commit
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@ -412,13 +412,8 @@ bool CCodeBlock::AnalyzeInstruction ( DWORD PC, DWORD & TargetPC, DWORD & Contin
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TargetPC = PC + ((short)Command.offset << 2) + 4;
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TargetPC = PC + ((short)Command.offset << 2) + 4;
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if (TargetPC == PC + 8)
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if (TargetPC == PC + 8)
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{
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{
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_Notify->BreakPoint(__FILE__,__LINE__);
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TargetPC = (DWORD)-1;
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}
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} else {
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IncludeDelaySlot = true;
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if (Command.rs != 0)
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{
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ContinuePC = PC + 8;
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}
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if (TargetPC == PC)
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if (TargetPC == PC)
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{
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{
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if (Command.rs == 0)
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if (Command.rs == 0)
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@ -426,10 +421,18 @@ bool CCodeBlock::AnalyzeInstruction ( DWORD PC, DWORD & TargetPC, DWORD & Contin
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TargetPC = (DWORD)-1;
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TargetPC = (DWORD)-1;
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EndBlock = true;
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EndBlock = true;
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} else {
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} else {
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//if delay slot effects compare;
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if (!DelaySlotEffectsCompare(PC,Command.rs,Command.rt))
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_Notify->BreakPoint(__FILE__,__LINE__);
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{
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PermLoop = true;
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}
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}
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}
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}
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}
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if (Command.rs != 0)
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{
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ContinuePC = PC + 8;
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}
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IncludeDelaySlot = true;
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}
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break;
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break;
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case R4300i_REGIMM_BLTZL:
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case R4300i_REGIMM_BLTZL:
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case R4300i_REGIMM_BGEZL:
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case R4300i_REGIMM_BGEZL:
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