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Android: Make a skeleton for arm to start over arm recompiler

This commit is contained in:
zilmar 2022-10-24 11:15:46 +10:30
parent ae6157427f
commit ef8067cf12
25 changed files with 11650 additions and 10803 deletions
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4
Android/gradle/wrapper/gradle-wrapper.properties vendored
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@ -1,6 +1,6 @@
#Wed Jun 09 20:22:37 ACST 2021
#Mon Oct 10 15:01:33 ACDT 2022
distributionBase=GRADLE_USER_HOME
distributionUrl=https\://services.gradle.org/distributions/gradle-6.7.1-bin.zip
distributionUrl=https\://services.gradle.org/distributions/gradle-7.5.1-bin.zip
distributionPath=wrapper/dists
zipStorePath=wrapper/dists
zipStoreBase=GRADLE_USER_HOME

2
Android/jni/3rdParty/png/CMakeLists.txt vendored
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@ -1,4 +1,4 @@
cmake_minimum_required(VERSION 2.8)
cmake_minimum_required(VERSION 2.8.12)
set(CMAKE_CXX_STANDARD 11)
set(CMAKE_C_STANDARD 99)

2
Android/jni/3rdParty/zlib/CMakeLists.txt vendored
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@ -1,4 +1,4 @@
cmake_minimum_required(VERSION 2.8)
cmake_minimum_required(VERSION 2.8.12)
set(CMAKE_CXX_STANDARD 11)
set(CMAKE_C_STANDARD 99)

2
Android/jni/Common/CMakeLists.txt
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@ -1,4 +1,4 @@
cmake_minimum_required(VERSION 2.8)
cmake_minimum_required(VERSION 2.8.12)
set(CMAKE_CXX_STANDARD 11)
set(CMAKE_C_STANDARD 99)

2
Android/jni/Plugin-Input/CMakeLists.txt
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@ -1,4 +1,4 @@
cmake_minimum_required(VERSION 2.8)
cmake_minimum_required(VERSION 2.8.12)
set(CMAKE_CXX_STANDARD 11)
set(CMAKE_C_STANDARD 99)

2
Android/jni/Plugin-RspHle/CMakeLists.txt
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@ -1,4 +1,4 @@
cmake_minimum_required(VERSION 2.8)
cmake_minimum_required(VERSION 2.8.12)
set(CMAKE_CXX_STANDARD 11)
set(CMAKE_C_STANDARD 99)

2
Android/jni/Project64-audio/CMakeLists.txt
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@ -1,4 +1,4 @@
cmake_minimum_required(VERSION 2.8)
cmake_minimum_required(VERSION 2.8.12)
set(CMAKE_CXX_STANDARD 11)
set(CMAKE_C_STANDARD 99)

2
Android/jni/Project64-bridge/CMakeLists.txt
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@ -1,4 +1,4 @@
cmake_minimum_required(VERSION 2.8)
cmake_minimum_required(VERSION 2.8.12)
set(CMAKE_CXX_STANDARD 11)
set(CMAKE_C_STANDARD 99)

3
Android/jni/Project64-core/CMakeLists.txt
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@ -1,4 +1,4 @@
cmake_minimum_required(VERSION 2.8)
cmake_minimum_required(VERSION 2.8.12)
set(CMAKE_CXX_STANDARD 11)
set(CMAKE_C_STANDARD 99)
@ -39,7 +39,6 @@ add_library(Project64-core STATIC
N64System/Mips/GBCart.cpp
N64System/Mips/MemoryVirtualMem.cpp
N64System/Mips/Mempak.cpp
N64System/Mips/PifRam.cpp
N64System/Mips/R4300iInstruction.cpp
N64System/Mips/Register.cpp
N64System/Mips/Rumblepak.cpp

2
Android/jni/Project64-video/CMakeLists.txt
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@ -1,4 +1,4 @@
cmake_minimum_required(VERSION 2.8)
cmake_minimum_required(VERSION 2.8.12)
set(CMAKE_CXX_STANDARD 11)
set(CMAKE_C_STANDARD 99)

2
Android/jni/Settings/CMakeLists.txt
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@ -1,4 +1,4 @@
cmake_minimum_required(VERSION 2.8)
cmake_minimum_required(VERSION 2.8.12)
set(CMAKE_CXX_STANDARD 11)
set(CMAKE_C_STANDARD 99)

2
Source/Project64-core/N64System/Recompiler/Aarch64/Aarch64RecompilerOps.h
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@ -216,7 +216,7 @@ public:
const R4300iOpcode & GetOpcode(void) const;
void PreCompileOpcode(void);
void PostCompileOpcode(void);
void CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo & ExitRegSet, ExitReason reason);
void CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo & ExitRegSet, ExitReason Reason);
void UpdateCounters(CRegInfo & RegSet, bool CheckTimer, bool ClearValues = false, bool UpdateTimer = true);
void CompileSystemCheck(uint32_t TargetPC, const CRegInfo & RegSet);

1868
Source/Project64-core/N64System/Recompiler/Arm/ArmOps.cpp
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244
Source/Project64-core/N64System/Recompiler/Arm/ArmOps.h
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@ -1,257 +1,19 @@
#pragma once
#if defined(__arm__) || defined(_M_ARM)
#if !defined(_MSC_VER) && !defined(_Printf_format_string_)
#define _Printf_format_string_
#endif
#include <Project64-core/Settings/DebugSettings.h>
class CCodeBlock;
class CArmRegInfo;
class CArmOps :
protected CDebugSettings
class CArmOps
{
public:
enum ArmReg
{
Arm_R0 = 0,
Arm_R1 = 1,
Arm_R2 = 2,
Arm_R3 = 3,
Arm_R4 = 4,
Arm_R5 = 5,
Arm_R6 = 6,
Arm_R7 = 7,
Arm_R8 = 8,
Arm_R9 = 9,
Arm_R10 = 10,
Arm_R11 = 11,
Arm_R12 = 12,
Arm_R13 = 13,
ArmRegSP = 13,
Arm_R14 = 14,
ArmRegLR = 14,
Arm_R15 = 15,
ArmRegPC = 15,
Arm_Unknown = -1,
Arm_Any = -2,
};
enum ArmFpuSingle
{
Arm_S0 = 0,
Arm_S1 = 1,
Arm_S2 = 2,
Arm_S3 = 3,
Arm_S4 = 4,
Arm_S5 = 5,
Arm_S6 = 6,
Arm_S7 = 7,
Arm_S8 = 8,
Arm_S9 = 9,
Arm_S10 = 10,
Arm_S11 = 11,
Arm_S12 = 12,
Arm_S13 = 13,
Arm_S14 = 14,
Arm_S15 = 15,
Arm_S16 = 16,
Arm_S17 = 17,
Arm_S18 = 18,
Arm_S19 = 19,
Arm_S20 = 20,
Arm_S21 = 21,
Arm_S22 = 22,
Arm_S23 = 23,
Arm_S24 = 24,
Arm_S25 = 25,
Arm_S26 = 26,
Arm_S27 = 27,
Arm_S28 = 28,
Arm_S29 = 29,
Arm_S30 = 30,
Arm_S31 = 31,
};
enum ArmFpuDouble
{
Arm_D0 = 0,
Arm_D1 = 1,
Arm_D2 = 2,
Arm_D3 = 3,
Arm_D4 = 4,
Arm_D5 = 5,
Arm_D6 = 6,
Arm_D7 = 7,
Arm_D8 = 8,
Arm_D9 = 9,
Arm_D10 = 10,
Arm_D11 = 11,
Arm_D12 = 12,
Arm_D13 = 13,
Arm_D14 = 14,
Arm_D15 = 15,
};
enum ArmRegPushPop
{
ArmPushPop_R0 = 0x0001,
ArmPushPop_R1 = 0x0002,
ArmPushPop_R2 = 0x0004,
ArmPushPop_R3 = 0x0008,
ArmPushPop_R4 = 0x0010,
ArmPushPop_R5 = 0x0020,
ArmPushPop_R6 = 0x0040,
ArmPushPop_R7 = 0x0080,
ArmPushPop_R8 = 0x0100,
ArmPushPop_R9 = 0x0200,
ArmPushPop_R10 = 0x0400,
ArmPushPop_R11 = 0x0800,
ArmPushPop_R12 = 0x1000,
ArmPushPop_R13 = 0x2000,
ArmPushPop_SP = 0x2000,
ArmPushPop_R14 = 0x4000,
ArmPushPop_LR = 0x4000,
ArmPushPop_R15 = 0x8000,
ArmPushPop_PC = 0x8000,
};
enum ArmCompareType
{
ArmBranch_Equal = 0, // Code = 0000
ArmBranch_Notequal = 1, // Code = 0001
ArmBranch_GreaterThanOrEqual = 10, // Code = 1010
ArmBranch_LessThan = 11, // Code = 1011
ArmBranch_GreaterThan = 12, // Code = 1100
ArmBranch_LessThanOrEqual = 13, // Code = 1101
ArmBranch_Always = 14, // Code = 1110
};
enum ArmItMask
{
ItMask_None,
ItMask_T,
ItMask_E,
ItMask_TT,
ItMask_ET,
ItMask_TE,
ItMask_EE,
ItMask_TTT,
ItMask_ETT,
ItMask_TET,
ItMask_EET,
ItMask_TTE,
ItMask_ETE,
ItMask_TEE,
ItMask_EEE,
};
CArmOps(CCodeBlock & CodeBlock, CArmRegInfo & RegWorkingSet);
// Logging functions
void WriteArmComment(const char * Comment);
void WriteArmLabel(const char * Label);
void AddArmRegToArmReg(ArmReg DestReg, ArmReg SourceReg1, ArmReg SourceReg2);
void AddConstToArmReg(ArmReg DestReg, uint32_t Const);
void AddConstToArmReg(ArmReg DestReg, ArmReg SourceReg, uint32_t Const);
void AndConstToVariable(void * Variable, const char * VariableName, uint32_t Const);
void AndConstToArmReg(ArmReg DestReg, ArmReg SourceReg, uint32_t Const);
void AndArmRegToArmReg(ArmReg DestReg, ArmReg SourceReg1, ArmReg SourceReg2);
void ArmBreakPoint(const char * FileName, uint32_t LineNumber);
void ArmNop(void);
void BranchLabel8(ArmCompareType CompareType, const char * Label);
void BranchLabel20(ArmCompareType CompareType, const char * Label);
void CallFunction(void * Function, const char * FunctionName);
void CompareArmRegToConst(ArmReg Reg, uint32_t value);
void CompareArmRegToArmReg(ArmReg Reg1, ArmReg Reg2);
void IfBlock(ArmItMask mask, ArmCompareType CompareType);
void LoadArmRegPointerByteToArmReg(ArmReg DestReg, ArmReg RegPointer, uint16_t offset);
void LoadArmRegPointerByteToArmReg(ArmReg DestReg, ArmReg RegPointer, ArmReg RegPointer2, uint8_t shift);
void LoadArmRegPointerToArmReg(ArmReg DestReg, ArmReg RegPointer, uint8_t Offset, const char * comment = nullptr);
void LoadArmRegPointerToArmReg(ArmReg DestReg, ArmReg RegPointer, ArmReg RegPointer2, uint8_t shift);
void LoadArmRegPointerToFloatReg(ArmReg RegPointer, ArmFpuSingle Reg, uint8_t Offset);
void LoadFloatingPointControlReg(ArmReg DestReg);
void MoveArmRegArmReg(ArmReg DestReg, ArmReg SourceReg);
void MoveArmRegToVariable(ArmReg Reg, void * Variable, const char * VariableName);
void MoveConstToArmReg(ArmReg DestReg, uint16_t Const, const char * comment = nullptr);
void MoveConstToArmRegTop(ArmReg DestReg, uint16_t Const, const char * comment = nullptr);
void MoveConstToArmReg(ArmReg DestReg, uint32_t Const, const char * comment = nullptr);
void MoveConstToVariable(uint32_t Const, void * Variable, const char * VariableName);
void MoveFloatRegToVariable(ArmFpuSingle reg, void * Variable, const char * VariableName);
void MoveVariableToArmReg(void * Variable, const char * VariableName, ArmReg reg);
void MoveVariableToFloatReg(void * Variable, const char * VariableName, ArmFpuSingle reg);
void OrArmRegToArmReg(ArmReg DestReg, ArmReg SourceReg1, ArmReg SourceReg2, uint32_t shift);
void OrConstToArmReg(ArmReg DestReg, ArmReg SourceReg, uint32_t value);
void OrConstToVariable(void * Variable, const char * VariableName, uint32_t value);
void MulF32(ArmFpuSingle DestReg, ArmFpuSingle SourceReg1, ArmFpuSingle SourceReg2);
void PushArmReg(uint16_t Registers);
void PopArmReg(uint16_t Registers);
void ShiftRightSignImmed(ArmReg DestReg, ArmReg SourceReg, uint32_t shift);
void ShiftRightUnsignImmed(ArmReg DestReg, ArmReg SourceReg, uint32_t shift);
void ShiftLeftImmed(ArmReg DestReg, ArmReg SourceReg, uint32_t shift);
void SignExtendByte(ArmReg Reg);
void StoreArmRegToArmRegPointer(ArmReg DestReg, ArmReg RegPointer, uint8_t Offset, const char * comment = nullptr);
void StoreArmRegToArmRegPointer(ArmReg DestReg, ArmReg RegPointer, ArmReg RegPointer2, uint8_t shift);
void StoreFloatingPointControlReg(ArmReg SourceReg);
void StoreFloatRegToArmRegPointer(ArmFpuSingle Reg, ArmReg RegPointer, uint8_t Offset);
void SubArmRegFromArmReg(ArmReg DestReg, ArmReg SourceReg1, ArmReg SourceReg2);
void SubConstFromArmReg(ArmReg Reg, ArmReg SourceReg, uint32_t Const);
void SubConstFromVariable(uint32_t Const, void * Variable, const char * VariableName);
void TestVariable(uint32_t Const, void * Variable, const char * VariableName);
void XorConstToArmReg(ArmReg DestReg, uint32_t value);
void XorArmRegToArmReg(ArmReg DestReg, ArmReg SourceReg);
void XorArmRegToArmReg(ArmReg DestReg, ArmReg SourceReg1, ArmReg SourceReg2);
void SetJump8(uint8_t * Loc, uint8_t * JumpLoc);
void SetJump20(uint32_t * Loc, uint32_t * JumpLoc);
void FlushPopArmReg(void);
const char * ArmRegName(ArmReg Reg);
uint32_t PushPopRegisterSize(uint16_t Registers);
std::string PushPopRegisterList(uint16_t Registers);
static void * GetAddressOf(int32_t value, ...);
CArmOps(CCodeBlock & CodeBlock);
private:
CArmOps(void);
CArmOps(const CArmOps &);
CArmOps & operator=(const CArmOps &);
void CodeLog(_Printf_format_string_ const char * Text, ...);
void PreOpCheck(ArmReg DestReg, bool AllowedInItBlock, const char * FileName, uint32_t LineNumber);
void BreakPointNotification(const char * FileName, uint32_t LineNumber);
bool ArmCompareInverse(ArmCompareType CompareType);
ArmCompareType ArmCompareInverseType(ArmCompareType CompareType);
const char * ArmCompareSuffix(ArmCompareType CompareType);
const char * ArmFpuSingleName(ArmFpuSingle Reg);
const char * ArmItMaskName(ArmItMask mask);
const char * ArmCurrentItCondition();
void ProgressItBlock(void);
bool CanThumbCompressConst(uint32_t value);
uint16_t ThumbCompressConst(uint32_t value);
void AddCode8(uint8_t value);
void AddCode16(uint16_t value);
void AddCode32(uint32_t value);
CCodeBlock & m_CodeBlock;
CArmRegInfo & m_RegWorkingSet;
bool m_InItBlock;
int m_ItBlockInstruction;
ArmCompareType m_ItBlockCompareType;
ArmItMask m_ItBlockMask;
ArmReg m_LastStoreReg;
uint16_t m_PopRegisters;
uint16_t m_PushRegisters;
};
#define AddressOf(Addr) CArmOps::GetAddressOf(5, (Addr))
#endif
#endif

1874
Source/Project64-core/N64System/Recompiler/Arm/ArmOps.old.cpp Normal file
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257
Source/Project64-core/N64System/Recompiler/Arm/ArmOps.old.h Normal file
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@ -0,0 +1,257 @@
#pragma once
#if defined(__arm__) || defined(_M_ARM)
#if !defined(_MSC_VER) && !defined(_Printf_format_string_)
#define _Printf_format_string_
#endif
#include <Project64-core/Settings/DebugSettings.h>
class CCodeBlock;
class CArmRegInfo;
class CArmOps :
protected CDebugSettings
{
public:
enum ArmReg
{
Arm_R0 = 0,
Arm_R1 = 1,
Arm_R2 = 2,
Arm_R3 = 3,
Arm_R4 = 4,
Arm_R5 = 5,
Arm_R6 = 6,
Arm_R7 = 7,
Arm_R8 = 8,
Arm_R9 = 9,
Arm_R10 = 10,
Arm_R11 = 11,
Arm_R12 = 12,
Arm_R13 = 13,
ArmRegSP = 13,
Arm_R14 = 14,
ArmRegLR = 14,
Arm_R15 = 15,
ArmRegPC = 15,
Arm_Unknown = -1,
Arm_Any = -2,
};
enum ArmFpuSingle
{
Arm_S0 = 0,
Arm_S1 = 1,
Arm_S2 = 2,
Arm_S3 = 3,
Arm_S4 = 4,
Arm_S5 = 5,
Arm_S6 = 6,
Arm_S7 = 7,
Arm_S8 = 8,
Arm_S9 = 9,
Arm_S10 = 10,
Arm_S11 = 11,
Arm_S12 = 12,
Arm_S13 = 13,
Arm_S14 = 14,
Arm_S15 = 15,
Arm_S16 = 16,
Arm_S17 = 17,
Arm_S18 = 18,
Arm_S19 = 19,
Arm_S20 = 20,
Arm_S21 = 21,
Arm_S22 = 22,
Arm_S23 = 23,
Arm_S24 = 24,
Arm_S25 = 25,
Arm_S26 = 26,
Arm_S27 = 27,
Arm_S28 = 28,
Arm_S29 = 29,
Arm_S30 = 30,
Arm_S31 = 31,
};
enum ArmFpuDouble
{
Arm_D0 = 0,
Arm_D1 = 1,
Arm_D2 = 2,
Arm_D3 = 3,
Arm_D4 = 4,
Arm_D5 = 5,
Arm_D6 = 6,
Arm_D7 = 7,
Arm_D8 = 8,
Arm_D9 = 9,
Arm_D10 = 10,
Arm_D11 = 11,
Arm_D12 = 12,
Arm_D13 = 13,
Arm_D14 = 14,
Arm_D15 = 15,
};
enum ArmRegPushPop
{
ArmPushPop_R0 = 0x0001,
ArmPushPop_R1 = 0x0002,
ArmPushPop_R2 = 0x0004,
ArmPushPop_R3 = 0x0008,
ArmPushPop_R4 = 0x0010,
ArmPushPop_R5 = 0x0020,
ArmPushPop_R6 = 0x0040,
ArmPushPop_R7 = 0x0080,
ArmPushPop_R8 = 0x0100,
ArmPushPop_R9 = 0x0200,
ArmPushPop_R10 = 0x0400,
ArmPushPop_R11 = 0x0800,
ArmPushPop_R12 = 0x1000,
ArmPushPop_R13 = 0x2000,
ArmPushPop_SP = 0x2000,
ArmPushPop_R14 = 0x4000,
ArmPushPop_LR = 0x4000,
ArmPushPop_R15 = 0x8000,
ArmPushPop_PC = 0x8000,
};
enum ArmCompareType
{
ArmBranch_Equal = 0, // Code = 0000
ArmBranch_Notequal = 1, // Code = 0001
ArmBranch_GreaterThanOrEqual = 10, // Code = 1010
ArmBranch_LessThan = 11, // Code = 1011
ArmBranch_GreaterThan = 12, // Code = 1100
ArmBranch_LessThanOrEqual = 13, // Code = 1101
ArmBranch_Always = 14, // Code = 1110
};
enum ArmItMask
{
ItMask_None,
ItMask_T,
ItMask_E,
ItMask_TT,
ItMask_ET,
ItMask_TE,
ItMask_EE,
ItMask_TTT,
ItMask_ETT,
ItMask_TET,
ItMask_EET,
ItMask_TTE,
ItMask_ETE,
ItMask_TEE,
ItMask_EEE,
};
CArmOps(CCodeBlock & CodeBlock, CArmRegInfo & RegWorkingSet);
// Logging functions
void WriteArmComment(const char * Comment);
void WriteArmLabel(const char * Label);
void AddArmRegToArmReg(ArmReg DestReg, ArmReg SourceReg1, ArmReg SourceReg2);
void AddConstToArmReg(ArmReg DestReg, uint32_t Const);
void AddConstToArmReg(ArmReg DestReg, ArmReg SourceReg, uint32_t Const);
void AndConstToVariable(void * Variable, const char * VariableName, uint32_t Const);
void AndConstToArmReg(ArmReg DestReg, ArmReg SourceReg, uint32_t Const);
void AndArmRegToArmReg(ArmReg DestReg, ArmReg SourceReg1, ArmReg SourceReg2);
void ArmBreakPoint(const char * FileName, uint32_t LineNumber);
void ArmNop(void);
void BranchLabel8(ArmCompareType CompareType, const char * Label);
void BranchLabel20(ArmCompareType CompareType, const char * Label);
void CallFunction(void * Function, const char * FunctionName);
void CompareArmRegToConst(ArmReg Reg, uint32_t value);
void CompareArmRegToArmReg(ArmReg Reg1, ArmReg Reg2);
void IfBlock(ArmItMask mask, ArmCompareType CompareType);
void LoadArmRegPointerByteToArmReg(ArmReg DestReg, ArmReg RegPointer, uint16_t offset);
void LoadArmRegPointerByteToArmReg(ArmReg DestReg, ArmReg RegPointer, ArmReg RegPointer2, uint8_t shift);
void LoadArmRegPointerToArmReg(ArmReg DestReg, ArmReg RegPointer, uint8_t Offset, const char * comment = nullptr);
void LoadArmRegPointerToArmReg(ArmReg DestReg, ArmReg RegPointer, ArmReg RegPointer2, uint8_t shift);
void LoadArmRegPointerToFloatReg(ArmReg RegPointer, ArmFpuSingle Reg, uint8_t Offset);
void LoadFloatingPointControlReg(ArmReg DestReg);
void MoveArmRegArmReg(ArmReg DestReg, ArmReg SourceReg);
void MoveArmRegToVariable(ArmReg Reg, void * Variable, const char * VariableName);
void MoveConstToArmReg(ArmReg DestReg, uint16_t Const, const char * comment = nullptr);
void MoveConstToArmRegTop(ArmReg DestReg, uint16_t Const, const char * comment = nullptr);
void MoveConstToArmReg(ArmReg DestReg, uint32_t Const, const char * comment = nullptr);
void MoveConstToVariable(uint32_t Const, void * Variable, const char * VariableName);
void MoveFloatRegToVariable(ArmFpuSingle reg, void * Variable, const char * VariableName);
void MoveVariableToArmReg(void * Variable, const char * VariableName, ArmReg reg);
void MoveVariableToFloatReg(void * Variable, const char * VariableName, ArmFpuSingle reg);
void OrArmRegToArmReg(ArmReg DestReg, ArmReg SourceReg1, ArmReg SourceReg2, uint32_t shift);
void OrConstToArmReg(ArmReg DestReg, ArmReg SourceReg, uint32_t value);
void OrConstToVariable(void * Variable, const char * VariableName, uint32_t value);
void MulF32(ArmFpuSingle DestReg, ArmFpuSingle SourceReg1, ArmFpuSingle SourceReg2);
void PushArmReg(uint16_t Registers);
void PopArmReg(uint16_t Registers);
void ShiftRightSignImmed(ArmReg DestReg, ArmReg SourceReg, uint32_t shift);
void ShiftRightUnsignImmed(ArmReg DestReg, ArmReg SourceReg, uint32_t shift);
void ShiftLeftImmed(ArmReg DestReg, ArmReg SourceReg, uint32_t shift);
void SignExtendByte(ArmReg Reg);
void StoreArmRegToArmRegPointer(ArmReg DestReg, ArmReg RegPointer, uint8_t Offset, const char * comment = nullptr);
void StoreArmRegToArmRegPointer(ArmReg DestReg, ArmReg RegPointer, ArmReg RegPointer2, uint8_t shift);
void StoreFloatingPointControlReg(ArmReg SourceReg);
void StoreFloatRegToArmRegPointer(ArmFpuSingle Reg, ArmReg RegPointer, uint8_t Offset);
void SubArmRegFromArmReg(ArmReg DestReg, ArmReg SourceReg1, ArmReg SourceReg2);
void SubConstFromArmReg(ArmReg Reg, ArmReg SourceReg, uint32_t Const);
void SubConstFromVariable(uint32_t Const, void * Variable, const char * VariableName);
void TestVariable(uint32_t Const, void * Variable, const char * VariableName);
void XorConstToArmReg(ArmReg DestReg, uint32_t value);
void XorArmRegToArmReg(ArmReg DestReg, ArmReg SourceReg);
void XorArmRegToArmReg(ArmReg DestReg, ArmReg SourceReg1, ArmReg SourceReg2);
void SetJump8(uint8_t * Loc, uint8_t * JumpLoc);
void SetJump20(uint32_t * Loc, uint32_t * JumpLoc);
void FlushPopArmReg(void);
const char * ArmRegName(ArmReg Reg);
uint32_t PushPopRegisterSize(uint16_t Registers);
std::string PushPopRegisterList(uint16_t Registers);
static void * GetAddressOf(int32_t value, ...);
private:
CArmOps(void);
CArmOps(const CArmOps &);
CArmOps & operator=(const CArmOps &);
void CodeLog(_Printf_format_string_ const char * Text, ...);
void PreOpCheck(ArmReg DestReg, bool AllowedInItBlock, const char * FileName, uint32_t LineNumber);
void BreakPointNotification(const char * FileName, uint32_t LineNumber);
bool ArmCompareInverse(ArmCompareType CompareType);
ArmCompareType ArmCompareInverseType(ArmCompareType CompareType);
const char * ArmCompareSuffix(ArmCompareType CompareType);
const char * ArmFpuSingleName(ArmFpuSingle Reg);
const char * ArmItMaskName(ArmItMask mask);
const char * ArmCurrentItCondition();
void ProgressItBlock(void);
bool CanThumbCompressConst(uint32_t value);
uint16_t ThumbCompressConst(uint32_t value);
void AddCode8(uint8_t value);
void AddCode16(uint16_t value);
void AddCode32(uint32_t value);
CCodeBlock & m_CodeBlock;
CArmRegInfo & m_RegWorkingSet;
bool m_InItBlock;
int m_ItBlockInstruction;
ArmCompareType m_ItBlockCompareType;
ArmItMask m_ItBlockMask;
ArmReg m_LastStoreReg;
uint16_t m_PopRegisters;
uint16_t m_PushRegisters;
};
#define AddressOf(Addr) CArmOps::GetAddressOf(5, (Addr))
#endif

7313
Source/Project64-core/N64System/Recompiler/Arm/ArmRecompilerOps.cpp
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169
Source/Project64-core/N64System/Recompiler/Arm/ArmRecompilerOps.h
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@ -1,26 +1,18 @@
#pragma once
#if defined(__arm__) || defined(_M_ARM)
#include <Project64-core/N64System/Interpreter/InterpreterOps.h>
#include <Project64-core/N64System/Mips/R4300iOpcode.h>
#include <Project64-core/N64System/Mips/Register.h>
#include <Project64-core/N64System/Recompiler/Arm/ArmOps.h>
#include <Project64-core/N64System/Recompiler/ExitInfo.h>
#include <Project64-core/N64System/Recompiler/JumpInfo.h>
#include <Project64-core/N64System/Recompiler/RecompilerOps.h>
#include <Project64-core/N64System/Recompiler/RegInfo.h>
#include <Project64-core/Settings/GameSettings.h>
#include <Project64-core/Settings/N64SystemSettings.h>
#include <Project64-core/Settings/RecompilerSettings.h>
class CMipsMemoryVM;
class CCodeBlock;
class CCodeSection;
struct CJumpInfo;
class CArmRecompilerOps :
protected R4300iOp,
protected CN64SystemSettings,
protected CRecompilerSettings,
private CGameSettings
class CArmRecompilerOps
{
public:
CArmRecompilerOps(CMipsMemoryVM & MMU, CCodeBlock & CodeBlock);
@ -210,9 +202,7 @@ public:
void CompileExitCode();
void CompileCop1Test();
void CompileInPermLoop(CRegInfo & RegSet, uint32_t ProgramCounter);
void OutputRegisterState(const CRegInfo & SyncTo, const CRegInfo & CurrentSet) const;
void SyncRegState(const CRegInfo & SyncTo);
bool SetupRegisterForLoop(CCodeBlock & BlockInfo, const CRegInfo & RegSet);
CRegInfo & GetRegWorkingSet(void);
void SetRegWorkingSet(const CRegInfo & RegInfo);
bool InheritParentInfo();
@ -228,11 +218,7 @@ public:
void PreCompileOpcode(void);
void PostCompileOpcode(void);
void CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo & ExitRegSet, ExitReason Reason);
void CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo & ExitRegSet, ExitReason reason, CArmOps::ArmCompareType CompareType);
void CompileReadTLBMiss(CArmOps::ArmReg AddressReg, CArmOps::ArmReg LookUpReg);
void CompileWriteTLBMiss(CArmOps::ArmReg AddressReg, CArmOps::ArmReg LookUpReg);
void UpdateSyncCPU(CRegInfo & RegSet, uint32_t Cycles);
void UpdateCounters(CRegInfo & RegSet, bool CheckTimer, bool ClearValues = false, bool UpdateTimer = true);
void CompileSystemCheck(uint32_t TargetPC, const CRegInfo & RegSet);
void CompileExecuteBP(void);
@ -243,150 +229,15 @@ public:
return m_Assembler;
}
// Helper functions
typedef CRegInfo::REG_STATE REG_STATE;
private:
CArmRecompilerOps(const CArmRecompilerOps &);
CArmRecompilerOps & operator=(const CArmRecompilerOps &);
REG_STATE GetMipsRegState(int32_t Reg)
{
return m_RegWorkingSet.GetMipsRegState(Reg);
}
uint64_t GetMipsReg(int32_t Reg)
{
return m_RegWorkingSet.GetMipsReg(Reg);
}
uint32_t GetMipsRegLo(int32_t Reg)
{
return m_RegWorkingSet.GetMipsRegLo(Reg);
}
int32_t GetMipsRegLo_S(int32_t Reg)
{
return m_RegWorkingSet.GetMipsRegLo_S(Reg);
}
uint32_t GetMipsRegHi(int32_t Reg)
{
return m_RegWorkingSet.GetMipsRegHi(Reg);
}
int32_t GetMipsRegHi_S(int32_t Reg)
{
return m_RegWorkingSet.GetMipsRegHi_S(Reg);
}
CArmOps::ArmReg GetMipsRegMapLo(int32_t Reg)
{
return m_RegWorkingSet.GetMipsRegMapLo(Reg);
}
CArmOps::ArmReg GetMipsRegMapHi(int32_t Reg)
{
return m_RegWorkingSet.GetMipsRegMapHi(Reg);
}
bool IsKnown(int32_t Reg)
{
return m_RegWorkingSet.IsKnown(Reg);
}
bool IsUnknown(int32_t Reg)
{
return m_RegWorkingSet.IsUnknown(Reg);
}
bool IsMapped(int32_t Reg)
{
return m_RegWorkingSet.IsMapped(Reg);
}
bool IsConst(int32_t Reg)
{
return m_RegWorkingSet.IsConst(Reg);
}
bool IsSigned(int32_t Reg)
{
return m_RegWorkingSet.IsSigned(Reg);
}
bool IsUnsigned(int32_t Reg)
{
return m_RegWorkingSet.IsUnsigned(Reg);
}
bool Is32Bit(int32_t Reg)
{
return m_RegWorkingSet.Is32Bit(Reg);
}
bool Is64Bit(int32_t Reg)
{
return m_RegWorkingSet.Is64Bit(Reg);
}
bool Is32BitMapped(int32_t Reg)
{
return m_RegWorkingSet.Is32BitMapped(Reg);
}
bool Is64BitMapped(int32_t Reg)
{
return m_RegWorkingSet.Is64BitMapped(Reg);
}
void Map_GPR_32bit(int32_t Reg, bool SignValue, int32_t MipsRegToLoad)
{
m_RegWorkingSet.Map_GPR_32bit(Reg, SignValue, MipsRegToLoad);
}
void Map_GPR_64bit(int32_t Reg, int32_t MipsRegToLoad)
{
m_RegWorkingSet.Map_GPR_64bit(Reg, MipsRegToLoad);
}
void UnMap_GPR(uint32_t Reg, bool WriteBackValue)
{
m_RegWorkingSet.UnMap_GPR(Reg, WriteBackValue);
}
void WriteBack_GPR(uint32_t Reg, bool Unmapping)
{
m_RegWorkingSet.WriteBack_GPR(Reg, Unmapping);
}
CArmOps::ArmReg Map_TempReg(CArmOps::ArmReg Reg, int32_t MipsReg, bool LoadHiWord)
{
return m_RegWorkingSet.Map_TempReg(Reg, MipsReg, LoadHiWord);
}
CArmOps::ArmReg Map_Variable(CArmRegInfo::VARIABLE_MAPPED variable, CArmOps::ArmReg Reg = CArmOps::Arm_Any)
{
return m_RegWorkingSet.Map_Variable(variable, Reg);
}
void ResetRegProtection()
{
m_RegWorkingSet.ResetRegProtection();
}
void FixRoundModel(CRegInfo::FPU_ROUND RoundMethod)
{
m_RegWorkingSet.FixRoundModel(RoundMethod);
}
void ProtectGPR(uint32_t Reg)
{
m_RegWorkingSet.ProtectGPR(Reg);
}
void UnProtectGPR(uint32_t Reg)
{
m_RegWorkingSet.UnProtectGPR(Reg);
}
bool UnMap_ArmReg(CArmOps::ArmReg Reg)
{
return m_RegWorkingSet.UnMap_ArmReg(Reg);
}
void SW(bool bCheckLLbit);
void SW_Const(uint32_t Value, uint32_t VAddr);
void SW_Register(CArmOps::ArmReg Reg, uint32_t VAddr);
void LW(bool ResultSigned, bool bRecordLLBit);
void LB_KnownAddress(CArmOps::ArmReg Reg, uint32_t VAddr, bool SignExtend);
void LW_KnownAddress(CArmOps::ArmReg Reg, uint32_t VAddr);
void CompileInterpterCall(void * Function, const char * FunctionName);
void OverflowDelaySlot(bool TestTimer);
EXIT_LIST m_ExitInfo;
CMipsMemoryVM & m_MMU;
CCodeBlock & m_CodeBlock;
CArmOps m_Assembler;
PIPELINE_STAGE m_PipelineStage;
uint32_t m_CompilePC;
R4300iOpcode m_Opcode;
CArmRegInfo m_RegWorkingSet;
CCodeSection * m_Section;
CRegInfo m_RegBeforeDelay;
bool m_EffectDelaySlot;
static uint32_t m_TempValue;
CArmOps m_Assembler;
R4300iOpcode m_Opcode;
};
typedef CArmRecompilerOps CRecompilerOps;
#endif

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Source/Project64-core/N64System/Recompiler/Arm/ArmRecompilerOps.old.cpp Normal file
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1324
Source/Project64-core/N64System/Recompiler/Arm/ArmRegInfo.cpp
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123
Source/Project64-core/N64System/Recompiler/Arm/ArmRegInfo.h
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@ -1,36 +1,14 @@
#pragma once
#if defined(__arm__) || defined(_M_ARM)
#include <Project64-core/N64System/Mips/Register.h>
#include <Project64-core/N64System/Recompiler/Arm/ArmOps.h>
#include <Project64-core/N64System/Recompiler/RegBase.h>
class CCodeBlock;
class CArmOps;
class CArmRegInfo :
public CRegBase,
private CDebugSettings,
private CSystemRegisters
public CRegBase
{
public:
// Enums
enum REG_MAPPED
{
NotMapped = 0,
GPR_Mapped = 1,
Temp_Mapped = 2,
Variable_Mapped = 3,
};
enum VARIABLE_MAPPED
{
VARIABLE_UNKNOWN = 0,
VARIABLE_GPR = 1,
VARIABLE_FPR = 2,
VARIABLE_TLB_READMAP = 3,
VARIABLE_TLB_WRITEMAP = 4,
VARIABLE_TLB_LOAD_ADDRESS = 5,
VARIABLE_TLB_STORE_ADDRESS = 6,
VARIABLE_NEXT_TIMER = 7,
};
CArmRegInfo(CCodeBlock & CodeBlock, CArmOps & Assembler);
CArmRegInfo(const CArmRegInfo &);
~CArmRegInfo();
@ -39,97 +17,6 @@ public:
bool operator==(const CArmRegInfo & right) const;
bool operator!=(const CArmRegInfo & right) const;
void BeforeCallDirect(void);
void AfterCallDirect(void);
void FixRoundModel(FPU_ROUND RoundMethod);
void Map_GPR_32bit(int32_t MipsReg, bool SignValue, int32_t MipsRegToLoad);
void Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad);
CArmOps::ArmReg FreeArmReg(bool TempMapping);
void WriteBackRegisters();
CArmOps::ArmReg Map_TempReg(CArmOps::ArmReg Reg, int32_t MipsReg, bool LoadHiWord);
CArmOps::ArmReg Map_Variable(VARIABLE_MAPPED variable, CArmOps::ArmReg Reg = CArmOps::Arm_Any);
CArmOps::ArmReg GetVariableReg(VARIABLE_MAPPED variable) const;
void ProtectGPR(uint32_t Reg);
void UnProtectGPR(uint32_t Reg);
void UnMap_AllFPRs();
CArmOps::ArmReg UnMap_TempReg(bool TempMapping);
void UnMap_GPR(uint32_t Reg, bool WriteBackValue);
void WriteBack_GPR(uint32_t MipsReg, bool Unmapping);
bool UnMap_ArmReg(CArmOps::ArmReg Reg);
void ResetRegProtection();
inline CArmOps::ArmReg GetMipsRegMapLo(int32_t Reg) const
{
return m_RegMapLo[Reg];
}
inline CArmOps::ArmReg GetMipsRegMapHi(int32_t Reg) const
{
return m_RegMapHi[Reg];
}
inline void SetMipsRegMapLo(int32_t GetMipsReg, CArmOps::ArmReg Reg)
{
m_RegMapLo[GetMipsReg] = Reg;
}
inline void SetMipsRegMapHi(int32_t GetMipsReg, CArmOps::ArmReg Reg)
{
m_RegMapHi[GetMipsReg] = Reg;
}
inline uint32_t GetArmRegMapOrder(CArmOps::ArmReg Reg) const
{
return m_ArmReg_MapOrder[Reg];
}
inline bool GetArmRegProtected(CArmOps::ArmReg Reg) const
{
return m_ArmReg_Protected[Reg];
}
inline REG_MAPPED GetArmRegMapped(CArmOps::ArmReg Reg) const
{
return m_ArmReg_MappedTo[Reg];
}
inline void SetArmRegMapOrder(CArmOps::ArmReg Reg, uint32_t Order)
{
m_ArmReg_MapOrder[Reg] = Order;
}
inline void SetArmRegProtected(CArmOps::ArmReg Reg, bool Protected)
{
m_ArmReg_Protected[Reg] = Protected;
}
inline void SetArmRegMapped(CArmOps::ArmReg Reg, REG_MAPPED Mapping)
{
m_ArmReg_MappedTo[Reg] = Mapping;
}
inline VARIABLE_MAPPED GetVariableMappedTo(CArmOps::ArmReg Reg) const
{
return m_Variable_MappedTo[Reg];
}
inline void SetVariableMappedTo(CArmOps::ArmReg Reg, VARIABLE_MAPPED variable)
{
m_Variable_MappedTo[Reg] = variable;
}
static const char * VariableMapName(VARIABLE_MAPPED variable);
void LogRegisterState(void);
private:
CArmRegInfo();
CCodeBlock & m_CodeBlock;
CArmOps & m_Assembler;
bool ShouldPushPopReg(CArmOps::ArmReg Reg);
CArmOps::ArmReg m_RegMapHi[32];
CArmOps::ArmReg m_RegMapLo[32];
uint32_t m_ArmReg_MapOrder[16];
bool m_ArmReg_Protected[16];
REG_MAPPED m_ArmReg_MappedTo[16];
VARIABLE_MAPPED m_Variable_MappedTo[16];
bool m_InCallDirect;
};
#endif

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135
Source/Project64-core/N64System/Recompiler/Arm/ArmRegInfo.old.h Normal file
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@ -0,0 +1,135 @@
#pragma once
#if defined(__arm__) || defined(_M_ARM)
#include <Project64-core/N64System/Mips/Register.h>
#include <Project64-core/N64System/Recompiler/Arm/ArmOps.h>
#include <Project64-core/N64System/Recompiler/RegBase.h>
class CArmRegInfo :
public CRegBase,
private CDebugSettings,
private CSystemRegisters
{
public:
// Enums
enum REG_MAPPED
{
NotMapped = 0,
GPR_Mapped = 1,
Temp_Mapped = 2,
Variable_Mapped = 3,
};
enum VARIABLE_MAPPED
{
VARIABLE_UNKNOWN = 0,
VARIABLE_GPR = 1,
VARIABLE_FPR = 2,
VARIABLE_TLB_READMAP = 3,
VARIABLE_TLB_WRITEMAP = 4,
VARIABLE_TLB_LOAD_ADDRESS = 5,
VARIABLE_TLB_STORE_ADDRESS = 6,
VARIABLE_NEXT_TIMER = 7,
};
CArmRegInfo(CCodeBlock & CodeBlock, CArmOps & Assembler);
CArmRegInfo(const CArmRegInfo &);
~CArmRegInfo();
CArmRegInfo & operator=(const CArmRegInfo &);
bool operator==(const CArmRegInfo & right) const;
bool operator!=(const CArmRegInfo & right) const;
void BeforeCallDirect(void);
void AfterCallDirect(void);
void FixRoundModel(FPU_ROUND RoundMethod);
void Map_GPR_32bit(int32_t MipsReg, bool SignValue, int32_t MipsRegToLoad);
void Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad);
CArmOps::ArmReg FreeArmReg(bool TempMapping);
void WriteBackRegisters();
CArmOps::ArmReg Map_TempReg(CArmOps::ArmReg Reg, int32_t MipsReg, bool LoadHiWord);
CArmOps::ArmReg Map_Variable(VARIABLE_MAPPED variable, CArmOps::ArmReg Reg = CArmOps::Arm_Any);
CArmOps::ArmReg GetVariableReg(VARIABLE_MAPPED variable) const;
void ProtectGPR(uint32_t Reg);
void UnProtectGPR(uint32_t Reg);
void UnMap_AllFPRs();
CArmOps::ArmReg UnMap_TempReg(bool TempMapping);
void UnMap_GPR(uint32_t Reg, bool WriteBackValue);
void WriteBack_GPR(uint32_t MipsReg, bool Unmapping);
bool UnMap_ArmReg(CArmOps::ArmReg Reg);
void ResetRegProtection();
inline CArmOps::ArmReg GetMipsRegMapLo(int32_t Reg) const
{
return m_RegMapLo[Reg];
}
inline CArmOps::ArmReg GetMipsRegMapHi(int32_t Reg) const
{
return m_RegMapHi[Reg];
}
inline void SetMipsRegMapLo(int32_t GetMipsReg, CArmOps::ArmReg Reg)
{
m_RegMapLo[GetMipsReg] = Reg;
}
inline void SetMipsRegMapHi(int32_t GetMipsReg, CArmOps::ArmReg Reg)
{
m_RegMapHi[GetMipsReg] = Reg;
}
inline uint32_t GetArmRegMapOrder(CArmOps::ArmReg Reg) const
{
return m_ArmReg_MapOrder[Reg];
}
inline bool GetArmRegProtected(CArmOps::ArmReg Reg) const
{
return m_ArmReg_Protected[Reg];
}
inline REG_MAPPED GetArmRegMapped(CArmOps::ArmReg Reg) const
{
return m_ArmReg_MappedTo[Reg];
}
inline void SetArmRegMapOrder(CArmOps::ArmReg Reg, uint32_t Order)
{
m_ArmReg_MapOrder[Reg] = Order;
}
inline void SetArmRegProtected(CArmOps::ArmReg Reg, bool Protected)
{
m_ArmReg_Protected[Reg] = Protected;
}
inline void SetArmRegMapped(CArmOps::ArmReg Reg, REG_MAPPED Mapping)
{
m_ArmReg_MappedTo[Reg] = Mapping;
}
inline VARIABLE_MAPPED GetVariableMappedTo(CArmOps::ArmReg Reg) const
{
return m_Variable_MappedTo[Reg];
}
inline void SetVariableMappedTo(CArmOps::ArmReg Reg, VARIABLE_MAPPED variable)
{
m_Variable_MappedTo[Reg] = variable;
}
static const char * VariableMapName(VARIABLE_MAPPED variable);
void LogRegisterState(void);
private:
CArmRegInfo();
CCodeBlock & m_CodeBlock;
CArmOps & m_Assembler;
bool ShouldPushPopReg(CArmOps::ArmReg Reg);
CArmOps::ArmReg m_RegMapHi[32];
CArmOps::ArmReg m_RegMapLo[32];
uint32_t m_ArmReg_MapOrder[16];
bool m_ArmReg_Protected[16];
REG_MAPPED m_ArmReg_MappedTo[16];
VARIABLE_MAPPED m_Variable_MappedTo[16];
bool m_InCallDirect;
};
#endif

5
Source/Project64-core/N64System/Recompiler/RecompilerOps.h
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@ -38,18 +38,13 @@ enum RecompilerTrapCompare
#if defined(__i386__) || defined(_M_IX86)
#include <Project64-core/N64System/Recompiler/x86/x86RecompilerOps.h>
typedef CX86RecompilerOps CRecompilerOps;
#elif defined(__amd64__) || defined(_M_X64)
#include <Project64-core/N64System/Recompiler/x64-86/x64RecompilerOps.h>
#elif defined(__arm__) || defined(_M_ARM)
#include <Project64-core/N64System/Recompiler/Arm/ArmRecompilerOps.h>
typedef CArmRecompilerOps CRecompilerOps;
#elif defined(__aarch64__)
#include <Project64-core/N64System/Recompiler/Aarch64/Aarch64RecompilerOps.h>
#endif

2
Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.h
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@ -458,4 +458,6 @@ private:
static uint32_t m_BranchCompare;
};
typedef CX86RecompilerOps CRecompilerOps;
#endif