Project64-core: Move handling of RDRam Interface Register handling to its own file
This commit is contained in:
parent
7e80d952cb
commit
eafcb96c01
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@ -200,26 +200,6 @@ void CLogging::Log_LW(uint32_t PC, uint32_t VAddr)
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case 0xA4600030: LogMessage("%08X: read from PI_BSD_DOM2_RLS_REG (%08X)", PC, Value); return;
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}
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}
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if (VAddr >= 0xA4700000 && VAddr <= 0xA470001C)
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{
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if (!LogRDRAMInterface())
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{
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return;
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}
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g_MMU->LW_VAddr(VAddr, Value);
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switch (VAddr)
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{
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case 0xA4700000: LogMessage("%08X: read from RI_MODE_REG (%08X)", PC, Value); return;
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case 0xA4700004: LogMessage("%08X: read from RI_CONFIG_REG (%08X)", PC, Value); return;
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case 0xA4700008: LogMessage("%08X: read from RI_CURRENT_LOAD_REG (%08X)", PC, Value); return;
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case 0xA470000C: LogMessage("%08X: read from RI_SELECT_REG (%08X)", PC, Value); return;
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case 0xA4700010: LogMessage("%08X: read from RI_REFRESH_REG/RI_COUNT_REG (%08X)", PC, Value); return;
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case 0xA4700014: LogMessage("%08X: read from RI_LATENCY_REG (%08X)", PC, Value); return;
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case 0xA4700018: LogMessage("%08X: read from RI_RERROR_REG (%08X)", PC, Value); return;
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case 0xA470001C: LogMessage("%08X: read from RI_WERROR_REG (%08X)", PC, Value); return;
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}
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}
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if (VAddr == 0xA4800000)
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{
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if (!LogSerialInterface())
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@ -494,24 +474,6 @@ void CLogging::Log_SW(uint32_t PC, uint32_t VAddr, uint32_t Value)
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case 0xA4600030: LogMessage("%08X: Writing 0x%08X to PI_BSD_DOM2_RLS_REG", PC, Value); return;
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}
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}
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if (VAddr >= 0xA4700000 && VAddr <= 0xA470001C)
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{
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if (!LogRDRAMInterface())
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{
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return;
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}
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switch (VAddr)
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{
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case 0xA4700000: LogMessage("%08X: Writing 0x%08X to RI_MODE_REG", PC, Value); return;
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case 0xA4700004: LogMessage("%08X: Writing 0x%08X to RI_CONFIG_REG", PC, Value); return;
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case 0xA4700008: LogMessage("%08X: Writing 0x%08X to RI_CURRENT_LOAD_REG", PC, Value); return;
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case 0xA470000C: LogMessage("%08X: Writing 0x%08X to RI_SELECT_REG", PC, Value); return;
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case 0xA4700010: LogMessage("%08X: Writing 0x%08X to RI_REFRESH_REG/RI_COUNT_REG", PC, Value); return;
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case 0xA4700014: LogMessage("%08X: Writing 0x%08X to RI_LATENCY_REG", PC, Value); return;
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case 0xA4700018: LogMessage("%08X: Writing 0x%08X to RI_RERROR_REG", PC, Value); return;
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case 0xA470001C: LogMessage("%08X: Writing 0x%08X to RI_WERROR_REG", PC, Value); return;
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}
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}
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if (VAddr == 0xA4800000)
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{
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if (!LogSerialInterface())
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@ -0,0 +1,8 @@
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#pragma once
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#include <stdint.h>
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__interface MemoryHandler
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{
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bool Read32(uint32_t Address, uint32_t & Value);
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bool Write32(uint32_t Address, uint32_t Value, uint32_t Mask);
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};
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@ -0,0 +1,106 @@
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#include "stdafx.h"
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#include <Project64-core\N64System\SystemGlobals.h>
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#include <Project64-core\N64System\Mips\Register.h>
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#include "RDRAMInterfaceHandler.h"
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RDRAMInterfaceReg::RDRAMInterfaceReg(uint32_t * RdramInterface) :
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RI_MODE_REG(RdramInterface[0]),
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RI_CONFIG_REG(RdramInterface[1]),
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RI_CURRENT_LOAD_REG(RdramInterface[2]),
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RI_SELECT_REG(RdramInterface[3]),
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RI_COUNT_REG(RdramInterface[4]),
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RI_REFRESH_REG(RdramInterface[4]),
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RI_LATENCY_REG(RdramInterface[5]),
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RI_RERROR_REG(RdramInterface[6]),
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RI_WERROR_REG(RdramInterface[7])
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{
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}
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RDRAMInterfaceHandler::RDRAMInterfaceHandler(CRegisters & Reg) :
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RDRAMInterfaceReg(Reg.m_RDRAM_Interface),
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m_PC(Reg.m_PROGRAM_COUNTER)
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{
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}
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bool RDRAMInterfaceHandler::Read32(uint32_t Address, uint32_t & Value)
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{
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switch (Address & 0x1FFFFFFF)
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{
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case 0x04700000: Value = RI_MODE_REG; break;
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case 0x04700004: Value = RI_CONFIG_REG; break;
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case 0x04700008: Value = RI_CURRENT_LOAD_REG; break;
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case 0x0470000C: Value = RI_SELECT_REG; break;
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case 0x04700010: Value = RI_REFRESH_REG; break;
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case 0x04700014: Value = RI_LATENCY_REG; break;
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case 0x04700018: Value = RI_RERROR_REG; break;
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case 0x0470001C: Value = RI_WERROR_REG; break;
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default:
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Value = 0;
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if (HaveDebugger())
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}
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if (GenerateLog() && LogRDRAMInterface())
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{
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switch (Address & 0x1FFFFFFF)
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{
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case 0x04700000: LogMessage("%08X: read from RI_MODE_REG (%08X)", m_PC, Value); break;
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case 0x04700004: LogMessage("%08X: read from RI_CONFIG_REG (%08X)", m_PC, Value); break;
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case 0x04700008: LogMessage("%08X: read from RI_CURRENT_LOAD_REG (%08X)", m_PC, Value); break;
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case 0x0470000C: LogMessage("%08X: read from RI_SELECT_REG (%08X)", m_PC, Value); break;
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case 0x04700010: LogMessage("%08X: read from RI_REFRESH_REG/RI_COUNT_REG (%08X)", m_PC, Value); break;
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case 0x04700014: LogMessage("%08X: read from RI_LATENCY_REG (%08X)", m_PC, Value); break;
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case 0x04700018: LogMessage("%08X: read from RI_RERROR_REG (%08X)", m_PC, Value); break;
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case 0x0470001C: LogMessage("%08X: read from RI_WERROR_REG (%08X)", m_PC, Value); break;
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default:
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if (HaveDebugger())
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}
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}
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return true;
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}
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bool RDRAMInterfaceHandler::Write32(uint32_t Address, uint32_t Value, uint32_t Mask)
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{
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if (GenerateLog() && LogRDRAMInterface())
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{
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switch (Address & 0x1FFFFFFF)
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{
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case 0x04700000: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RI_MODE_REG", m_PC, Value, Mask); break;
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case 0x04700004: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RI_CONFIG_REG", m_PC, Value, Mask); break;
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case 0x04700008: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RI_CURRENT_LOAD_REG", m_PC, Value, Mask); break;
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case 0x0470000C: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RI_SELECT_REG", m_PC, Value, Mask); break;
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case 0x04700010: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RI_REFRESH_REG/RI_COUNT_REG", m_PC, Value, Mask); break;
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case 0x04700014: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RI_LATENCY_REG", m_PC, Value, Mask); break;
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case 0x04700018: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RI_RERROR_REG", m_PC, Value, Mask); break;
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case 0x0470001C: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RI_WERROR_REG", m_PC, Value, Mask); break;
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default:
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if (HaveDebugger())
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}
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}
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switch (Address & 0x1FFFFFFF)
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{
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case 0x04700000: RI_MODE_REG = (RI_MODE_REG & ~Mask) | (Value & Mask); break;
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case 0x04700004: RI_CONFIG_REG = (RI_CONFIG_REG & ~Mask) | (Value & Mask); break;
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case 0x04700008: RI_CURRENT_LOAD_REG = (RI_CURRENT_LOAD_REG & ~Mask) | (Value & Mask); break;
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case 0x0470000C: RI_SELECT_REG = (RI_SELECT_REG & ~Mask) | (Value & Mask); break;
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case 0x04700010: RI_REFRESH_REG = (RI_REFRESH_REG & ~Mask) | (Value & Mask); break;
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case 0x04700014: RI_LATENCY_REG = (RI_LATENCY_REG & ~Mask) | (Value & Mask); break;
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case 0x04700018: RI_RERROR_REG = (RI_RERROR_REG & ~Mask) | (Value & Mask); break;
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case 0x0470001C: RI_WERROR_REG = (RI_WERROR_REG & ~Mask) | (Value & Mask); break;
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default:
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if (HaveDebugger())
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}
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return true;
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}
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@ -0,0 +1,48 @@
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#pragma once
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#include "MemoryHandler.h"
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#include <Project64-core\Settings\DebugSettings.h>
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#include <Project64-core\Logging.h>
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#include <stdint.h>
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class RDRAMInterfaceReg
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{
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protected:
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RDRAMInterfaceReg(uint32_t * RdramInterface);
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public:
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uint32_t & RI_MODE_REG;
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uint32_t & RI_CONFIG_REG;
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uint32_t & RI_CURRENT_LOAD_REG;
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uint32_t & RI_SELECT_REG;
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uint32_t & RI_COUNT_REG;
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uint32_t & RI_REFRESH_REG;
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uint32_t & RI_LATENCY_REG;
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uint32_t & RI_RERROR_REG;
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uint32_t & RI_WERROR_REG;
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private:
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RDRAMInterfaceReg();
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RDRAMInterfaceReg(const RDRAMInterfaceReg &);
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RDRAMInterfaceReg & operator=(const RDRAMInterfaceReg &);
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};
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class CRegisters;
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class RDRAMInterfaceHandler :
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public MemoryHandler,
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private RDRAMInterfaceReg,
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private CDebugSettings,
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private CLogging
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{
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public:
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RDRAMInterfaceHandler(CRegisters & Reg);
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bool Read32(uint32_t Address, uint32_t & Value);
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bool Write32(uint32_t Address, uint32_t Value, uint32_t Mask);
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private:
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RDRAMInterfaceHandler();
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RDRAMInterfaceHandler(const RDRAMInterfaceHandler &);
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RDRAMInterfaceHandler & operator=(const RDRAMInterfaceHandler &);
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uint32_t & m_PC;
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};
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@ -1,13 +1,13 @@
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#include "stdafx.h"
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#include <Project64-core/N64System/Mips/MemoryVirtualMem.h>
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#include <Project64-core/N64System/SystemGlobals.h>
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#include <Project64-core/N64System/N64Rom.h>
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#include <Project64-core/N64System/N64System.h>
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#include <Project64-core/N64System/Recompiler/RecompilerCodeLog.h>
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#include <Project64-core/N64System/Mips/OpcodeName.h>
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#include <Project64-core/N64System/Mips/Disk.h>
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#include <Project64-core/ExceptionHandler.h>
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#include <Project64-core\N64System\Mips\MemoryVirtualMem.h>
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#include <Project64-core\N64System\SystemGlobals.h>
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#include <Project64-core\N64System\N64Rom.h>
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#include <Project64-core\N64System\N64System.h>
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#include <Project64-core\N64System\Recompiler\RecompilerCodeLog.h>
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#include <Project64-core\N64System\Mips\OpcodeName.h>
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#include <Project64-core\N64System\Mips\Disk.h>
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#include <Project64-core\ExceptionHandler.h>
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#include <stdio.h>
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#include <Common/MemoryManagement.h>
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@ -21,12 +21,14 @@ uint32_t CMipsMemoryVM::RegModValue;
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#pragma warning(disable:4355) // Disable 'this' : used in base member initializer list
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CMipsMemoryVM::CMipsMemoryVM(bool SavesReadOnly) :
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CMipsMemoryVM::CMipsMemoryVM(CRegisters & Reg, bool SavesReadOnly) :
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CPifRam(SavesReadOnly),
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CFlashram(SavesReadOnly),
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CSram(SavesReadOnly),
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CDMA(*this, *this),
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m_Reg(Reg),
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m_RomMapped(false),
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m_RDRAMInterfaceHandler(Reg),
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m_Rom(nullptr),
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m_RomSize(0),
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m_RomWrittenTo(false),
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@ -697,7 +699,7 @@ bool CMipsMemoryVM::LW_NonMemory(uint32_t PAddr, uint32_t* Value)
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case 0x04400000: Load32VideoInterface(); break;
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case 0x04500000: Load32AudioInterface(); break;
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case 0x04600000: Load32PeripheralInterface(); break;
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case 0x04700000: Load32RDRAMInterface(); break;
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case 0x04700000: m_RDRAMInterfaceHandler.Read32(PAddr, m_MemLookupValue.UW[0]); break;
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case 0x04800000: Load32SerialInterface(); break;
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case 0x05000000: Load32CartridgeDomain2Address1(); break;
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case 0x06000000: Load32CartridgeDomain1Address1(); break;
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@ -861,7 +863,7 @@ bool CMipsMemoryVM::SW_NonMemory(uint32_t PAddr, uint32_t Value)
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case 0x04400000: Write32VideoInterface(); break;
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case 0x04500000: Write32AudioInterface(); break;
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case 0x04600000: Write32PeripheralInterface(); break;
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case 0x04700000: Write32RDRAMInterface(); break;
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case 0x04700000: m_RDRAMInterfaceHandler.Write32(PAddr, Value, 0xFFFFFFFF); break;
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case 0x04800000: Write32SerialInterface(); break;
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case 0x05000000: Write32CartridgeDomain2Address1(); break;
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case 0x08000000: Write32CartridgeDomain2Address2(); break;
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@ -1395,27 +1397,6 @@ void CMipsMemoryVM::Load32PeripheralInterface(void)
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}
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}
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void CMipsMemoryVM::Load32RDRAMInterface(void)
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{
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switch (m_MemLookupAddress & 0x1FFFFFFF)
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{
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case 0x04700000: m_MemLookupValue.UW[0] = g_Reg->RI_MODE_REG; break;
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case 0x04700004: m_MemLookupValue.UW[0] = g_Reg->RI_CONFIG_REG; break;
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case 0x04700008: m_MemLookupValue.UW[0] = g_Reg->RI_CURRENT_LOAD_REG; break;
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case 0x0470000C: m_MemLookupValue.UW[0] = g_Reg->RI_SELECT_REG; break;
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case 0x04700010: m_MemLookupValue.UW[0] = g_Reg->RI_REFRESH_REG; break;
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case 0x04700014: m_MemLookupValue.UW[0] = g_Reg->RI_LATENCY_REG; break;
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case 0x04700018: m_MemLookupValue.UW[0] = g_Reg->RI_RERROR_REG; break;
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case 0x0470001C: m_MemLookupValue.UW[0] = g_Reg->RI_WERROR_REG; break;
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default:
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m_MemLookupValue.UW[0] = 0;
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if (HaveDebugger())
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}
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}
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void CMipsMemoryVM::Load32SerialInterface(void)
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{
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switch (m_MemLookupAddress & 0x1FFFFFFF)
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@ -2090,26 +2071,6 @@ void CMipsMemoryVM::Write32PeripheralInterface(void)
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}
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}
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void CMipsMemoryVM::Write32RDRAMInterface(void)
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{
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switch (m_MemLookupAddress & 0xFFFFFFF)
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{
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case 0x04700000: g_Reg->RI_MODE_REG = m_MemLookupValue.UW[0]; break;
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case 0x04700004: g_Reg->RI_CONFIG_REG = m_MemLookupValue.UW[0]; break;
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case 0x04700008: g_Reg->RI_CURRENT_LOAD_REG = m_MemLookupValue.UW[0]; break;
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case 0x0470000C: g_Reg->RI_SELECT_REG = m_MemLookupValue.UW[0]; break;
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case 0x04700010: g_Reg->RI_REFRESH_REG = m_MemLookupValue.UW[0]; break;
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case 0x04700014: g_Reg->RI_LATENCY_REG = m_MemLookupValue.UW[0]; break;
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case 0x04700018: g_Reg->RI_RERROR_REG = m_MemLookupValue.UW[0]; break;
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case 0x0470001C: g_Reg->RI_WERROR_REG = m_MemLookupValue.UW[0]; break;
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default:
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if (HaveDebugger())
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}
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}
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void CMipsMemoryVM::Write32SerialInterface(void)
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{
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switch (m_MemLookupAddress & 0xFFFFFFF)
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@ -1,12 +1,13 @@
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#pragma once
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#include <Project64-core/N64System/Mips/MemoryVirtualMem.h>
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#include <Project64-core\N64System\Mips\MemoryVirtualMem.h>
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#include "TranslateVaddr.h"
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#include <Project64-core/N64System/Recompiler/RecompilerOps.h>
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#include <Project64-core/N64System/Interpreter/InterpreterOps.h>
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#include <Project64-core/N64System/Mips/PifRam.h>
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#include <Project64-core/N64System/Mips/FlashRam.h>
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#include <Project64-core/N64System/Mips/Sram.h>
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#include <Project64-core/N64System/Mips/Dma.h>
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#include <Project64-core\N64System\Recompiler\RecompilerOps.h>
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#include <Project64-core\N64System\Interpreter\InterpreterOps.h>
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#include <Project64-core\N64System\Mips\PifRam.h>
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#include <Project64-core\N64System\Mips\FlashRam.h>
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#include <Project64-core\N64System\Mips\Sram.h>
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#include <Project64-core\N64System\Mips\Dma.h>
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#include <Project64-core\N64System\MemoryHandler\RDRAMInterfaceHandler.h>
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#include <Project64-core\Settings\GameSettings.h>
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#ifdef __arm__
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@ -45,7 +46,7 @@ class CMipsMemoryVM :
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private CGameSettings
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{
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public:
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CMipsMemoryVM(bool SavesReadOnly);
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CMipsMemoryVM(CRegisters & Reg, bool SavesReadOnly);
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~CMipsMemoryVM();
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static void ReserveMemory();
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@ -138,7 +139,6 @@ private:
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static void Load32VideoInterface(void);
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static void Load32AudioInterface(void);
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static void Load32PeripheralInterface(void);
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static void Load32RDRAMInterface(void);
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static void Load32SerialInterface(void);
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static void Load32CartridgeDomain1Address1(void);
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static void Load32CartridgeDomain1Address3(void);
|
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|
@ -154,7 +154,6 @@ private:
|
|||
static void Write32VideoInterface(void);
|
||||
static void Write32AudioInterface(void);
|
||||
static void Write32PeripheralInterface(void);
|
||||
static void Write32RDRAMInterface(void);
|
||||
static void Write32SerialInterface(void);
|
||||
static void Write32CartridgeDomain2Address1(void);
|
||||
static void Write32CartridgeDomain2Address2(void);
|
||||
|
@ -185,6 +184,8 @@ private:
|
|||
void FreeMemory();
|
||||
|
||||
static uint8_t * m_Reserve1, *m_Reserve2;
|
||||
CRegisters & m_Reg;
|
||||
RDRAMInterfaceHandler m_RDRAMInterfaceHandler;
|
||||
uint8_t * m_RDRAM, *m_DMEM, *m_IMEM;
|
||||
uint32_t m_AllocatedRdramSize;
|
||||
bool m_RomMapped;
|
||||
|
|
|
@ -156,19 +156,6 @@ PeripheralInterfaceReg::PeripheralInterfaceReg(uint32_t * PeripheralInterface) :
|
|||
{
|
||||
}
|
||||
|
||||
RDRAMInt_InterfaceReg::RDRAMInt_InterfaceReg(uint32_t * RdramInterface) :
|
||||
RI_MODE_REG(RdramInterface[0]),
|
||||
RI_CONFIG_REG(RdramInterface[1]),
|
||||
RI_CURRENT_LOAD_REG(RdramInterface[2]),
|
||||
RI_SELECT_REG(RdramInterface[3]),
|
||||
RI_COUNT_REG(RdramInterface[4]),
|
||||
RI_REFRESH_REG(RdramInterface[4]),
|
||||
RI_LATENCY_REG(RdramInterface[5]),
|
||||
RI_RERROR_REG(RdramInterface[6]),
|
||||
RI_WERROR_REG(RdramInterface[7])
|
||||
{
|
||||
}
|
||||
|
||||
DisplayControlReg::DisplayControlReg(uint32_t * _DisplayProcessor) :
|
||||
DPC_START_REG(_DisplayProcessor[0]),
|
||||
DPC_END_REG(_DisplayProcessor[1]),
|
||||
|
@ -236,7 +223,7 @@ CRegisters::CRegisters(CN64System * System, CSystemEvents * SystemEvents) :
|
|||
Video_InterfaceReg(m_Video_Interface),
|
||||
AudioInterfaceReg(m_Audio_Interface),
|
||||
PeripheralInterfaceReg(m_Peripheral_Interface),
|
||||
RDRAMInt_InterfaceReg(m_RDRAM_Interface),
|
||||
RDRAMInterfaceReg(m_RDRAM_Interface),
|
||||
SigProcessor_InterfaceReg(m_SigProcessor_Interface),
|
||||
DisplayControlReg(m_Display_ControlReg),
|
||||
Serial_InterfaceReg(m_SerialInterface),
|
||||
|
|
|
@ -1,10 +1,11 @@
|
|||
#pragma once
|
||||
|
||||
#include <Common/Platform.h>
|
||||
#include <Project64-core/N64System/N64Types.h>
|
||||
#include <Project64-core/Settings/DebugSettings.h>
|
||||
#include <Project64-core/Settings/GameSettings.h>
|
||||
#include <Project64-core/Logging.h>
|
||||
#include <Project64-core\N64System\N64Types.h>
|
||||
#include <Project64-core\N64System\MemoryHandler\RDRAMInterfaceHandler.h>
|
||||
#include <Project64-core\Settings\DebugSettings.h>
|
||||
#include <Project64-core\Settings\GameSettings.h>
|
||||
#include <Project64-core\Logging.h>
|
||||
|
||||
// CPO registers by name
|
||||
class CP0registers
|
||||
|
@ -341,28 +342,6 @@ private:
|
|||
PeripheralInterfaceReg& operator=(const PeripheralInterfaceReg&);
|
||||
};
|
||||
|
||||
class RDRAMInt_InterfaceReg
|
||||
{
|
||||
protected:
|
||||
RDRAMInt_InterfaceReg (uint32_t * RdramInterface);
|
||||
|
||||
public:
|
||||
uint32_t & RI_MODE_REG;
|
||||
uint32_t & RI_CONFIG_REG;
|
||||
uint32_t & RI_CURRENT_LOAD_REG;
|
||||
uint32_t & RI_SELECT_REG;
|
||||
uint32_t & RI_COUNT_REG;
|
||||
uint32_t & RI_REFRESH_REG;
|
||||
uint32_t & RI_LATENCY_REG;
|
||||
uint32_t & RI_RERROR_REG;
|
||||
uint32_t & RI_WERROR_REG;
|
||||
|
||||
private:
|
||||
RDRAMInt_InterfaceReg();
|
||||
RDRAMInt_InterfaceReg(const RDRAMInt_InterfaceReg&);
|
||||
RDRAMInt_InterfaceReg& operator=(const RDRAMInt_InterfaceReg&);
|
||||
};
|
||||
|
||||
// Signal processor interface
|
||||
class SigProcessor_InterfaceReg
|
||||
{
|
||||
|
@ -577,7 +556,7 @@ class CRegisters :
|
|||
public Video_InterfaceReg,
|
||||
public AudioInterfaceReg,
|
||||
public PeripheralInterfaceReg,
|
||||
public RDRAMInt_InterfaceReg,
|
||||
public RDRAMInterfaceReg,
|
||||
public SigProcessor_InterfaceReg,
|
||||
public DisplayControlReg,
|
||||
public Serial_InterfaceReg,
|
||||
|
|
|
@ -30,7 +30,7 @@ CN64System::CN64System(CPlugins * Plugins, uint32_t randomizer_seed, bool SavesR
|
|||
m_Plugins(Plugins),
|
||||
m_SyncCPU(nullptr),
|
||||
m_SyncPlugins(nullptr),
|
||||
m_MMU_VM(SavesReadOnly),
|
||||
m_MMU_VM(m_Reg, SavesReadOnly),
|
||||
//m_Cheats(m_MMU_VM),
|
||||
m_TLB(this),
|
||||
m_Reg(this, this),
|
||||
|
|
|
@ -53,6 +53,7 @@
|
|||
<ClCompile Include="N64System\Interpreter\InterpreterCPU.cpp" />
|
||||
<ClCompile Include="N64System\Interpreter\InterpreterOps.cpp" />
|
||||
<ClCompile Include="N64System\Interpreter\InterpreterOps32.cpp" />
|
||||
<ClCompile Include="N64System\MemoryHandler\RDRAMInterfaceHandler.cpp" />
|
||||
<ClCompile Include="N64System\Mips\Audio.cpp" />
|
||||
<ClCompile Include="N64System\Mips\Disk.cpp" />
|
||||
<ClCompile Include="N64System\Mips\Dma.cpp" />
|
||||
|
@ -148,6 +149,8 @@
|
|||
<ClInclude Include="N64System\Interpreter\InterpreterCPU.h" />
|
||||
<ClInclude Include="N64System\Interpreter\InterpreterOps32.h" />
|
||||
<ClInclude Include="N64System\Interpreter\InterpreterOps.h" />
|
||||
<ClInclude Include="N64System\MemoryHandler\MemoryHandler.h" />
|
||||
<ClInclude Include="N64System\MemoryHandler\RDRAMInterfaceHandler.h" />
|
||||
<ClInclude Include="N64System\Mips\Audio.h" />
|
||||
<ClInclude Include="N64System\Mips\Disk.h" />
|
||||
<ClInclude Include="N64System\Mips\Dma.h" />
|
||||
|
|
|
@ -94,6 +94,12 @@
|
|||
<Filter Include="Header Files\N64 System\Enhancement">
|
||||
<UniqueIdentifier>{ec73ae9e-54e8-4cbe-93fb-1d98d6755619}</UniqueIdentifier>
|
||||
</Filter>
|
||||
<Filter Include="Header Files\N64 System\MemoryHandler">
|
||||
<UniqueIdentifier>{3e6f4352-4933-4138-bbed-1094b988638e}</UniqueIdentifier>
|
||||
</Filter>
|
||||
<Filter Include="Source Files\N64 System\MemoryHandler">
|
||||
<UniqueIdentifier>{f32cf723-4acb-4d3d-9bd9-05823579f8dd}</UniqueIdentifier>
|
||||
</Filter>
|
||||
</ItemGroup>
|
||||
<ItemGroup>
|
||||
<ClCompile Include="stdafx.cpp">
|
||||
|
@ -351,6 +357,9 @@
|
|||
<ClCompile Include="N64System\N64Rom.cpp">
|
||||
<Filter>Source Files</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="N64System\MemoryHandler\RDRAMInterfaceHandler.cpp">
|
||||
<Filter>Source Files\N64 System\MemoryHandler</Filter>
|
||||
</ClCompile>
|
||||
</ItemGroup>
|
||||
<ItemGroup>
|
||||
<ClInclude Include="stdafx.h">
|
||||
|
@ -668,6 +677,12 @@
|
|||
<ClInclude Include="N64System\Enhancement\EnhancementList.h">
|
||||
<Filter>Header Files\N64 System\Enhancement</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="N64System\MemoryHandler\RDRAMInterfaceHandler.h">
|
||||
<Filter>Header Files\N64 System\MemoryHandler</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="N64System\MemoryHandler\MemoryHandler.h">
|
||||
<Filter>Header Files\N64 System\MemoryHandler</Filter>
|
||||
</ClInclude>
|
||||
</ItemGroup>
|
||||
<ItemGroup>
|
||||
<None Include="Version.h.in">
|
||||
|
|
Loading…
Reference in New Issue