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[Project64] Move Logging.cpp to User Interface/LoggingUI.cpp

This commit is contained in:
zilmar 2015-11-13 17:34:57 +11:00
parent fdc7af3004
commit e87c8de107
11 changed files with 2118 additions and 2116 deletions
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919
Source/Project64/Logging.cpp
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@ -1,919 +0,0 @@
/****************************************************************************
* *
* Project64 - A Nintendo 64 emulator. *
* http://www.pj64-emu.com/ *
* Copyright (C) 2012 Project64. All rights reserved. *
* *
* License: *
* GNU/GPLv2 http://www.gnu.org/licenses/gpl-2.0.html *
* *
****************************************************************************/
#include "stdafx.h"
#include <prsht.h>
void LoadLogSetting (HKEY hKey,char * String, bool * Value);
void SaveLogOptions (void);
LRESULT CALLBACK LogGeneralProc ( HWND, UINT, WPARAM, LPARAM );
LRESULT CALLBACK LogPifProc ( HWND, UINT, WPARAM, LPARAM );
LRESULT CALLBACK LogRegProc ( HWND, UINT, WPARAM, LPARAM );
static HANDLE g_hLogFile = NULL;
LOG_OPTIONS g_LogOptions, TempOptions;
void EnterLogOptions(HWND hwndOwner)
{
PROPSHEETPAGE psp[3];
PROPSHEETHEADER psh;
psp[0].dwSize = sizeof(PROPSHEETPAGE);
psp[0].dwFlags = PSP_USETITLE;
psp[0].hInstance = GetModuleHandle(NULL);
psp[0].pszTemplate = MAKEINTRESOURCE(IDD_Logging_Registers);
psp[0].pfnDlgProc = (DLGPROC)LogRegProc;
psp[0].pszTitle = "Registers";
psp[0].lParam = 0;
psp[0].pfnCallback = NULL;
psp[1].dwSize = sizeof(PROPSHEETPAGE);
psp[1].dwFlags = PSP_USETITLE;
psp[1].hInstance = GetModuleHandle(NULL);
psp[1].pszTemplate = MAKEINTRESOURCE(IDD_Logging_PifRam);
psp[1].pfnDlgProc = (DLGPROC)LogPifProc;
psp[1].pszTitle = "Pif Ram";
psp[1].lParam = 0;
psp[1].pfnCallback = NULL;
psp[2].dwSize = sizeof(PROPSHEETPAGE);
psp[2].dwFlags = PSP_USETITLE;
psp[2].hInstance = GetModuleHandle(NULL);
psp[2].pszTemplate = MAKEINTRESOURCE(IDD_Logging_General);
psp[2].pfnDlgProc = (DLGPROC)LogGeneralProc;
psp[2].pszTitle = "General";
psp[2].lParam = 0;
psp[2].pfnCallback = NULL;
psh.dwSize = sizeof(PROPSHEETHEADER);
psh.dwFlags = PSH_PROPSHEETPAGE | PSH_NOAPPLYNOW;
psh.hwndParent = hwndOwner;
psh.hInstance = GetModuleHandle(NULL);
psh.pszCaption = (LPSTR) "Log Options";
psh.nPages = sizeof(psp) / sizeof(PROPSHEETPAGE);
psh.nStartPage = 0;
psh.ppsp = (LPCPROPSHEETPAGE) &psp;
psh.pfnCallback = NULL;
LoadLogOptions(&TempOptions,TRUE);
#if defined(WINDOWS_UI)
PropertySheet(&psh);
#else
g_Notify -> BreakPoint(__FILEW__, __LINE__);
#endif
SaveLogOptions();
LoadLogOptions(&g_LogOptions, FALSE);
return;
}
void LoadLogOptions (LOG_OPTIONS * LogOptions, bool AlwaysFill)
{
int32_t lResult;
HKEY hKeyResults = 0;
char String[200];
sprintf(String,"Software\\N64 Emulation\\%s\\Logging",g_Settings->LoadStringVal(Setting_ApplicationName).c_str());
lResult = RegOpenKeyEx( HKEY_CURRENT_USER,String,0,KEY_ALL_ACCESS,
&hKeyResults);
if (lResult == ERROR_SUCCESS)
{
//LoadLogSetting(hKeyResults,"Generate Log File",&LogOptions->GenerateLog);
if (LogOptions->GenerateLog || AlwaysFill)
{
LoadLogSetting(hKeyResults,"Log RDRAM",&LogOptions->LogRDRamRegisters);
LoadLogSetting(hKeyResults,"Log SP",&LogOptions->LogSPRegisters);
LoadLogSetting(hKeyResults,"Log DP Command",&LogOptions->LogDPCRegisters);
LoadLogSetting(hKeyResults,"Log DP Span",&LogOptions->LogDPSRegisters);
LoadLogSetting(hKeyResults,"Log MIPS Interface (MI)",&LogOptions->LogMIPSInterface);
LoadLogSetting(hKeyResults,"Log Video Interface (VI)",&LogOptions->LogVideoInterface);
LoadLogSetting(hKeyResults,"Log Audio Interface (AI)",&LogOptions->LogAudioInterface);
LoadLogSetting(hKeyResults,"Log Peripheral Interface (PI)",&LogOptions->LogPerInterface);
LoadLogSetting(hKeyResults,"Log RDRAM Interface (RI)",&LogOptions->LogRDRAMInterface);
LoadLogSetting(hKeyResults,"Log Serial Interface (SI)",&LogOptions->LogSerialInterface);
LoadLogSetting(hKeyResults,"Log PifRam DMA Operations",&LogOptions->LogPRDMAOperations);
LoadLogSetting(hKeyResults,"Log PifRam Direct Memory Loads",&LogOptions->LogPRDirectMemLoads);
LoadLogSetting(hKeyResults,"Log PifRam DMA Memory Loads",&LogOptions->LogPRDMAMemLoads);
LoadLogSetting(hKeyResults,"Log PifRam Direct Memory Stores",&LogOptions->LogPRDirectMemStores);
LoadLogSetting(hKeyResults,"Log PifRam DMA Memory Stores",&LogOptions->LogPRDMAMemStores);
LoadLogSetting(hKeyResults,"Log Controller Pak",&LogOptions->LogControllerPak);
LoadLogSetting(hKeyResults,"Log CP0 changes",&LogOptions->LogCP0changes);
LoadLogSetting(hKeyResults,"Log CP0 reads",&LogOptions->LogCP0reads);
LoadLogSetting(hKeyResults,"Log Exceptions",&LogOptions->LogExceptions);
LoadLogSetting(hKeyResults,"No Interrupts",&LogOptions->NoInterrupts);
LoadLogSetting(hKeyResults,"Log TLB",&LogOptions->LogTLB);
LoadLogSetting(hKeyResults,"Log Cache Operations",&LogOptions->LogCache);
LoadLogSetting(hKeyResults,"Log Rom Header",&LogOptions->LogRomHeader);
LoadLogSetting(hKeyResults,"Log Unknown access",&LogOptions->LogUnknown);
return;
}
}
LogOptions->GenerateLog = FALSE;
LogOptions->LogRDRamRegisters = FALSE;
LogOptions->LogSPRegisters = FALSE;
LogOptions->LogDPCRegisters = FALSE;
LogOptions->LogDPSRegisters = FALSE;
LogOptions->LogMIPSInterface = FALSE;
LogOptions->LogVideoInterface = FALSE;
LogOptions->LogAudioInterface = FALSE;
LogOptions->LogPerInterface = FALSE;
LogOptions->LogRDRAMInterface = FALSE;
LogOptions->LogSerialInterface = FALSE;
LogOptions->LogPRDMAOperations = FALSE;
LogOptions->LogPRDirectMemLoads = FALSE;
LogOptions->LogPRDMAMemLoads = FALSE;
LogOptions->LogPRDirectMemStores = FALSE;
LogOptions->LogPRDMAMemStores = FALSE;
LogOptions->LogControllerPak = FALSE;
LogOptions->LogCP0changes = FALSE;
LogOptions->LogCP0reads = FALSE;
LogOptions->LogCache = FALSE;
LogOptions->LogExceptions = FALSE;
LogOptions->NoInterrupts = FALSE;
LogOptions->LogTLB = FALSE;
LogOptions->LogRomHeader = FALSE;
LogOptions->LogUnknown = FALSE;
}
void LoadLogSetting (HKEY hKey,char * String, bool * Value)
{
DWORD Type, dwResult, Bytes = 4;
int32_t lResult;
lResult = RegQueryValueEx(hKey,String,0,&Type,(LPBYTE)(&dwResult),&Bytes);
if (Type == REG_DWORD && lResult == ERROR_SUCCESS)
{
*Value = dwResult != 0;
}
else
{
*Value = FALSE;
}
}
LRESULT CALLBACK LogGeneralProc (HWND hDlg, UINT uMsg, WPARAM /*wParam*/, LPARAM lParam)
{
switch (uMsg)
{
case WM_INITDIALOG:
if (TempOptions.LogCP0changes) { CheckDlgButton(hDlg,IDC_CP0_WRITE,BST_CHECKED); }
if (TempOptions.LogCP0reads) { CheckDlgButton(hDlg,IDC_CP0_READ,BST_CHECKED); }
if (TempOptions.LogCache) { CheckDlgButton(hDlg,IDC_CACHE,BST_CHECKED); }
if (TempOptions.LogExceptions) { CheckDlgButton(hDlg,IDC_EXCEPTIONS,BST_CHECKED); }
if (TempOptions.NoInterrupts) { CheckDlgButton(hDlg,IDC_INTERRUPTS,BST_CHECKED); }
if (TempOptions.LogTLB) { CheckDlgButton(hDlg,IDC_TLB,BST_CHECKED); }
if (TempOptions.LogRomHeader) { CheckDlgButton(hDlg,IDC_ROM_HEADER,BST_CHECKED); }
if (TempOptions.LogUnknown) { CheckDlgButton(hDlg,IDC_UNKOWN,BST_CHECKED); }
break;
case WM_NOTIFY:
if (((NMHDR FAR *) lParam)->code != PSN_APPLY) { break; }
TempOptions.LogCP0changes = IsDlgButtonChecked(hDlg,IDC_CP0_WRITE) == BST_CHECKED?TRUE:FALSE;
TempOptions.LogCP0reads = IsDlgButtonChecked(hDlg,IDC_CP0_READ) == BST_CHECKED?TRUE:FALSE;
TempOptions.LogCache = IsDlgButtonChecked(hDlg,IDC_CACHE) == BST_CHECKED?TRUE:FALSE;
TempOptions.LogExceptions = IsDlgButtonChecked(hDlg,IDC_EXCEPTIONS) == BST_CHECKED?TRUE:FALSE;
TempOptions.NoInterrupts = IsDlgButtonChecked(hDlg,IDC_INTERRUPTS) == BST_CHECKED?TRUE:FALSE;
TempOptions.LogTLB = IsDlgButtonChecked(hDlg,IDC_TLB) == BST_CHECKED?TRUE:FALSE;
TempOptions.LogRomHeader = IsDlgButtonChecked(hDlg,IDC_ROM_HEADER) == BST_CHECKED?TRUE:FALSE;
TempOptions.LogUnknown = IsDlgButtonChecked(hDlg,IDC_UNKOWN) == BST_CHECKED?TRUE:FALSE;
break;
default:
return FALSE;
}
return TRUE;
}
void Log_LW (uint32_t PC, uint32_t VAddr)
{
if (!g_LogOptions.GenerateLog)
{
return;
}
if ( VAddr < 0xA0000000 || VAddr >= 0xC0000000 )
{
uint32_t PAddr;
if (!g_TransVaddr->TranslateVaddr(VAddr,PAddr))
{
if (g_LogOptions.LogUnknown)
{
LogMessage("%08X: read from unknown ??? (%08X)",PC,VAddr);
}
return;
}
VAddr = PAddr + 0xA0000000;
}
uint32_t Value;
if ( VAddr >= 0xA0000000 && VAddr < (0xA0000000 + g_MMU->RdramSize()))
{
return;
}
if ( VAddr >= 0xA3F00000 && VAddr <= 0xA3F00024)
{
if (!g_LogOptions.LogRDRamRegisters)
{
return;
}
g_MMU->LW_VAddr(VAddr,Value);
switch (VAddr)
{
case 0xA3F00000: LogMessage("%08X: read from RDRAM_CONFIG_REG/RDRAM_DEVICE_TYPE_REG (%08X)",PC, Value); return;
case 0xA3F00004: LogMessage("%08X: read from RDRAM_DEVICE_ID_REG (%08X)",PC, Value); return;
case 0xA3F00008: LogMessage("%08X: read from RDRAM_DELAY_REG (%08X)",PC, Value); return;
case 0xA3F0000C: LogMessage("%08X: read from RDRAM_MODE_REG (%08X)",PC, Value); return;
case 0xA3F00010: LogMessage("%08X: read from RDRAM_REF_INTERVAL_REG (%08X)",PC, Value); return;
case 0xA3F00014: LogMessage("%08X: read from RDRAM_REF_ROW_REG (%08X)",PC, Value); return;
case 0xA3F00018: LogMessage("%08X: read from RDRAM_RAS_INTERVAL_REG (%08X)",PC, Value); return;
case 0xA3F0001C: LogMessage("%08X: read from RDRAM_MIN_INTERVAL_REG (%08X)",PC, Value); return;
case 0xA3F00020: LogMessage("%08X: read from RDRAM_ADDR_SELECT_REG (%08X)",PC, Value); return;
case 0xA3F00024: LogMessage("%08X: read from RDRAM_DEVICE_MANUF_REG (%08X)",PC, Value); return;
}
}
if ( VAddr >= 0xA4000000 && VAddr <= 0xA4001FFC )
{
return;
}
if ( VAddr >= 0xA4040000 && VAddr <= 0xA404001C )
{
if (!g_LogOptions.LogSPRegisters)
{
return;
}
g_MMU->LW_VAddr(VAddr,Value);
switch (VAddr)
{
case 0xA4040000: LogMessage("%08X: read from SP_MEM_ADDR_REG (%08X)",PC, Value); break;
case 0xA4040004: LogMessage("%08X: read from SP_DRAM_ADDR_REG (%08X)",PC, Value); break;
case 0xA4040008: LogMessage("%08X: read from SP_RD_LEN_REG (%08X)",PC, Value); break;
case 0xA404000C: LogMessage("%08X: read from SP_WR_LEN_REG (%08X)",PC, Value); break;
case 0xA4040010: LogMessage("%08X: read from SP_STATUS_REG (%08X)",PC, Value); break;
case 0xA4040014: LogMessage("%08X: read from SP_DMA_FULL_REG (%08X)",PC, Value); break;
case 0xA4040018: LogMessage("%08X: read from SP_DMA_BUSY_REG (%08X)",PC, Value); break;
case 0xA404001C: LogMessage("%08X: read from SP_SEMAPHORE_REG (%08X)",PC, Value); break;
}
return;
}
if ( VAddr == 0xA4080000)
{
if (!g_LogOptions.LogSPRegisters)
{
return;
}
g_MMU->LW_VAddr(VAddr,Value);
LogMessage("%08X: read from SP_PC (%08X)",PC, Value);
return;
}
if (VAddr >= 0xA4100000 && VAddr <= 0xA410001C)
{
if (!g_LogOptions.LogDPCRegisters)
{
return;
}
g_MMU->LW_VAddr(VAddr,Value);
switch (VAddr)
{
case 0xA4100000: LogMessage("%08X: read from DPC_START_REG (%08X)",PC, Value); return;
case 0xA4100004: LogMessage("%08X: read from DPC_END_REG (%08X)",PC, Value); return;
case 0xA4100008: LogMessage("%08X: read from DPC_CURRENT_REG (%08X)",PC, Value); return;
case 0xA410000C: LogMessage("%08X: read from DPC_STATUS_REG (%08X)",PC, Value); return;
case 0xA4100010: LogMessage("%08X: read from DPC_CLOCK_REG (%08X)",PC, Value); return;
case 0xA4100014: LogMessage("%08X: read from DPC_BUFBUSY_REG (%08X)",PC, Value); return;
case 0xA4100018: LogMessage("%08X: read from DPC_PIPEBUSY_REG (%08X)",PC, Value); return;
case 0xA410001C: LogMessage("%08X: read from DPC_TMEM_REG (%08X)",PC, Value); return;
}
}
if (VAddr >= 0xA4300000 && VAddr <= 0xA430000C)
{
if (!g_LogOptions.LogMIPSInterface)
{
return;
}
g_MMU->LW_VAddr(VAddr,Value);
switch (VAddr)
{
case 0xA4300000: LogMessage("%08X: read from MI_INIT_MODE_REG/MI_MODE_REG (%08X)",PC, Value); return;
case 0xA4300004: LogMessage("%08X: read from MI_VERSION_REG/MI_NOOP_REG (%08X)",PC, Value); return;
case 0xA4300008: LogMessage("%08X: read from MI_INTR_REG (%08X)",PC, Value); return;
case 0xA430000C: LogMessage("%08X: read from MI_INTR_MASK_REG (%08X)",PC, Value); return;
}
}
if (VAddr >= 0xA4400000 && VAddr <= 0xA4400034)
{
if (!g_LogOptions.LogVideoInterface)
{
return;
}
g_MMU->LW_VAddr(VAddr,Value);
switch (VAddr)
{
case 0xA4400000: LogMessage("%08X: read from VI_STATUS_REG/VI_CONTROL_REG (%08X)",PC, Value); return;
case 0xA4400004: LogMessage("%08X: read from VI_ORIGIN_REG/VI_DRAM_ADDR_REG (%08X)",PC, Value); return;
case 0xA4400008: LogMessage("%08X: read from VI_WIDTH_REG/VI_H_WIDTH_REG (%08X)",PC, Value); return;
case 0xA440000C: LogMessage("%08X: read from VI_INTR_REG/VI_V_INTR_REG (%08X)",PC, Value); return;
case 0xA4400010: LogMessage("%08X: read from VI_CURRENT_REG/VI_V_CURRENT_LINE_REG (%08X)",PC, Value); return;
case 0xA4400014: LogMessage("%08X: read from VI_BURST_REG/VI_TIMING_REG (%08X)",PC, Value); return;
case 0xA4400018: LogMessage("%08X: read from VI_V_SYNC_REG (%08X)",PC, Value); return;
case 0xA440001C: LogMessage("%08X: read from VI_H_SYNC_REG (%08X)",PC, Value); return;
case 0xA4400020: LogMessage("%08X: read from VI_LEAP_REG/VI_H_SYNC_LEAP_REG (%08X)",PC, Value); return;
case 0xA4400024: LogMessage("%08X: read from VI_H_START_REG/VI_H_VIDEO_REG (%08X)",PC, Value); return;
case 0xA4400028: LogMessage("%08X: read from VI_V_START_REG/VI_V_VIDEO_REG (%08X)",PC, Value); return;
case 0xA440002C: LogMessage("%08X: read from VI_V_BURST_REG (%08X)",PC, Value); return;
case 0xA4400030: LogMessage("%08X: read from VI_X_SCALE_REG (%08X)",PC, Value); return;
case 0xA4400034: LogMessage("%08X: read from VI_Y_SCALE_REG (%08X)",PC, Value); return;
}
}
if (VAddr >= 0xA4500000 && VAddr <= 0xA4500014)
{
if (!g_LogOptions.LogAudioInterface)
{
return;
}
g_MMU->LW_VAddr(VAddr,Value);
switch (VAddr)
{
case 0xA4500000: LogMessage("%08X: read from AI_DRAM_ADDR_REG (%08X)",PC, Value); return;
case 0xA4500004: LogMessage("%08X: read from AI_LEN_REG (%08X)",PC, Value); return;
case 0xA4500008: LogMessage("%08X: read from AI_CONTROL_REG (%08X)",PC, Value); return;
case 0xA450000C: LogMessage("%08X: read from AI_STATUS_REG (%08X)",PC, Value); return;
case 0xA4500010: LogMessage("%08X: read from AI_DACRATE_REG (%08X)",PC, Value); return;
case 0xA4500014: LogMessage("%08X: read from AI_BITRATE_REG (%08X)",PC, Value); return;
}
}
if (VAddr >= 0xA4600000 && VAddr <= 0xA4600030)
{
if (!g_LogOptions.LogPerInterface)
{
return;
}
g_MMU->LW_VAddr(VAddr,Value);
switch (VAddr)
{
case 0xA4600000: LogMessage("%08X: read from PI_DRAM_ADDR_REG (%08X)",PC, Value); return;
case 0xA4600004: LogMessage("%08X: read from PI_CART_ADDR_REG (%08X)",PC, Value); return;
case 0xA4600008: LogMessage("%08X: read from PI_RD_LEN_REG (%08X)",PC, Value); return;
case 0xA460000C: LogMessage("%08X: read from PI_WR_LEN_REG (%08X)",PC, Value); return;
case 0xA4600010: LogMessage("%08X: read from PI_STATUS_REG (%08X)",PC, Value); return;
case 0xA4600014: LogMessage("%08X: read from PI_BSD_DOM1_LAT_REG/PI_DOMAIN1_REG (%08X)",PC, Value); return;
case 0xA4600018: LogMessage("%08X: read from PI_BSD_DOM1_PWD_REG (%08X)",PC, Value); return;
case 0xA460001C: LogMessage("%08X: read from PI_BSD_DOM1_PGS_REG (%08X)",PC, Value); return;
case 0xA4600020: LogMessage("%08X: read from PI_BSD_DOM1_RLS_REG (%08X)",PC, Value); return;
case 0xA4600024: LogMessage("%08X: read from PI_BSD_DOM2_LAT_REG/PI_DOMAIN2_REG (%08X)",PC, Value); return;
case 0xA4600028: LogMessage("%08X: read from PI_BSD_DOM2_PWD_REG (%08X)",PC, Value); return;
case 0xA460002C: LogMessage("%08X: read from PI_BSD_DOM2_PGS_REG (%08X)",PC, Value); return;
case 0xA4600030: LogMessage("%08X: read from PI_BSD_DOM2_RLS_REG (%08X)",PC, Value); return;
}
}
if (VAddr >= 0xA4700000 && VAddr <= 0xA470001C)
{
if (!g_LogOptions.LogRDRAMInterface)
{
return;
}
g_MMU->LW_VAddr(VAddr,Value);
switch (VAddr)
{
case 0xA4700000: LogMessage("%08X: read from RI_MODE_REG (%08X)",PC, Value); return;
case 0xA4700004: LogMessage("%08X: read from RI_CONFIG_REG (%08X)",PC, Value); return;
case 0xA4700008: LogMessage("%08X: read from RI_CURRENT_LOAD_REG (%08X)",PC, Value); return;
case 0xA470000C: LogMessage("%08X: read from RI_SELECT_REG (%08X)",PC, Value); return;
case 0xA4700010: LogMessage("%08X: read from RI_REFRESH_REG/RI_COUNT_REG (%08X)",PC, Value); return;
case 0xA4700014: LogMessage("%08X: read from RI_LATENCY_REG (%08X)",PC, Value); return;
case 0xA4700018: LogMessage("%08X: read from RI_RERROR_REG (%08X)",PC, Value); return;
case 0xA470001C: LogMessage("%08X: read from RI_WERROR_REG (%08X)",PC, Value); return;
}
}
if ( VAddr == 0xA4800000)
{
if (!g_LogOptions.LogSerialInterface)
{
return;
}
g_MMU->LW_VAddr(VAddr,Value);
LogMessage("%08X: read from SI_DRAM_ADDR_REG (%08X)",PC, Value);
return;
}
if ( VAddr == 0xA4800004)
{
if (!g_LogOptions.LogSerialInterface)
{
return;
}
g_MMU->LW_VAddr(VAddr,Value);
LogMessage("%08X: read from SI_PIF_ADDR_RD64B_REG (%08X)",PC, Value);
return;
}
if ( VAddr == 0xA4800010)
{
if (!g_LogOptions.LogSerialInterface)
{
return;
}
g_MMU->LW_VAddr(VAddr,Value);
LogMessage("%08X: read from SI_PIF_ADDR_WR64B_REG (%08X)",PC, Value);
return;
}
if ( VAddr == 0xA4800018)
{
if (!g_LogOptions.LogSerialInterface)
{
return;
}
g_MMU->LW_VAddr(VAddr,Value);
LogMessage("%08X: read from SI_STATUS_REG (%08X)",PC, Value);
return;
}
if ( VAddr >= 0xBFC00000 && VAddr <= 0xBFC007C0 )
{
return;
}
if ( VAddr >= 0xBFC007C0 && VAddr <= 0xBFC007FC )
{
if (!g_LogOptions.LogPRDirectMemLoads)
{
return;
}
g_MMU->LW_VAddr(VAddr,Value);
LogMessage("%08X: read word from Pif Ram at 0x%X (%08X)",PC,VAddr - 0xBFC007C0, Value);
return;
}
if ( VAddr >= 0xB0000040 && ((VAddr - 0xB0000000) < g_Rom->GetRomSize()))
{
return;
}
if ( VAddr >= 0xB0000000 && VAddr < 0xB0000040)
{
if (!g_LogOptions.LogRomHeader)
{
return;
}
g_MMU->LW_VAddr(VAddr,Value);
switch (VAddr)
{
case 0xB0000004: LogMessage("%08X: read from Rom Clock Rate (%08X)",PC, Value); break;
case 0xB0000008: LogMessage("%08X: read from Rom Boot address offset (%08X)",PC, Value); break;
case 0xB000000C: LogMessage("%08X: read from Rom Release offset (%08X)",PC, Value); break;
case 0xB0000010: LogMessage("%08X: read from Rom CRC1 (%08X)",PC, Value); break;
case 0xB0000014: LogMessage("%08X: read from Rom CRC2 (%08X)",PC, Value); break;
default: LogMessage("%08X: read from Rom header 0x%X (%08X)",PC, VAddr & 0xFF,Value); break;
}
return;
}
if (!g_LogOptions.LogUnknown)
{
return;
}
LogMessage("%08X: read from unknown ??? (%08X)",PC,VAddr);
}
void Log_SW (uint32_t PC, uint32_t VAddr, uint32_t Value)
{
if (!g_LogOptions.GenerateLog)
{
return;
}
if ( VAddr < 0xA0000000 || VAddr >= 0xC0000000 )
{
uint32_t PAddr;
if (!g_TransVaddr->TranslateVaddr(VAddr,PAddr))
{
if (g_LogOptions.LogUnknown)
{
LogMessage("%08X: Writing 0x%08X to %08X",PC, Value, VAddr );
}
return;
}
VAddr = PAddr + 0xA0000000;
}
if ( VAddr >= 0xA0000000 && VAddr < (0xA0000000 + g_MMU->RdramSize()))
{
return;
}
if ( VAddr >= 0xA3F00000 && VAddr <= 0xA3F00024)
{
if (!g_LogOptions.LogRDRamRegisters)
{
return;
}
switch (VAddr)
{
case 0xA3F00000: LogMessage("%08X: Writing 0x%08X to RDRAM_CONFIG_REG/RDRAM_DEVICE_TYPE_REG",PC, Value ); return;
case 0xA3F00004: LogMessage("%08X: Writing 0x%08X to RDRAM_DEVICE_ID_REG",PC, Value ); return;
case 0xA3F00008: LogMessage("%08X: Writing 0x%08X to RDRAM_DELAY_REG",PC, Value ); return;
case 0xA3F0000C: LogMessage("%08X: Writing 0x%08X to RDRAM_MODE_REG",PC, Value ); return;
case 0xA3F00010: LogMessage("%08X: Writing 0x%08X to RDRAM_REF_INTERVAL_REG",PC, Value ); return;
case 0xA3F00014: LogMessage("%08X: Writing 0x%08X to RDRAM_REF_ROW_REG",PC, Value ); return;
case 0xA3F00018: LogMessage("%08X: Writing 0x%08X to RDRAM_RAS_INTERVAL_REG",PC, Value ); return;
case 0xA3F0001C: LogMessage("%08X: Writing 0x%08X to RDRAM_MIN_INTERVAL_REG",PC, Value ); return;
case 0xA3F00020: LogMessage("%08X: Writing 0x%08X to RDRAM_ADDR_SELECT_REG",PC, Value ); return;
case 0xA3F00024: LogMessage("%08X: Writing 0x%08X to RDRAM_DEVICE_MANUF_REG",PC, Value ); return;
}
}
if ( VAddr >= 0xA4000000 && VAddr <= 0xA4001FFC )
{
return;
}
if ( VAddr >= 0xA4040000 && VAddr <= 0xA404001C)
{
if (!g_LogOptions.LogSPRegisters)
{
return;
}
switch (VAddr)
{
case 0xA4040000: LogMessage("%08X: Writing 0x%08X to SP_MEM_ADDR_REG",PC, Value ); return;
case 0xA4040004: LogMessage("%08X: Writing 0x%08X to SP_DRAM_ADDR_REG",PC, Value ); return;
case 0xA4040008: LogMessage("%08X: Writing 0x%08X to SP_RD_LEN_REG",PC, Value ); return;
case 0xA404000C: LogMessage("%08X: Writing 0x%08X to SP_WR_LEN_REG",PC, Value ); return;
case 0xA4040010: LogMessage("%08X: Writing 0x%08X to SP_STATUS_REG",PC, Value ); return;
case 0xA4040014: LogMessage("%08X: Writing 0x%08X to SP_DMA_FULL_REG",PC, Value ); return;
case 0xA4040018: LogMessage("%08X: Writing 0x%08X to SP_DMA_BUSY_REG",PC, Value ); return;
case 0xA404001C: LogMessage("%08X: Writing 0x%08X to SP_SEMAPHORE_REG",PC, Value ); return;
}
}
if ( VAddr == 0xA4080000)
{
if (!g_LogOptions.LogSPRegisters)
{
return;
}
LogMessage("%08X: Writing 0x%08X to SP_PC",PC, Value ); return;
}
if ( VAddr >= 0xA4100000 && VAddr <= 0xA410001C)
{
if (!g_LogOptions.LogDPCRegisters)
{
return;
}
switch (VAddr)
{
case 0xA4100000: LogMessage("%08X: Writing 0x%08X to DPC_START_REG",PC, Value ); return;
case 0xA4100004: LogMessage("%08X: Writing 0x%08X to DPC_END_REG",PC, Value ); return;
case 0xA4100008: LogMessage("%08X: Writing 0x%08X to DPC_CURRENT_REG",PC, Value ); return;
case 0xA410000C: LogMessage("%08X: Writing 0x%08X to DPC_STATUS_REG",PC, Value ); return;
case 0xA4100010: LogMessage("%08X: Writing 0x%08X to DPC_CLOCK_REG",PC, Value ); return;
case 0xA4100014: LogMessage("%08X: Writing 0x%08X to DPC_BUFBUSY_REG",PC, Value ); return;
case 0xA4100018: LogMessage("%08X: Writing 0x%08X to DPC_PIPEBUSY_REG",PC, Value ); return;
case 0xA410001C: LogMessage("%08X: Writing 0x%08X to DPC_TMEM_REG",PC, Value ); return;
}
}
if ( VAddr >= 0xA4200000 && VAddr <= 0xA420000C)
{
if (!g_LogOptions.LogDPSRegisters)
{
return;
}
switch (VAddr)
{
case 0xA4200000: LogMessage("%08X: Writing 0x%08X to DPS_TBIST_REG",PC, Value ); return;
case 0xA4200004: LogMessage("%08X: Writing 0x%08X to DPS_TEST_MODE_REG",PC, Value ); return;
case 0xA4200008: LogMessage("%08X: Writing 0x%08X to DPS_BUFTEST_ADDR_REG",PC, Value ); return;
case 0xA420000C: LogMessage("%08X: Writing 0x%08X to DPS_BUFTEST_DATA_REG",PC, Value ); return;
}
}
if ( VAddr >= 0xA4300000 && VAddr <= 0xA430000C)
{
if (!g_LogOptions.LogMIPSInterface)
{
return;
}
switch (VAddr)
{
case 0xA4300000: LogMessage("%08X: Writing 0x%08X to MI_INIT_MODE_REG/MI_MODE_REG",PC, Value ); return;
case 0xA4300004: LogMessage("%08X: Writing 0x%08X to MI_VERSION_REG/MI_NOOP_REG",PC, Value ); return;
case 0xA4300008: LogMessage("%08X: Writing 0x%08X to MI_INTR_REG",PC, Value ); return;
case 0xA430000C: LogMessage("%08X: Writing 0x%08X to MI_INTR_MASK_REG",PC, Value ); return;
}
}
if ( VAddr >= 0xA4400000 && VAddr <= 0xA4400034)
{
if (!g_LogOptions.LogVideoInterface)
{
return;
}
switch (VAddr)
{
case 0xA4400000: LogMessage("%08X: Writing 0x%08X to VI_STATUS_REG/VI_CONTROL_REG",PC, Value ); return;
case 0xA4400004: LogMessage("%08X: Writing 0x%08X to VI_ORIGIN_REG/VI_DRAM_ADDR_REG",PC, Value ); return;
case 0xA4400008: LogMessage("%08X: Writing 0x%08X to VI_WIDTH_REG/VI_H_WIDTH_REG",PC, Value ); return;
case 0xA440000C: LogMessage("%08X: Writing 0x%08X to VI_INTR_REG/VI_V_INTR_REG",PC, Value ); return;
case 0xA4400010: LogMessage("%08X: Writing 0x%08X to VI_CURRENT_REG/VI_V_CURRENT_LINE_REG",PC, Value ); return;
case 0xA4400014: LogMessage("%08X: Writing 0x%08X to VI_BURST_REG/VI_TIMING_REG",PC, Value ); return;
case 0xA4400018: LogMessage("%08X: Writing 0x%08X to VI_V_SYNC_REG",PC, Value ); return;
case 0xA440001C: LogMessage("%08X: Writing 0x%08X to VI_H_SYNC_REG",PC, Value ); return;
case 0xA4400020: LogMessage("%08X: Writing 0x%08X to VI_LEAP_REG/VI_H_SYNC_LEAP_REG",PC, Value ); return;
case 0xA4400024: LogMessage("%08X: Writing 0x%08X to VI_H_START_REG/VI_H_VIDEO_REG",PC, Value ); return;
case 0xA4400028: LogMessage("%08X: Writing 0x%08X to VI_V_START_REG/VI_V_VIDEO_REG",PC, Value ); return;
case 0xA440002C: LogMessage("%08X: Writing 0x%08X to VI_V_BURST_REG",PC, Value ); return;
case 0xA4400030: LogMessage("%08X: Writing 0x%08X to VI_X_SCALE_REG",PC, Value ); return;
case 0xA4400034: LogMessage("%08X: Writing 0x%08X to VI_Y_SCALE_REG",PC, Value ); return;
}
}
if ( VAddr >= 0xA4500000 && VAddr <= 0xA4500014)
{
if (!g_LogOptions.LogAudioInterface)
{
return;
}
switch (VAddr)
{
case 0xA4500000: LogMessage("%08X: Writing 0x%08X to AI_DRAM_ADDR_REG",PC, Value ); return;
case 0xA4500004: LogMessage("%08X: Writing 0x%08X to AI_LEN_REG",PC, Value ); return;
case 0xA4500008: LogMessage("%08X: Writing 0x%08X to AI_CONTROL_REG",PC, Value ); return;
case 0xA450000C: LogMessage("%08X: Writing 0x%08X to AI_STATUS_REG",PC, Value ); return;
case 0xA4500010: LogMessage("%08X: Writing 0x%08X to AI_DACRATE_REG",PC, Value ); return;
case 0xA4500014: LogMessage("%08X: Writing 0x%08X to AI_BITRATE_REG",PC, Value ); return;
}
}
if ( VAddr >= 0xA4600000 && VAddr <= 0xA4600030)
{
if (!g_LogOptions.LogPerInterface)
{
return;
}
switch (VAddr)
{
case 0xA4600000: LogMessage("%08X: Writing 0x%08X to PI_DRAM_ADDR_REG",PC, Value ); return;
case 0xA4600004: LogMessage("%08X: Writing 0x%08X to PI_CART_ADDR_REG",PC, Value ); return;
case 0xA4600008: LogMessage("%08X: Writing 0x%08X to PI_RD_LEN_REG",PC, Value ); return;
case 0xA460000C: LogMessage("%08X: Writing 0x%08X to PI_WR_LEN_REG",PC, Value ); return;
case 0xA4600010: LogMessage("%08X: Writing 0x%08X to PI_STATUS_REG",PC, Value ); return;
case 0xA4600014: LogMessage("%08X: Writing 0x%08X to PI_BSD_DOM1_LAT_REG/PI_DOMAIN1_REG",PC, Value ); return;
case 0xA4600018: LogMessage("%08X: Writing 0x%08X to PI_BSD_DOM1_PWD_REG",PC, Value ); return;
case 0xA460001C: LogMessage("%08X: Writing 0x%08X to PI_BSD_DOM1_PGS_REG",PC, Value ); return;
case 0xA4600020: LogMessage("%08X: Writing 0x%08X to PI_BSD_DOM1_RLS_REG",PC, Value ); return;
case 0xA4600024: LogMessage("%08X: Writing 0x%08X to PI_BSD_DOM2_LAT_REG/PI_DOMAIN2_REG",PC, Value ); return;
case 0xA4600028: LogMessage("%08X: Writing 0x%08X to PI_BSD_DOM2_PWD_REG",PC, Value ); return;
case 0xA460002C: LogMessage("%08X: Writing 0x%08X to PI_BSD_DOM2_PGS_REG",PC, Value ); return;
case 0xA4600030: LogMessage("%08X: Writing 0x%08X to PI_BSD_DOM2_RLS_REG",PC, Value ); return;
}
}
if ( VAddr >= 0xA4700000 && VAddr <= 0xA470001C)
{
if (!g_LogOptions.LogRDRAMInterface)
{
return;
}
switch (VAddr)
{
case 0xA4700000: LogMessage("%08X: Writing 0x%08X to RI_MODE_REG",PC, Value ); return;
case 0xA4700004: LogMessage("%08X: Writing 0x%08X to RI_CONFIG_REG",PC, Value ); return;
case 0xA4700008: LogMessage("%08X: Writing 0x%08X to RI_CURRENT_LOAD_REG",PC, Value ); return;
case 0xA470000C: LogMessage("%08X: Writing 0x%08X to RI_SELECT_REG",PC, Value ); return;
case 0xA4700010: LogMessage("%08X: Writing 0x%08X to RI_REFRESH_REG/RI_COUNT_REG",PC, Value ); return;
case 0xA4700014: LogMessage("%08X: Writing 0x%08X to RI_LATENCY_REG",PC, Value ); return;
case 0xA4700018: LogMessage("%08X: Writing 0x%08X to RI_RERROR_REG",PC, Value ); return;
case 0xA470001C: LogMessage("%08X: Writing 0x%08X to RI_WERROR_REG",PC, Value ); return;
}
}
if ( VAddr == 0xA4800000)
{
if (!g_LogOptions.LogSerialInterface)
{
return;
}
LogMessage("%08X: Writing 0x%08X to SI_DRAM_ADDR_REG",PC, Value ); return;
}
if ( VAddr == 0xA4800004)
{
if (g_LogOptions.LogPRDMAOperations)
{
LogMessage("%08X: A DMA transfer from the PIF ram has occured",PC );
}
if (!g_LogOptions.LogSerialInterface)
{
return;
}
LogMessage("%08X: Writing 0x%08X to SI_PIF_ADDR_RD64B_REG",PC, Value ); return;
}
if ( VAddr == 0xA4800010)
{
if (g_LogOptions.LogPRDMAOperations)
{
LogMessage("%08X: A DMA transfer to the PIF ram has occured",PC );
}
if (!g_LogOptions.LogSerialInterface)
{
return;
}
LogMessage("%08X: Writing 0x%08X to SI_PIF_ADDR_WR64B_REG",PC, Value ); return;
}
if ( VAddr == 0xA4800018)
{
if (!g_LogOptions.LogSerialInterface)
{
return;
}
LogMessage("%08X: Writing 0x%08X to SI_STATUS_REG",PC, Value ); return;
}
if ( VAddr >= 0xBFC007C0 && VAddr <= 0xBFC007FC )
{
if (!g_LogOptions.LogPRDirectMemStores)
{
return;
}
LogMessage("%08X: Writing 0x%08X to Pif Ram at 0x%X",PC,Value, VAddr - 0xBFC007C0);
return;
}
if (!g_LogOptions.LogUnknown)
{
return;
}
LogMessage("%08X: Writing 0x%08X to %08X ????",PC, Value, VAddr );
}
LRESULT CALLBACK LogPifProc (HWND hDlg, UINT uMsg, WPARAM /*wParam*/, LPARAM lParam)
{
switch (uMsg)
{
case WM_INITDIALOG:
if (TempOptions.LogPRDMAOperations) { CheckDlgButton(hDlg,IDC_SI_DMA,BST_CHECKED); }
if (TempOptions.LogPRDirectMemLoads) { CheckDlgButton(hDlg,IDC_DIRECT_WRITE,BST_CHECKED); }
if (TempOptions.LogPRDMAMemLoads) { CheckDlgButton(hDlg,IDC_DMA_WRITE,BST_CHECKED); }
if (TempOptions.LogPRDirectMemStores) { CheckDlgButton(hDlg,IDC_DIRECT_READ,BST_CHECKED); }
if (TempOptions.LogPRDMAMemStores) { CheckDlgButton(hDlg,IDC_DMA_READ,BST_CHECKED); }
if (TempOptions.LogControllerPak) { CheckDlgButton(hDlg,IDC_CONT_PAK,BST_CHECKED); }
break;
case WM_NOTIFY:
if (((NMHDR FAR *) lParam)->code != PSN_APPLY)
{
break;
}
TempOptions.LogPRDMAOperations = IsDlgButtonChecked(hDlg,IDC_SI_DMA) == BST_CHECKED?TRUE:FALSE;
TempOptions.LogPRDirectMemLoads = IsDlgButtonChecked(hDlg,IDC_DIRECT_WRITE) == BST_CHECKED?TRUE:FALSE;
TempOptions.LogPRDMAMemLoads = IsDlgButtonChecked(hDlg,IDC_DMA_WRITE) == BST_CHECKED?TRUE:FALSE;
TempOptions.LogPRDirectMemStores = IsDlgButtonChecked(hDlg,IDC_DIRECT_READ) == BST_CHECKED?TRUE:FALSE;
TempOptions.LogPRDMAMemStores = IsDlgButtonChecked(hDlg,IDC_DMA_READ) == BST_CHECKED?TRUE:FALSE;
TempOptions.LogControllerPak = IsDlgButtonChecked(hDlg,IDC_CONT_PAK) == BST_CHECKED?TRUE:FALSE;
break;
default:
return FALSE;
}
return TRUE;
}
LRESULT CALLBACK LogRegProc (HWND hDlg, UINT uMsg, WPARAM /*wParam*/, LPARAM lParam)
{
switch (uMsg)
{
case WM_INITDIALOG:
if (TempOptions.LogRDRamRegisters) { CheckDlgButton(hDlg,IDC_RDRAM,BST_CHECKED); }
if (TempOptions.LogSPRegisters) { CheckDlgButton(hDlg,IDC_SP_REG,BST_CHECKED); }
if (TempOptions.LogDPCRegisters) { CheckDlgButton(hDlg,IDC_DPC_REG,BST_CHECKED); }
if (TempOptions.LogDPSRegisters) { CheckDlgButton(hDlg,IDC_DPS_REG,BST_CHECKED); }
if (TempOptions.LogMIPSInterface) { CheckDlgButton(hDlg,IDC_MI_REG,BST_CHECKED); }
if (TempOptions.LogVideoInterface) { CheckDlgButton(hDlg,IDC_VI_REG,BST_CHECKED); }
if (TempOptions.LogAudioInterface) { CheckDlgButton(hDlg,IDC_AI_REG,BST_CHECKED); }
if (TempOptions.LogPerInterface) { CheckDlgButton(hDlg,IDC_PI_REG,BST_CHECKED); }
if (TempOptions.LogRDRAMInterface) { CheckDlgButton(hDlg,IDC_RI_REG,BST_CHECKED); }
if (TempOptions.LogSerialInterface) { CheckDlgButton(hDlg,IDC_SI_REG,BST_CHECKED); }
break;
case WM_NOTIFY:
if (((NMHDR FAR *) lParam)->code != PSN_APPLY)
{
break;
}
TempOptions.LogRDRamRegisters = IsDlgButtonChecked(hDlg,IDC_RDRAM) == BST_CHECKED?TRUE:FALSE;
TempOptions.LogSPRegisters = IsDlgButtonChecked(hDlg,IDC_SP_REG) == BST_CHECKED?TRUE:FALSE;
TempOptions.LogDPCRegisters = IsDlgButtonChecked(hDlg,IDC_DPC_REG) == BST_CHECKED?TRUE:FALSE;
TempOptions.LogDPSRegisters = IsDlgButtonChecked(hDlg,IDC_DPS_REG) == BST_CHECKED?TRUE:FALSE;
TempOptions.LogMIPSInterface = IsDlgButtonChecked(hDlg,IDC_MI_REG) == BST_CHECKED?TRUE:FALSE;
TempOptions.LogVideoInterface = IsDlgButtonChecked(hDlg,IDC_VI_REG) == BST_CHECKED?TRUE:FALSE;
TempOptions.LogAudioInterface = IsDlgButtonChecked(hDlg,IDC_AI_REG) == BST_CHECKED?TRUE:FALSE;
TempOptions.LogPerInterface = IsDlgButtonChecked(hDlg,IDC_PI_REG) == BST_CHECKED?TRUE:FALSE;
TempOptions.LogRDRAMInterface = IsDlgButtonChecked(hDlg,IDC_RI_REG) == BST_CHECKED?TRUE:FALSE;
TempOptions.LogSerialInterface = IsDlgButtonChecked(hDlg,IDC_SI_REG) == BST_CHECKED?TRUE:FALSE;
break;
default:
return FALSE;
}
return TRUE;
}
void SaveLogSetting (HKEY hKey,char * String, BOOL Value)
{
DWORD StoreValue = Value;
RegSetValueEx(hKey,String,0,REG_DWORD,(CONST BYTE *)&StoreValue,sizeof(DWORD));
}
void SaveLogOptions (void)
{
long lResult;
HKEY hKeyResults = 0;
DWORD Disposition = 0;
char String[200];
sprintf(String,"Software\\N64 Emulation\\%s\\Logging",g_Settings->LoadStringVal(Setting_ApplicationName).c_str());
lResult = RegCreateKeyEx( HKEY_CURRENT_USER,String,0,"", REG_OPTION_NON_VOLATILE,
KEY_ALL_ACCESS,NULL,&hKeyResults,&Disposition);
SaveLogSetting(hKeyResults,"Log RDRAM",TempOptions.LogRDRamRegisters);
SaveLogSetting(hKeyResults,"Log SP",TempOptions.LogSPRegisters);
SaveLogSetting(hKeyResults,"Log DP Command",TempOptions.LogDPCRegisters);
SaveLogSetting(hKeyResults,"Log DP Span",TempOptions.LogDPSRegisters);
SaveLogSetting(hKeyResults,"Log MIPS Interface (MI)",TempOptions.LogMIPSInterface);
SaveLogSetting(hKeyResults,"Log Video Interface (VI)",TempOptions.LogVideoInterface);
SaveLogSetting(hKeyResults,"Log Audio Interface (AI)",TempOptions.LogAudioInterface);
SaveLogSetting(hKeyResults,"Log Peripheral Interface (PI)",TempOptions.LogPerInterface);
SaveLogSetting(hKeyResults,"Log RDRAM Interface (RI)",TempOptions.LogRDRAMInterface);
SaveLogSetting(hKeyResults,"Log Serial Interface (SI)",TempOptions.LogSerialInterface);
SaveLogSetting(hKeyResults,"Log PifRam DMA Operations",TempOptions.LogPRDMAOperations);
SaveLogSetting(hKeyResults,"Log PifRam Direct Memory Loads",TempOptions.LogPRDirectMemLoads);
SaveLogSetting(hKeyResults,"Log PifRam DMA Memory Loads",TempOptions.LogPRDMAMemLoads);
SaveLogSetting(hKeyResults,"Log PifRam Direct Memory Stores",TempOptions.LogPRDirectMemStores);
SaveLogSetting(hKeyResults,"Log PifRam DMA Memory Stores",TempOptions.LogPRDMAMemStores);
SaveLogSetting(hKeyResults,"Log Controller Pak",TempOptions.LogControllerPak);
SaveLogSetting(hKeyResults,"Log CP0 changes",TempOptions.LogCP0changes);
SaveLogSetting(hKeyResults,"Log CP0 reads",TempOptions.LogCP0reads);
SaveLogSetting(hKeyResults,"Log Exceptions",TempOptions.LogExceptions);
SaveLogSetting(hKeyResults,"No Interrupts",TempOptions.NoInterrupts);
SaveLogSetting(hKeyResults,"Log TLB",TempOptions.LogTLB);
SaveLogSetting(hKeyResults,"Log Cache Operations",TempOptions.LogCache);
SaveLogSetting(hKeyResults,"Log Rom Header",TempOptions.LogRomHeader);
SaveLogSetting(hKeyResults,"Log Unknown access",TempOptions.LogUnknown);
RegCloseKey(hKeyResults);
}
void LogMessage (const char * Message, ...)
{
DWORD dwWritten;
char Msg[400];
va_list ap;
if (!g_Settings->LoadBool(Debugger_Enabled))
{
return;
}
if (g_hLogFile == NULL)
{
return;
}
va_start( ap, Message );
vsprintf( Msg, Message, ap );
va_end( ap );
strcat(Msg,"\r\n");
WriteFile( g_hLogFile,Msg,strlen(Msg),&dwWritten,NULL );
}
void StartLog (void)
{
if (!g_LogOptions.GenerateLog)
{
StopLog();
return;
}
if (g_hLogFile)
{
return;
}
CPath LogFile(CPath::MODULE_DIRECTORY);
LogFile.AppendDirectory("Logs");
LogFile.SetNameExtension("cpudebug.log");
g_hLogFile = CreateFile(LogFile,GENERIC_WRITE, FILE_SHARE_READ,NULL,CREATE_ALWAYS, FILE_ATTRIBUTE_NORMAL | FILE_FLAG_SEQUENTIAL_SCAN, NULL);
SetFilePointer(g_hLogFile,0,NULL,FILE_BEGIN);
}
void StopLog (void)
{
if (g_hLogFile)
{
CloseHandle(g_hLogFile);
}
g_hLogFile = NULL;
}

307
Source/Project64/N64 System/Interpreter/Interpreter Ops 32.cpp
View File

@ -9,8 +9,9 @@
* *
****************************************************************************/
#include "stdafx.h"
#include <Project64\User Interface\LoggingUI.h>
bool DelaySlotEffectsCompare ( uint32_t PC, uint32_t Reg1, uint32_t Reg2 );
bool DelaySlotEffectsCompare(uint32_t PC, uint32_t Reg1, uint32_t Reg2);
#define ADDRESS_ERROR_EXCEPTION(Address,FromRead) \
g_Reg->DoAddressError(m_NextInstruction == JUMP,Address,FromRead);\
@ -25,7 +26,7 @@ bool DelaySlotEffectsCompare ( uint32_t PC, uint32_t Reg1, uint32_t Reg2 );
m_NextInstruction = JUMP;\
m_JumpToLocation = (*_PROGRAM_COUNTER);\
return;\
}
}
#define TLB_READ_EXCEPTION(Address) \
g_Reg->DoTLBReadMiss(m_NextInstruction == JUMP,Address);\
@ -35,16 +36,16 @@ bool DelaySlotEffectsCompare ( uint32_t PC, uint32_t Reg1, uint32_t Reg2 );
R4300iOp32::Func * R4300iOp32::BuildInterpreter()
{
Jump_Opcode[ 0] = SPECIAL;
Jump_Opcode[ 1] = REGIMM;
Jump_Opcode[ 2] = R4300iOp::J;
Jump_Opcode[ 3] = JAL;
Jump_Opcode[ 4] = BEQ;
Jump_Opcode[ 5] = BNE;
Jump_Opcode[ 6] = BLEZ;
Jump_Opcode[ 7] = BGTZ;
Jump_Opcode[ 8] = ADDI;
Jump_Opcode[ 9] = ADDIU;
Jump_Opcode[0] = SPECIAL;
Jump_Opcode[1] = REGIMM;
Jump_Opcode[2] = R4300iOp::J;
Jump_Opcode[3] = JAL;
Jump_Opcode[4] = BEQ;
Jump_Opcode[5] = BNE;
Jump_Opcode[6] = BLEZ;
Jump_Opcode[7] = BGTZ;
Jump_Opcode[8] = ADDI;
Jump_Opcode[9] = ADDIU;
Jump_Opcode[10] = SLTI;
Jump_Opcode[11] = SLTIU;
Jump_Opcode[12] = ANDI;
@ -100,16 +101,16 @@ R4300iOp32::Func * R4300iOp32::BuildInterpreter()
Jump_Opcode[62] = R4300iOp::UnknownOpcode;
Jump_Opcode[63] = R4300iOp::SD;
Jump_Special[ 0] = SPECIAL_SLL;
Jump_Special[ 1] = R4300iOp::UnknownOpcode;
Jump_Special[ 2] = SPECIAL_SRL;
Jump_Special[ 3] = SPECIAL_SRA;
Jump_Special[ 4] = SPECIAL_SLLV;
Jump_Special[ 5] = R4300iOp::UnknownOpcode;
Jump_Special[ 6] = SPECIAL_SRLV;
Jump_Special[ 7] = SPECIAL_SRAV;
Jump_Special[ 8] = SPECIAL_JR;
Jump_Special[ 9] = SPECIAL_JALR;
Jump_Special[0] = SPECIAL_SLL;
Jump_Special[1] = R4300iOp::UnknownOpcode;
Jump_Special[2] = SPECIAL_SRL;
Jump_Special[3] = SPECIAL_SRA;
Jump_Special[4] = SPECIAL_SLLV;
Jump_Special[5] = R4300iOp::UnknownOpcode;
Jump_Special[6] = SPECIAL_SRLV;
Jump_Special[7] = SPECIAL_SRAV;
Jump_Special[8] = SPECIAL_JR;
Jump_Special[9] = SPECIAL_JALR;
Jump_Special[10] = R4300iOp::UnknownOpcode;
Jump_Special[11] = R4300iOp::UnknownOpcode;
Jump_Special[12] = R4300iOp::SPECIAL_SYSCALL;
@ -165,16 +166,16 @@ R4300iOp32::Func * R4300iOp32::BuildInterpreter()
Jump_Special[62] = R4300iOp::SPECIAL_DSRL32;
Jump_Special[63] = R4300iOp::SPECIAL_DSRA32;
Jump_Regimm[ 0] = REGIMM_BLTZ;
Jump_Regimm[ 1] = REGIMM_BGEZ;
Jump_Regimm[ 2] = REGIMM_BLTZL;
Jump_Regimm[ 3] = REGIMM_BGEZL;
Jump_Regimm[ 4] = R4300iOp::UnknownOpcode;
Jump_Regimm[ 5] = R4300iOp::UnknownOpcode;
Jump_Regimm[ 6] = R4300iOp::UnknownOpcode;
Jump_Regimm[ 7] = R4300iOp::UnknownOpcode;
Jump_Regimm[ 8] = R4300iOp::UnknownOpcode;
Jump_Regimm[ 9] = R4300iOp::UnknownOpcode;
Jump_Regimm[0] = REGIMM_BLTZ;
Jump_Regimm[1] = REGIMM_BGEZ;
Jump_Regimm[2] = REGIMM_BLTZL;
Jump_Regimm[3] = REGIMM_BGEZL;
Jump_Regimm[4] = R4300iOp::UnknownOpcode;
Jump_Regimm[5] = R4300iOp::UnknownOpcode;
Jump_Regimm[6] = R4300iOp::UnknownOpcode;
Jump_Regimm[7] = R4300iOp::UnknownOpcode;
Jump_Regimm[8] = R4300iOp::UnknownOpcode;
Jump_Regimm[9] = R4300iOp::UnknownOpcode;
Jump_Regimm[10] = R4300iOp::UnknownOpcode;
Jump_Regimm[11] = R4300iOp::UnknownOpcode;
Jump_Regimm[12] = R4300iOp::UnknownOpcode;
@ -198,16 +199,16 @@ R4300iOp32::Func * R4300iOp32::BuildInterpreter()
Jump_Regimm[30] = R4300iOp::UnknownOpcode;
Jump_Regimm[31] = R4300iOp::UnknownOpcode;
Jump_CoP0[ 0] = COP0_MF;
Jump_CoP0[ 1] = R4300iOp::UnknownOpcode;
Jump_CoP0[ 2] = R4300iOp::UnknownOpcode;
Jump_CoP0[ 3] = R4300iOp::UnknownOpcode;
Jump_CoP0[ 4] = COP0_MT;
Jump_CoP0[ 5] = R4300iOp::UnknownOpcode;
Jump_CoP0[ 6] = R4300iOp::UnknownOpcode;
Jump_CoP0[ 7] = R4300iOp::UnknownOpcode;
Jump_CoP0[ 8] = R4300iOp::UnknownOpcode;
Jump_CoP0[ 9] = R4300iOp::UnknownOpcode;
Jump_CoP0[0] = COP0_MF;
Jump_CoP0[1] = R4300iOp::UnknownOpcode;
Jump_CoP0[2] = R4300iOp::UnknownOpcode;
Jump_CoP0[3] = R4300iOp::UnknownOpcode;
Jump_CoP0[4] = COP0_MT;
Jump_CoP0[5] = R4300iOp::UnknownOpcode;
Jump_CoP0[6] = R4300iOp::UnknownOpcode;
Jump_CoP0[7] = R4300iOp::UnknownOpcode;
Jump_CoP0[8] = R4300iOp::UnknownOpcode;
Jump_CoP0[9] = R4300iOp::UnknownOpcode;
Jump_CoP0[10] = R4300iOp::UnknownOpcode;
Jump_CoP0[11] = R4300iOp::UnknownOpcode;
Jump_CoP0[12] = R4300iOp::UnknownOpcode;
@ -231,16 +232,16 @@ R4300iOp32::Func * R4300iOp32::BuildInterpreter()
Jump_CoP0[30] = R4300iOp::COP0_CO;
Jump_CoP0[31] = R4300iOp::COP0_CO;
Jump_CoP0_Function[ 0] = R4300iOp::UnknownOpcode;
Jump_CoP0_Function[ 1] = R4300iOp::COP0_CO_TLBR;
Jump_CoP0_Function[ 2] = R4300iOp::COP0_CO_TLBWI;
Jump_CoP0_Function[ 3] = R4300iOp::UnknownOpcode;
Jump_CoP0_Function[ 4] = R4300iOp::UnknownOpcode;
Jump_CoP0_Function[ 5] = R4300iOp::UnknownOpcode;
Jump_CoP0_Function[ 6] = R4300iOp::COP0_CO_TLBWR;
Jump_CoP0_Function[ 7] = R4300iOp::UnknownOpcode;
Jump_CoP0_Function[ 8] = R4300iOp::COP0_CO_TLBP;
Jump_CoP0_Function[ 9] = R4300iOp::UnknownOpcode;
Jump_CoP0_Function[0] = R4300iOp::UnknownOpcode;
Jump_CoP0_Function[1] = R4300iOp::COP0_CO_TLBR;
Jump_CoP0_Function[2] = R4300iOp::COP0_CO_TLBWI;
Jump_CoP0_Function[3] = R4300iOp::UnknownOpcode;
Jump_CoP0_Function[4] = R4300iOp::UnknownOpcode;
Jump_CoP0_Function[5] = R4300iOp::UnknownOpcode;
Jump_CoP0_Function[6] = R4300iOp::COP0_CO_TLBWR;
Jump_CoP0_Function[7] = R4300iOp::UnknownOpcode;
Jump_CoP0_Function[8] = R4300iOp::COP0_CO_TLBP;
Jump_CoP0_Function[9] = R4300iOp::UnknownOpcode;
Jump_CoP0_Function[10] = R4300iOp::UnknownOpcode;
Jump_CoP0_Function[11] = R4300iOp::UnknownOpcode;
Jump_CoP0_Function[12] = R4300iOp::UnknownOpcode;
@ -296,16 +297,16 @@ R4300iOp32::Func * R4300iOp32::BuildInterpreter()
Jump_CoP0_Function[62] = R4300iOp::UnknownOpcode;
Jump_CoP0_Function[63] = R4300iOp::UnknownOpcode;
Jump_CoP1[ 0] = COP1_MF;
Jump_CoP1[ 1] = R4300iOp::COP1_DMF;
Jump_CoP1[ 2] = COP1_CF;
Jump_CoP1[ 3] = R4300iOp::UnknownOpcode;
Jump_CoP1[ 4] = R4300iOp::COP1_MT;
Jump_CoP1[ 5] = COP1_DMT;
Jump_CoP1[ 6] = R4300iOp::COP1_CT;
Jump_CoP1[ 7] = R4300iOp::UnknownOpcode;
Jump_CoP1[ 8] = R4300iOp::COP1_BC;
Jump_CoP1[ 9] = R4300iOp::UnknownOpcode;
Jump_CoP1[0] = COP1_MF;
Jump_CoP1[1] = R4300iOp::COP1_DMF;
Jump_CoP1[2] = COP1_CF;
Jump_CoP1[3] = R4300iOp::UnknownOpcode;
Jump_CoP1[4] = R4300iOp::COP1_MT;
Jump_CoP1[5] = COP1_DMT;
Jump_CoP1[6] = R4300iOp::COP1_CT;
Jump_CoP1[7] = R4300iOp::UnknownOpcode;
Jump_CoP1[8] = R4300iOp::COP1_BC;
Jump_CoP1[9] = R4300iOp::UnknownOpcode;
Jump_CoP1[10] = R4300iOp::UnknownOpcode;
Jump_CoP1[11] = R4300iOp::UnknownOpcode;
Jump_CoP1[12] = R4300iOp::UnknownOpcode;
@ -329,16 +330,16 @@ R4300iOp32::Func * R4300iOp32::BuildInterpreter()
Jump_CoP1[30] = R4300iOp::UnknownOpcode;
Jump_CoP1[31] = R4300iOp::UnknownOpcode;
Jump_CoP1_BC[ 0] = R4300iOp::COP1_BCF;
Jump_CoP1_BC[ 1] = R4300iOp::COP1_BCT;
Jump_CoP1_BC[ 2] = R4300iOp::COP1_BCFL;
Jump_CoP1_BC[ 3] = R4300iOp::COP1_BCTL;
Jump_CoP1_BC[ 4] = R4300iOp::UnknownOpcode;
Jump_CoP1_BC[ 5] = R4300iOp::UnknownOpcode;
Jump_CoP1_BC[ 6] = R4300iOp::UnknownOpcode;
Jump_CoP1_BC[ 7] = R4300iOp::UnknownOpcode;
Jump_CoP1_BC[ 8] = R4300iOp::UnknownOpcode;
Jump_CoP1_BC[ 9] = R4300iOp::UnknownOpcode;
Jump_CoP1_BC[0] = R4300iOp::COP1_BCF;
Jump_CoP1_BC[1] = R4300iOp::COP1_BCT;
Jump_CoP1_BC[2] = R4300iOp::COP1_BCFL;
Jump_CoP1_BC[3] = R4300iOp::COP1_BCTL;
Jump_CoP1_BC[4] = R4300iOp::UnknownOpcode;
Jump_CoP1_BC[5] = R4300iOp::UnknownOpcode;
Jump_CoP1_BC[6] = R4300iOp::UnknownOpcode;
Jump_CoP1_BC[7] = R4300iOp::UnknownOpcode;
Jump_CoP1_BC[8] = R4300iOp::UnknownOpcode;
Jump_CoP1_BC[9] = R4300iOp::UnknownOpcode;
Jump_CoP1_BC[10] = R4300iOp::UnknownOpcode;
Jump_CoP1_BC[11] = R4300iOp::UnknownOpcode;
Jump_CoP1_BC[12] = R4300iOp::UnknownOpcode;
@ -362,16 +363,16 @@ R4300iOp32::Func * R4300iOp32::BuildInterpreter()
Jump_CoP1_BC[30] = R4300iOp::UnknownOpcode;
Jump_CoP1_BC[31] = R4300iOp::UnknownOpcode;
Jump_CoP1_S[ 0] = R4300iOp::COP1_S_ADD;
Jump_CoP1_S[ 1] = R4300iOp::COP1_S_SUB;
Jump_CoP1_S[ 2] = R4300iOp::COP1_S_MUL;
Jump_CoP1_S[ 3] = R4300iOp::COP1_S_DIV;
Jump_CoP1_S[ 4] = R4300iOp::COP1_S_SQRT;
Jump_CoP1_S[ 5] = R4300iOp::COP1_S_ABS;
Jump_CoP1_S[ 6] = R4300iOp::COP1_S_MOV;
Jump_CoP1_S[ 7] = R4300iOp::COP1_S_NEG;
Jump_CoP1_S[ 8] = R4300iOp::UnknownOpcode;
Jump_CoP1_S[ 9] = R4300iOp::COP1_S_TRUNC_L;
Jump_CoP1_S[0] = R4300iOp::COP1_S_ADD;
Jump_CoP1_S[1] = R4300iOp::COP1_S_SUB;
Jump_CoP1_S[2] = R4300iOp::COP1_S_MUL;
Jump_CoP1_S[3] = R4300iOp::COP1_S_DIV;
Jump_CoP1_S[4] = R4300iOp::COP1_S_SQRT;
Jump_CoP1_S[5] = R4300iOp::COP1_S_ABS;
Jump_CoP1_S[6] = R4300iOp::COP1_S_MOV;
Jump_CoP1_S[7] = R4300iOp::COP1_S_NEG;
Jump_CoP1_S[8] = R4300iOp::UnknownOpcode;
Jump_CoP1_S[9] = R4300iOp::COP1_S_TRUNC_L;
Jump_CoP1_S[10] = R4300iOp::COP1_S_CEIL_L; //added by Witten
Jump_CoP1_S[11] = R4300iOp::COP1_S_FLOOR_L; //added by Witten
Jump_CoP1_S[12] = R4300iOp::COP1_S_ROUND_W;
@ -427,16 +428,16 @@ R4300iOp32::Func * R4300iOp32::BuildInterpreter()
Jump_CoP1_S[62] = R4300iOp::COP1_S_CMP;
Jump_CoP1_S[63] = R4300iOp::COP1_S_CMP;
Jump_CoP1_D[ 0] = R4300iOp::COP1_D_ADD;
Jump_CoP1_D[ 1] = R4300iOp::COP1_D_SUB;
Jump_CoP1_D[ 2] = R4300iOp::COP1_D_MUL;
Jump_CoP1_D[ 3] = R4300iOp::COP1_D_DIV;
Jump_CoP1_D[ 4] = R4300iOp::COP1_D_SQRT;
Jump_CoP1_D[ 5] = R4300iOp::COP1_D_ABS;
Jump_CoP1_D[ 6] = R4300iOp::COP1_D_MOV;
Jump_CoP1_D[ 7] = R4300iOp::COP1_D_NEG;
Jump_CoP1_D[ 8] = R4300iOp::UnknownOpcode;
Jump_CoP1_D[ 9] = R4300iOp::COP1_D_TRUNC_L; //added by Witten
Jump_CoP1_D[0] = R4300iOp::COP1_D_ADD;
Jump_CoP1_D[1] = R4300iOp::COP1_D_SUB;
Jump_CoP1_D[2] = R4300iOp::COP1_D_MUL;
Jump_CoP1_D[3] = R4300iOp::COP1_D_DIV;
Jump_CoP1_D[4] = R4300iOp::COP1_D_SQRT;
Jump_CoP1_D[5] = R4300iOp::COP1_D_ABS;
Jump_CoP1_D[6] = R4300iOp::COP1_D_MOV;
Jump_CoP1_D[7] = R4300iOp::COP1_D_NEG;
Jump_CoP1_D[8] = R4300iOp::UnknownOpcode;
Jump_CoP1_D[9] = R4300iOp::COP1_D_TRUNC_L; //added by Witten
Jump_CoP1_D[10] = R4300iOp::COP1_D_CEIL_L; //added by Witten
Jump_CoP1_D[11] = R4300iOp::COP1_D_FLOOR_L; //added by Witten
Jump_CoP1_D[12] = R4300iOp::COP1_D_ROUND_W;
@ -492,16 +493,16 @@ R4300iOp32::Func * R4300iOp32::BuildInterpreter()
Jump_CoP1_D[62] = R4300iOp::COP1_D_CMP;
Jump_CoP1_D[63] = R4300iOp::COP1_D_CMP;
Jump_CoP1_W[ 0] = R4300iOp::UnknownOpcode;
Jump_CoP1_W[ 1] = R4300iOp::UnknownOpcode;
Jump_CoP1_W[ 2] = R4300iOp::UnknownOpcode;
Jump_CoP1_W[ 3] = R4300iOp::UnknownOpcode;
Jump_CoP1_W[ 4] = R4300iOp::UnknownOpcode;
Jump_CoP1_W[ 5] = R4300iOp::UnknownOpcode;
Jump_CoP1_W[ 6] = R4300iOp::UnknownOpcode;
Jump_CoP1_W[ 7] = R4300iOp::UnknownOpcode;
Jump_CoP1_W[ 8] = R4300iOp::UnknownOpcode;
Jump_CoP1_W[ 9] = R4300iOp::UnknownOpcode;
Jump_CoP1_W[0] = R4300iOp::UnknownOpcode;
Jump_CoP1_W[1] = R4300iOp::UnknownOpcode;
Jump_CoP1_W[2] = R4300iOp::UnknownOpcode;
Jump_CoP1_W[3] = R4300iOp::UnknownOpcode;
Jump_CoP1_W[4] = R4300iOp::UnknownOpcode;
Jump_CoP1_W[5] = R4300iOp::UnknownOpcode;
Jump_CoP1_W[6] = R4300iOp::UnknownOpcode;
Jump_CoP1_W[7] = R4300iOp::UnknownOpcode;
Jump_CoP1_W[8] = R4300iOp::UnknownOpcode;
Jump_CoP1_W[9] = R4300iOp::UnknownOpcode;
Jump_CoP1_W[10] = R4300iOp::UnknownOpcode;
Jump_CoP1_W[11] = R4300iOp::UnknownOpcode;
Jump_CoP1_W[12] = R4300iOp::UnknownOpcode;
@ -557,16 +558,16 @@ R4300iOp32::Func * R4300iOp32::BuildInterpreter()
Jump_CoP1_W[62] = R4300iOp::UnknownOpcode;
Jump_CoP1_W[63] = R4300iOp::UnknownOpcode;
Jump_CoP1_L[ 0] = R4300iOp::UnknownOpcode;
Jump_CoP1_L[ 1] = R4300iOp::UnknownOpcode;
Jump_CoP1_L[ 2] = R4300iOp::UnknownOpcode;
Jump_CoP1_L[ 3] = R4300iOp::UnknownOpcode;
Jump_CoP1_L[ 4] = R4300iOp::UnknownOpcode;
Jump_CoP1_L[ 5] = R4300iOp::UnknownOpcode;
Jump_CoP1_L[ 6] = R4300iOp::UnknownOpcode;
Jump_CoP1_L[ 7] = R4300iOp::UnknownOpcode;
Jump_CoP1_L[ 8] = R4300iOp::UnknownOpcode;
Jump_CoP1_L[ 9] = R4300iOp::UnknownOpcode;
Jump_CoP1_L[0] = R4300iOp::UnknownOpcode;
Jump_CoP1_L[1] = R4300iOp::UnknownOpcode;
Jump_CoP1_L[2] = R4300iOp::UnknownOpcode;
Jump_CoP1_L[3] = R4300iOp::UnknownOpcode;
Jump_CoP1_L[4] = R4300iOp::UnknownOpcode;
Jump_CoP1_L[5] = R4300iOp::UnknownOpcode;
Jump_CoP1_L[6] = R4300iOp::UnknownOpcode;
Jump_CoP1_L[7] = R4300iOp::UnknownOpcode;
Jump_CoP1_L[8] = R4300iOp::UnknownOpcode;
Jump_CoP1_L[9] = R4300iOp::UnknownOpcode;
Jump_CoP1_L[10] = R4300iOp::UnknownOpcode;
Jump_CoP1_L[11] = R4300iOp::UnknownOpcode;
Jump_CoP1_L[12] = R4300iOp::UnknownOpcode;
@ -646,7 +647,7 @@ void R4300iOp32::BEQ()
m_JumpToLocation = (*_PROGRAM_COUNTER) + ((int16_t)m_Opcode.offset << 2) + 4;
if ((*_PROGRAM_COUNTER) == m_JumpToLocation)
{
if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER,m_Opcode.rs,m_Opcode.rt))
if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER, m_Opcode.rs, m_Opcode.rt))
{
m_NextInstruction = PERMLOOP_DO_DELAY;
}
@ -666,7 +667,7 @@ void R4300iOp32::BNE()
m_JumpToLocation = (*_PROGRAM_COUNTER) + ((int16_t)m_Opcode.offset << 2) + 4;
if ((*_PROGRAM_COUNTER) == m_JumpToLocation)
{
if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER,m_Opcode.rs,m_Opcode.rt))
if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER, m_Opcode.rs, m_Opcode.rt))
{
m_NextInstruction = PERMLOOP_DO_DELAY;
}
@ -685,7 +686,7 @@ void R4300iOp32::BLEZ() {
m_JumpToLocation = (*_PROGRAM_COUNTER) + ((int16_t)m_Opcode.offset << 2) + 4;
if ((*_PROGRAM_COUNTER) == m_JumpToLocation)
{
if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER,m_Opcode.rs,0))
if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER, m_Opcode.rs, 0))
{
m_NextInstruction = PERMLOOP_DO_DELAY;
}
@ -705,7 +706,7 @@ void R4300iOp32::BGTZ()
m_JumpToLocation = (*_PROGRAM_COUNTER) + ((int16_t)m_Opcode.offset << 2) + 4;
if ((*_PROGRAM_COUNTER) == m_JumpToLocation)
{
if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER,m_Opcode.rs,0))
if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER, m_Opcode.rs, 0))
{
m_NextInstruction = PERMLOOP_DO_DELAY;
}
@ -769,7 +770,7 @@ void R4300iOp32::SLTIU()
int64_t imm64;
imm64 = imm32;
_GPR[m_Opcode.rt].W[0] = _GPR[m_Opcode.rs].UW[0] < (uint64_t)imm64?1:0;
_GPR[m_Opcode.rt].W[0] = _GPR[m_Opcode.rs].UW[0] < (uint64_t)imm64 ? 1 : 0;
}
void R4300iOp32::ANDI()
@ -806,7 +807,7 @@ void R4300iOp32::BEQL()
m_JumpToLocation = (*_PROGRAM_COUNTER) + ((int16_t)m_Opcode.offset << 2) + 4;
if ((*_PROGRAM_COUNTER) == m_JumpToLocation)
{
if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER,m_Opcode.rs,m_Opcode.rt))
if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER, m_Opcode.rs, m_Opcode.rt))
{
m_NextInstruction = PERMLOOP_DO_DELAY;
}
@ -827,7 +828,7 @@ void R4300iOp32::BNEL()
m_JumpToLocation = (*_PROGRAM_COUNTER) + ((int16_t)m_Opcode.offset << 2) + 4;
if ((*_PROGRAM_COUNTER) == m_JumpToLocation)
{
if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER,m_Opcode.rs,m_Opcode.rt))
if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER, m_Opcode.rs, m_Opcode.rt))
{
m_NextInstruction = PERMLOOP_DO_DELAY;
}
@ -848,7 +849,7 @@ void R4300iOp32::BLEZL()
m_JumpToLocation = (*_PROGRAM_COUNTER) + ((int16_t)m_Opcode.offset << 2) + 4;
if ((*_PROGRAM_COUNTER) == m_JumpToLocation)
{
if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER,m_Opcode.rs,0))
if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER, m_Opcode.rs, 0))
{
m_NextInstruction = PERMLOOP_DO_DELAY;
}
@ -869,7 +870,7 @@ void R4300iOp32::BGTZL()
m_JumpToLocation = (*_PROGRAM_COUNTER) + ((int16_t)m_Opcode.offset << 2) + 4;
if ((*_PROGRAM_COUNTER) == m_JumpToLocation)
{
if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER,m_Opcode.rs,0))
if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER, m_Opcode.rs, 0))
{
m_NextInstruction = PERMLOOP_DO_DELAY;
}
@ -884,8 +885,8 @@ void R4300iOp32::BGTZL()
void R4300iOp32::LB()
{
uint32_t Address = _GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset;
if (!g_MMU->LB_VAddr(Address,_GPR[m_Opcode.rt].UB[0]))
uint32_t Address = _GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset;
if (!g_MMU->LB_VAddr(Address, _GPR[m_Opcode.rt].UB[0]))
{
if (bShowTLBMisses())
{
@ -901,12 +902,12 @@ void R4300iOp32::LB()
void R4300iOp32::LH()
{
uint32_t Address = _GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset;
uint32_t Address = _GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset;
if ((Address & 1) != 0)
{
ADDRESS_ERROR_EXCEPTION(Address, true);
}
if (!g_MMU->LH_VAddr(Address,_GPR[m_Opcode.rt].UHW[0]))
if (!g_MMU->LH_VAddr(Address, _GPR[m_Opcode.rt].UHW[0]))
{
if (bShowTLBMisses())
{
@ -925,9 +926,9 @@ void R4300iOp32::LWL()
uint32_t Offset, Address, Value;
Address = _GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset;
Offset = Address & 3;
Offset = Address & 3;
if (!g_MMU->LW_VAddr((Address & ~3),Value))
if (!g_MMU->LW_VAddr((Address & ~3), Value))
{
if (bShowTLBMisses())
{
@ -943,7 +944,7 @@ void R4300iOp32::LWL()
void R4300iOp32::LW()
{
uint32_t Address = _GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset;
uint32_t Address = _GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset;
if ((Address & 3) != 0)
{
ADDRESS_ERROR_EXCEPTION(Address, true);
@ -951,10 +952,10 @@ void R4300iOp32::LW()
if (g_LogOptions.GenerateLog)
{
Log_LW((*_PROGRAM_COUNTER),Address);
Log_LW((*_PROGRAM_COUNTER), Address);
}
if (!g_MMU->LW_VAddr(Address,_GPR[m_Opcode.rt].UW[0]))
if (!g_MMU->LW_VAddr(Address, _GPR[m_Opcode.rt].UW[0]))
{
if (bShowTLBMisses())
{
@ -970,8 +971,8 @@ void R4300iOp32::LW()
void R4300iOp32::LBU()
{
uint32_t Address = _GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset;
if (!g_MMU->LB_VAddr(Address,_GPR[m_Opcode.rt].UB[0]))
uint32_t Address = _GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset;
if (!g_MMU->LB_VAddr(Address, _GPR[m_Opcode.rt].UB[0]))
{
if (bShowTLBMisses())
{
@ -987,12 +988,12 @@ void R4300iOp32::LBU()
void R4300iOp32::LHU()
{
uint32_t Address = _GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset;
uint32_t Address = _GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset;
if ((Address & 1) != 0)
{
ADDRESS_ERROR_EXCEPTION(Address, true);
}
if (!g_MMU->LH_VAddr(Address,_GPR[m_Opcode.rt].UHW[0]))
if (!g_MMU->LH_VAddr(Address, _GPR[m_Opcode.rt].UHW[0]))
{
if (bShowTLBMisses())
{
@ -1011,11 +1012,11 @@ void R4300iOp32::LWR()
uint32_t Offset, Address, Value;
Address = _GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset;
Offset = Address & 3;
Offset = Address & 3;
if (!g_MMU->LW_VAddr((Address & ~3),Value))
if (!g_MMU->LW_VAddr((Address & ~3), Value))
{
g_Notify->BreakPoint(__FILEW__,__LINE__);
g_Notify->BreakPoint(__FILEW__, __LINE__);
if (bShowTLBMisses())
{
g_Notify->DisplayError(stdstr_f(__FUNCTION__ " TLB: %X", Address).ToUTF16().c_str());
@ -1029,13 +1030,13 @@ void R4300iOp32::LWR()
void R4300iOp32::LWU()
{
uint32_t Address = _GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset;
uint32_t Address = _GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset;
if ((Address & 3) != 0)
{
ADDRESS_ERROR_EXCEPTION(Address, true);
}
if (!g_MMU->LW_VAddr(Address,_GPR[m_Opcode.rt].UW[0]))
if (!g_MMU->LW_VAddr(Address, _GPR[m_Opcode.rt].UW[0]))
{
if (bShowTLBMisses())
{
@ -1051,13 +1052,13 @@ void R4300iOp32::LWU()
void R4300iOp32::LL()
{
uint32_t Address = _GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset;
uint32_t Address = _GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset;
if ((Address & 3) != 0)
{
ADDRESS_ERROR_EXCEPTION(Address, true);
}
if (!g_MMU->LW_VAddr(Address,_GPR[m_Opcode.rt].UW[0]))
if (!g_MMU->LW_VAddr(Address, _GPR[m_Opcode.rt].UW[0]))
{
if (bShowTLBMisses())
{
@ -1203,7 +1204,7 @@ void R4300iOp32::REGIMM_BLTZ()
m_JumpToLocation = (*_PROGRAM_COUNTER) + ((int16_t)m_Opcode.offset << 2) + 4;
if ((*_PROGRAM_COUNTER) == m_JumpToLocation)
{
if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER),m_Opcode.rs,0))
if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER), m_Opcode.rs, 0))
{
CInterpreterCPU::InPermLoop();
}
@ -1223,7 +1224,7 @@ void R4300iOp32::REGIMM_BGEZ()
m_JumpToLocation = (*_PROGRAM_COUNTER) + ((int16_t)m_Opcode.offset << 2) + 4;
if ((*_PROGRAM_COUNTER) == m_JumpToLocation)
{
if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER),m_Opcode.rs,0))
if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER), m_Opcode.rs, 0))
{
CInterpreterCPU::InPermLoop();
}
@ -1243,7 +1244,7 @@ void R4300iOp32::REGIMM_BLTZL()
m_JumpToLocation = (*_PROGRAM_COUNTER) + ((int16_t)m_Opcode.offset << 2) + 4;
if ((*_PROGRAM_COUNTER) == m_JumpToLocation)
{
if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER),m_Opcode.rs,0))
if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER), m_Opcode.rs, 0))
{
CInterpreterCPU::InPermLoop();
}
@ -1264,7 +1265,7 @@ void R4300iOp32::REGIMM_BGEZL()
m_JumpToLocation = (*_PROGRAM_COUNTER) + ((int16_t)m_Opcode.offset << 2) + 4;
if ((*_PROGRAM_COUNTER) == m_JumpToLocation)
{
if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER),m_Opcode.rs,0))
if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER), m_Opcode.rs, 0))
{
CInterpreterCPU::InPermLoop();
}
@ -1285,7 +1286,7 @@ void R4300iOp32::REGIMM_BLTZAL()
m_JumpToLocation = (*_PROGRAM_COUNTER) + ((int16_t)m_Opcode.offset << 2) + 4;
if ((*_PROGRAM_COUNTER) == m_JumpToLocation)
{
if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER),m_Opcode.rs,0))
if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER), m_Opcode.rs, 0))
{
CInterpreterCPU::InPermLoop();
}
@ -1295,7 +1296,7 @@ void R4300iOp32::REGIMM_BLTZAL()
{
m_JumpToLocation = (*_PROGRAM_COUNTER) + 8;
}
_GPR[31].W[0]= (int32_t)((*_PROGRAM_COUNTER) + 8);
_GPR[31].W[0] = (int32_t)((*_PROGRAM_COUNTER) + 8);
}
void R4300iOp32::REGIMM_BGEZAL()
@ -1306,7 +1307,7 @@ void R4300iOp32::REGIMM_BGEZAL()
m_JumpToLocation = (*_PROGRAM_COUNTER) + ((int16_t)m_Opcode.offset << 2) + 4;
if ((*_PROGRAM_COUNTER) == m_JumpToLocation)
{
if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER),m_Opcode.rs,0))
if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER), m_Opcode.rs, 0))
{
CInterpreterCPU::InPermLoop();
}
@ -1338,10 +1339,10 @@ void R4300iOp32::COP0_MT()
{
if (g_LogOptions.LogCP0changes)
{
LogMessage("%08X: Writing 0x%X to %s register (Originally: 0x%08X)",(*_PROGRAM_COUNTER), _GPR[m_Opcode.rt].UW[0],CRegName::Cop0[m_Opcode.rd], _CP0[m_Opcode.rd]);
LogMessage("%08X: Writing 0x%X to %s register (Originally: 0x%08X)", (*_PROGRAM_COUNTER), _GPR[m_Opcode.rt].UW[0], CRegName::Cop0[m_Opcode.rd], _CP0[m_Opcode.rd]);
if (m_Opcode.rd == 11) //Compare
{
LogMessage("%08X: Cause register changed from %08X to %08X",(*_PROGRAM_COUNTER), g_Reg->CAUSE_REGISTER, (g_Reg->CAUSE_REGISTER & ~CAUSE_IP7));
LogMessage("%08X: Cause register changed from %08X to %08X", (*_PROGRAM_COUNTER), g_Reg->CAUSE_REGISTER, (g_Reg->CAUSE_REGISTER & ~CAUSE_IP7));
}
}
@ -1397,7 +1398,7 @@ void R4300iOp32::COP0_MT()
break;
case 13: //cause
_CP0[m_Opcode.rd] &= 0xFFFFCFF;
if ((_GPR[m_Opcode.rt].UW[0] & 0x300) != 0 && g_Settings->LoadBool(Debugger_Enabled) )
if ((_GPR[m_Opcode.rt].UW[0] & 0x300) != 0 && g_Settings->LoadBool(Debugger_Enabled))
{
g_Notify->DisplayError(L"Set IP0 or IP1");
}
@ -1422,11 +1423,11 @@ void R4300iOp32::COP1_CF()
if (g_Settings->LoadBool(Debugger_Enabled)) { g_Notify->DisplayError(L"CFC1 what register are you writing to ?"); }
return;
}
_GPR[m_Opcode.rt].W[0] = (int32_t)_FPCR[m_Opcode.fs];
_GPR[m_Opcode.rt].W[0] = (int32_t)_FPCR[m_Opcode.fs];
}
void R4300iOp32::COP1_DMT()
{
TEST_COP1_USABLE_EXCEPTION
*(int64_t *)_FPR_D[m_Opcode.fs] = _GPR[m_Opcode.rt].W[0];
}
}

757
Source/Project64/N64 System/Interpreter/Interpreter Ops.cpp
View File

File diff suppressed because it is too large Load Diff

941
Source/Project64/N64 System/Mips/Pif Ram.cpp
View File

File diff suppressed because it is too large Load Diff

373
Source/Project64/N64 System/Mips/Register Class.cpp
View File

@ -9,42 +9,43 @@
* *
****************************************************************************/
#include "stdafx.h"
#include <Project64\User Interface\LoggingUI.h>
const char * CRegName::GPR[32] = {"r0","at","v0","v1","a0","a1","a2","a3",
"t0","t1","t2","t3","t4","t5","t6","t7",
"s0","s1","s2","s3","s4","s5","s6","s7",
"t8","t9","k0","k1","gp","sp","s8","ra"};
const char * CRegName::GPR[32] = { "r0", "at", "v0", "v1", "a0", "a1", "a2", "a3",
"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
"t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra" };
const char *CRegName::GPR_Hi[32] = {"r0.HI","at.HI","v0.HI","v1.HI","a0.HI","a1.HI",
"a2.HI","a3.HI","t0.HI","t1.HI","t2.HI","t3.HI",
"t4.HI","t5.HI","t6.HI","t7.HI","s0.HI","s1.HI",
"s2.HI","s3.HI","s4.HI","s5.HI","s6.HI","s7.HI",
"t8.HI","t9.HI","k0.HI","k1.HI","gp.HI","sp.HI",
"s8.HI","ra.HI"};
const char *CRegName::GPR_Hi[32] = { "r0.HI", "at.HI", "v0.HI", "v1.HI", "a0.HI", "a1.HI",
"a2.HI", "a3.HI", "t0.HI", "t1.HI", "t2.HI", "t3.HI",
"t4.HI", "t5.HI", "t6.HI", "t7.HI", "s0.HI", "s1.HI",
"s2.HI", "s3.HI", "s4.HI", "s5.HI", "s6.HI", "s7.HI",
"t8.HI", "t9.HI", "k0.HI", "k1.HI", "gp.HI", "sp.HI",
"s8.HI", "ra.HI" };
const char *CRegName::GPR_Lo[32] = {"r0.LO","at.LO","v0.LO","v1.LO","a0.LO","a1.LO",
"a2.LO","a3.LO","t0.LO","t1.LO","t2.LO","t3.LO",
"t4.LO","t5.LO","t6.LO","t7.LO","s0.LO","s1.LO",
"s2.LO","s3.LO","s4.LO","s5.LO","s6.LO","s7.LO",
"t8.LO","t9.LO","k0.LO","k1.LO","gp.LO","sp.LO",
"s8.LO","ra.LO"};
const char *CRegName::GPR_Lo[32] = { "r0.LO", "at.LO", "v0.LO", "v1.LO", "a0.LO", "a1.LO",
"a2.LO", "a3.LO", "t0.LO", "t1.LO", "t2.LO", "t3.LO",
"t4.LO", "t5.LO", "t6.LO", "t7.LO", "s0.LO", "s1.LO",
"s2.LO", "s3.LO", "s4.LO", "s5.LO", "s6.LO", "s7.LO",
"t8.LO", "t9.LO", "k0.LO", "k1.LO", "gp.LO", "sp.LO",
"s8.LO", "ra.LO" };
const char * CRegName::Cop0[32] = {"Index","Random","EntryLo0","EntryLo1","Context","PageMask","Wired","",
"BadVAddr","Count","EntryHi","Compare","Status","Cause","EPC","PRId",
"Config","LLAddr","WatchLo","WatchHi","XContext","","","",
"","","ECC","CacheErr","TagLo","TagHi","ErrEPC",""};
const char * CRegName::Cop0[32] = { "Index", "Random", "EntryLo0", "EntryLo1", "Context", "PageMask", "Wired", "",
"BadVAddr", "Count", "EntryHi", "Compare", "Status", "Cause", "EPC", "PRId",
"Config", "LLAddr", "WatchLo", "WatchHi", "XContext", "", "", "",
"", "", "ECC", "CacheErr", "TagLo", "TagHi", "ErrEPC", "" };
const char * CRegName::FPR[32] = {"f0","f1","f2","f3","f4","f5","f6","f7",
"f8","f9","f10","f11","f12","f13","f14","f15",
"f16","f17","f18","f19","f20","f21","f22","f23",
"f24","f25","f26","f27","f28","f29","f30","f31"};
const char * CRegName::FPR[32] = { "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31" };
const char * CRegName::FPR_Ctrl[32] = {"Revision","Unknown","Unknown","Unknown","Unknown",
"Unknown","Unknown","Unknown","Unknown","Unknown","Unknown",
"Unknown","Unknown","Unknown","Unknown","Unknown","Unknown",
"Unknown","Unknown","Unknown","Unknown","Unknown","Unknown",
"Unknown","Unknown","Unknown","Unknown","Unknown","Unknown",
"Unknown","Unknown","FCSR"};
const char * CRegName::FPR_Ctrl[32] = { "Revision", "Unknown", "Unknown", "Unknown", "Unknown",
"Unknown", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown",
"Unknown", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown",
"Unknown", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown",
"Unknown", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown",
"Unknown", "Unknown", "FCSR" };
uint32_t * CSystemRegisters::_PROGRAM_COUNTER = NULL;
MIPS_DWORD * CSystemRegisters::_GPR = NULL;
@ -59,169 +60,169 @@ uint32_t * CSystemRegisters::_LLBit = NULL;
ROUNDING_MODE * CSystemRegisters::_RoundingModel = NULL;
CP0registers::CP0registers(uint32_t * _CP0) :
INDEX_REGISTER(_CP0[0]),
RANDOM_REGISTER(_CP0[1]),
ENTRYLO0_REGISTER(_CP0[2]),
ENTRYLO1_REGISTER(_CP0[3]),
CONTEXT_REGISTER(_CP0[4]),
PAGE_MASK_REGISTER(_CP0[5]),
WIRED_REGISTER(_CP0[6]),
BAD_VADDR_REGISTER(_CP0[8]),
COUNT_REGISTER(_CP0[9]),
ENTRYHI_REGISTER(_CP0[10]),
COMPARE_REGISTER(_CP0[11]),
STATUS_REGISTER(_CP0[12]),
CAUSE_REGISTER(_CP0[13]),
EPC_REGISTER(_CP0[14]),
CONFIG_REGISTER(_CP0[16]),
TAGLO_REGISTER(_CP0[28]),
TAGHI_REGISTER(_CP0[29]),
ERROREPC_REGISTER(_CP0[30]),
FAKE_CAUSE_REGISTER(_CP0[32])
INDEX_REGISTER(_CP0[0]),
RANDOM_REGISTER(_CP0[1]),
ENTRYLO0_REGISTER(_CP0[2]),
ENTRYLO1_REGISTER(_CP0[3]),
CONTEXT_REGISTER(_CP0[4]),
PAGE_MASK_REGISTER(_CP0[5]),
WIRED_REGISTER(_CP0[6]),
BAD_VADDR_REGISTER(_CP0[8]),
COUNT_REGISTER(_CP0[9]),
ENTRYHI_REGISTER(_CP0[10]),
COMPARE_REGISTER(_CP0[11]),
STATUS_REGISTER(_CP0[12]),
CAUSE_REGISTER(_CP0[13]),
EPC_REGISTER(_CP0[14]),
CONFIG_REGISTER(_CP0[16]),
TAGLO_REGISTER(_CP0[28]),
TAGHI_REGISTER(_CP0[29]),
ERROREPC_REGISTER(_CP0[30]),
FAKE_CAUSE_REGISTER(_CP0[32])
{
}
Rdram_InterfaceReg::Rdram_InterfaceReg(uint32_t * _RdramInterface) :
RDRAM_CONFIG_REG(_RdramInterface[0]),
RDRAM_DEVICE_TYPE_REG(_RdramInterface[0]),
RDRAM_DEVICE_ID_REG(_RdramInterface[1]),
RDRAM_DELAY_REG(_RdramInterface[2]),
RDRAM_MODE_REG(_RdramInterface[3]),
RDRAM_REF_INTERVAL_REG(_RdramInterface[4]),
RDRAM_REF_ROW_REG(_RdramInterface[5]),
RDRAM_RAS_INTERVAL_REG(_RdramInterface[6]),
RDRAM_MIN_INTERVAL_REG(_RdramInterface[7]),
RDRAM_ADDR_SELECT_REG(_RdramInterface[8]),
RDRAM_DEVICE_MANUF_REG(_RdramInterface[9])
RDRAM_CONFIG_REG(_RdramInterface[0]),
RDRAM_DEVICE_TYPE_REG(_RdramInterface[0]),
RDRAM_DEVICE_ID_REG(_RdramInterface[1]),
RDRAM_DELAY_REG(_RdramInterface[2]),
RDRAM_MODE_REG(_RdramInterface[3]),
RDRAM_REF_INTERVAL_REG(_RdramInterface[4]),
RDRAM_REF_ROW_REG(_RdramInterface[5]),
RDRAM_RAS_INTERVAL_REG(_RdramInterface[6]),
RDRAM_MIN_INTERVAL_REG(_RdramInterface[7]),
RDRAM_ADDR_SELECT_REG(_RdramInterface[8]),
RDRAM_DEVICE_MANUF_REG(_RdramInterface[9])
{
}
Mips_InterfaceReg::Mips_InterfaceReg(uint32_t * _MipsInterface) :
MI_INIT_MODE_REG(_MipsInterface[0]),
MI_MODE_REG(_MipsInterface[0]),
MI_VERSION_REG(_MipsInterface[1]),
MI_NOOP_REG(_MipsInterface[1]),
MI_INTR_REG(_MipsInterface[2]),
MI_INTR_MASK_REG(_MipsInterface[3])
MI_INIT_MODE_REG(_MipsInterface[0]),
MI_MODE_REG(_MipsInterface[0]),
MI_VERSION_REG(_MipsInterface[1]),
MI_NOOP_REG(_MipsInterface[1]),
MI_INTR_REG(_MipsInterface[2]),
MI_INTR_MASK_REG(_MipsInterface[3])
{
}
Video_InterfaceReg::Video_InterfaceReg(uint32_t * _VideoInterface) :
VI_STATUS_REG(_VideoInterface[0]),
VI_CONTROL_REG(_VideoInterface[0]),
VI_ORIGIN_REG(_VideoInterface[1]),
VI_DRAM_ADDR_REG(_VideoInterface[1]),
VI_WIDTH_REG(_VideoInterface[2]),
VI_H_WIDTH_REG(_VideoInterface[2]),
VI_INTR_REG(_VideoInterface[3]),
VI_V_INTR_REG(_VideoInterface[3]),
VI_CURRENT_REG(_VideoInterface[4]),
VI_V_CURRENT_LINE_REG(_VideoInterface[4]),
VI_BURST_REG(_VideoInterface[5]),
VI_TIMING_REG(_VideoInterface[5]),
VI_V_SYNC_REG(_VideoInterface[6]),
VI_H_SYNC_REG(_VideoInterface[7]),
VI_LEAP_REG(_VideoInterface[8]),
VI_H_SYNC_LEAP_REG(_VideoInterface[8]),
VI_H_START_REG(_VideoInterface[9]),
VI_H_VIDEO_REG(_VideoInterface[9]),
VI_V_START_REG(_VideoInterface[10]),
VI_V_VIDEO_REG(_VideoInterface[10]),
VI_V_BURST_REG(_VideoInterface[11]),
VI_X_SCALE_REG(_VideoInterface[12]),
VI_Y_SCALE_REG(_VideoInterface[13])
VI_STATUS_REG(_VideoInterface[0]),
VI_CONTROL_REG(_VideoInterface[0]),
VI_ORIGIN_REG(_VideoInterface[1]),
VI_DRAM_ADDR_REG(_VideoInterface[1]),
VI_WIDTH_REG(_VideoInterface[2]),
VI_H_WIDTH_REG(_VideoInterface[2]),
VI_INTR_REG(_VideoInterface[3]),
VI_V_INTR_REG(_VideoInterface[3]),
VI_CURRENT_REG(_VideoInterface[4]),
VI_V_CURRENT_LINE_REG(_VideoInterface[4]),
VI_BURST_REG(_VideoInterface[5]),
VI_TIMING_REG(_VideoInterface[5]),
VI_V_SYNC_REG(_VideoInterface[6]),
VI_H_SYNC_REG(_VideoInterface[7]),
VI_LEAP_REG(_VideoInterface[8]),
VI_H_SYNC_LEAP_REG(_VideoInterface[8]),
VI_H_START_REG(_VideoInterface[9]),
VI_H_VIDEO_REG(_VideoInterface[9]),
VI_V_START_REG(_VideoInterface[10]),
VI_V_VIDEO_REG(_VideoInterface[10]),
VI_V_BURST_REG(_VideoInterface[11]),
VI_X_SCALE_REG(_VideoInterface[12]),
VI_Y_SCALE_REG(_VideoInterface[13])
{
}
AudioInterfaceReg::AudioInterfaceReg(uint32_t * _AudioInterface) :
AI_DRAM_ADDR_REG(_AudioInterface[0]),
AI_LEN_REG(_AudioInterface[1]),
AI_CONTROL_REG(_AudioInterface[2]),
AI_STATUS_REG(_AudioInterface[3]),
AI_DACRATE_REG(_AudioInterface[4]),
AI_BITRATE_REG(_AudioInterface[5])
AI_DRAM_ADDR_REG(_AudioInterface[0]),
AI_LEN_REG(_AudioInterface[1]),
AI_CONTROL_REG(_AudioInterface[2]),
AI_STATUS_REG(_AudioInterface[3]),
AI_DACRATE_REG(_AudioInterface[4]),
AI_BITRATE_REG(_AudioInterface[5])
{
}
PeripheralInterfaceReg::PeripheralInterfaceReg(uint32_t * PeripheralInterface) :
PI_DRAM_ADDR_REG(PeripheralInterface[0]),
PI_CART_ADDR_REG(PeripheralInterface[1]),
PI_RD_LEN_REG(PeripheralInterface[2]),
PI_WR_LEN_REG(PeripheralInterface[3]),
PI_STATUS_REG(PeripheralInterface[4]),
PI_BSD_DOM1_LAT_REG(PeripheralInterface[5]),
PI_DOMAIN1_REG(PeripheralInterface[5]),
PI_BSD_DOM1_PWD_REG(PeripheralInterface[6]),
PI_BSD_DOM1_PGS_REG(PeripheralInterface[7]),
PI_BSD_DOM1_RLS_REG(PeripheralInterface[8]),
PI_BSD_DOM2_LAT_REG(PeripheralInterface[9]),
PI_DOMAIN2_REG(PeripheralInterface[9]),
PI_BSD_DOM2_PWD_REG(PeripheralInterface[10]),
PI_BSD_DOM2_PGS_REG(PeripheralInterface[11]),
PI_BSD_DOM2_RLS_REG(PeripheralInterface[12])
PI_DRAM_ADDR_REG(PeripheralInterface[0]),
PI_CART_ADDR_REG(PeripheralInterface[1]),
PI_RD_LEN_REG(PeripheralInterface[2]),
PI_WR_LEN_REG(PeripheralInterface[3]),
PI_STATUS_REG(PeripheralInterface[4]),
PI_BSD_DOM1_LAT_REG(PeripheralInterface[5]),
PI_DOMAIN1_REG(PeripheralInterface[5]),
PI_BSD_DOM1_PWD_REG(PeripheralInterface[6]),
PI_BSD_DOM1_PGS_REG(PeripheralInterface[7]),
PI_BSD_DOM1_RLS_REG(PeripheralInterface[8]),
PI_BSD_DOM2_LAT_REG(PeripheralInterface[9]),
PI_DOMAIN2_REG(PeripheralInterface[9]),
PI_BSD_DOM2_PWD_REG(PeripheralInterface[10]),
PI_BSD_DOM2_PGS_REG(PeripheralInterface[11]),
PI_BSD_DOM2_RLS_REG(PeripheralInterface[12])
{
}
RDRAMInt_InterfaceReg::RDRAMInt_InterfaceReg(uint32_t * RdramInterface) :
RI_MODE_REG(RdramInterface[0]),
RI_CONFIG_REG(RdramInterface[1]),
RI_CURRENT_LOAD_REG(RdramInterface[2]),
RI_SELECT_REG(RdramInterface[3]),
RI_COUNT_REG(RdramInterface[4]),
RI_REFRESH_REG(RdramInterface[4]),
RI_LATENCY_REG(RdramInterface[5]),
RI_RERROR_REG(RdramInterface[6]),
RI_WERROR_REG(RdramInterface[7])
RI_MODE_REG(RdramInterface[0]),
RI_CONFIG_REG(RdramInterface[1]),
RI_CURRENT_LOAD_REG(RdramInterface[2]),
RI_SELECT_REG(RdramInterface[3]),
RI_COUNT_REG(RdramInterface[4]),
RI_REFRESH_REG(RdramInterface[4]),
RI_LATENCY_REG(RdramInterface[5]),
RI_RERROR_REG(RdramInterface[6]),
RI_WERROR_REG(RdramInterface[7])
{
}
DisplayControlReg::DisplayControlReg(uint32_t * _DisplayProcessor) :
DPC_START_REG(_DisplayProcessor[0]),
DPC_END_REG(_DisplayProcessor[1]),
DPC_CURRENT_REG(_DisplayProcessor[2]),
DPC_STATUS_REG(_DisplayProcessor[3]),
DPC_CLOCK_REG(_DisplayProcessor[4]),
DPC_BUFBUSY_REG(_DisplayProcessor[5]),
DPC_PIPEBUSY_REG(_DisplayProcessor[6]),
DPC_TMEM_REG(_DisplayProcessor[7])
DPC_START_REG(_DisplayProcessor[0]),
DPC_END_REG(_DisplayProcessor[1]),
DPC_CURRENT_REG(_DisplayProcessor[2]),
DPC_STATUS_REG(_DisplayProcessor[3]),
DPC_CLOCK_REG(_DisplayProcessor[4]),
DPC_BUFBUSY_REG(_DisplayProcessor[5]),
DPC_PIPEBUSY_REG(_DisplayProcessor[6]),
DPC_TMEM_REG(_DisplayProcessor[7])
{
}
SigProcessor_InterfaceReg::SigProcessor_InterfaceReg(uint32_t * _SignalProcessorInterface) :
SP_MEM_ADDR_REG(_SignalProcessorInterface[0]),
SP_DRAM_ADDR_REG(_SignalProcessorInterface[1]),
SP_RD_LEN_REG(_SignalProcessorInterface[2]),
SP_WR_LEN_REG(_SignalProcessorInterface[3]),
SP_STATUS_REG(_SignalProcessorInterface[4]),
SP_DMA_FULL_REG(_SignalProcessorInterface[5]),
SP_DMA_BUSY_REG(_SignalProcessorInterface[6]),
SP_SEMAPHORE_REG(_SignalProcessorInterface[7]),
SP_PC_REG(_SignalProcessorInterface[8]),
SP_IBIST_REG(_SignalProcessorInterface[9])
SP_MEM_ADDR_REG(_SignalProcessorInterface[0]),
SP_DRAM_ADDR_REG(_SignalProcessorInterface[1]),
SP_RD_LEN_REG(_SignalProcessorInterface[2]),
SP_WR_LEN_REG(_SignalProcessorInterface[3]),
SP_STATUS_REG(_SignalProcessorInterface[4]),
SP_DMA_FULL_REG(_SignalProcessorInterface[5]),
SP_DMA_BUSY_REG(_SignalProcessorInterface[6]),
SP_SEMAPHORE_REG(_SignalProcessorInterface[7]),
SP_PC_REG(_SignalProcessorInterface[8]),
SP_IBIST_REG(_SignalProcessorInterface[9])
{
}
Serial_InterfaceReg::Serial_InterfaceReg(uint32_t * SerialInterface) :
SI_DRAM_ADDR_REG(SerialInterface[0]),
SI_PIF_ADDR_RD64B_REG(SerialInterface[1]),
SI_PIF_ADDR_WR64B_REG(SerialInterface[2]),
SI_STATUS_REG(SerialInterface[3])
SI_DRAM_ADDR_REG(SerialInterface[0]),
SI_PIF_ADDR_RD64B_REG(SerialInterface[1]),
SI_PIF_ADDR_WR64B_REG(SerialInterface[2]),
SI_STATUS_REG(SerialInterface[3])
{
}
CRegisters::CRegisters(CN64System * System, CSystemEvents * SystemEvents) :
CP0registers(m_CP0),
Rdram_InterfaceReg(m_RDRAM_Registers),
Mips_InterfaceReg(m_Mips_Interface),
Video_InterfaceReg(m_Video_Interface),
AudioInterfaceReg(m_Audio_Interface),
PeripheralInterfaceReg(m_Peripheral_Interface),
RDRAMInt_InterfaceReg(m_RDRAM_Interface),
SigProcessor_InterfaceReg(m_SigProcessor_Interface),
DisplayControlReg(m_Display_ControlReg),
Serial_InterfaceReg(m_SerialInterface),
m_System(System),
m_SystemEvents(SystemEvents)
CP0registers(m_CP0),
Rdram_InterfaceReg(m_RDRAM_Registers),
Mips_InterfaceReg(m_Mips_Interface),
Video_InterfaceReg(m_Video_Interface),
AudioInterfaceReg(m_Audio_Interface),
PeripheralInterfaceReg(m_Peripheral_Interface),
RDRAMInt_InterfaceReg(m_RDRAM_Interface),
SigProcessor_InterfaceReg(m_SigProcessor_Interface),
DisplayControlReg(m_Display_ControlReg),
Serial_InterfaceReg(m_SerialInterface),
m_System(System),
m_SystemEvents(SystemEvents)
{
Reset();
}
@ -230,26 +231,26 @@ void CRegisters::Reset()
{
m_FirstInterupt = true;
memset(m_GPR,0,sizeof(m_GPR));
memset(m_CP0,0,sizeof(m_CP0));
memset(m_FPR,0,sizeof(m_FPR));
memset(m_FPCR,0,sizeof(m_FPCR));
m_HI.DW = 0;
m_LO.DW = 0;
memset(m_GPR, 0, sizeof(m_GPR));
memset(m_CP0, 0, sizeof(m_CP0));
memset(m_FPR, 0, sizeof(m_FPR));
memset(m_FPCR, 0, sizeof(m_FPCR));
m_HI.DW = 0;
m_LO.DW = 0;
m_RoundingModel = ROUND_NEAR;
m_LLBit = 0;
m_LLBit = 0;
//Reset System Registers
memset(m_RDRAM_Interface,0,sizeof(m_RDRAM_Interface));
memset(m_RDRAM_Registers,0,sizeof(m_RDRAM_Registers));
memset(m_Mips_Interface,0,sizeof(m_Mips_Interface));
memset(m_Video_Interface,0,sizeof(m_Video_Interface));
memset(m_Display_ControlReg,0,sizeof(m_Display_ControlReg));
memset(m_Audio_Interface,0,sizeof(m_Audio_Interface));
memset(m_SigProcessor_Interface,0,sizeof(m_SigProcessor_Interface));
memset(m_Peripheral_Interface,0,sizeof(m_Peripheral_Interface));
memset(m_SerialInterface,0,sizeof(m_SerialInterface));
memset(m_RDRAM_Interface, 0, sizeof(m_RDRAM_Interface));
memset(m_RDRAM_Registers, 0, sizeof(m_RDRAM_Registers));
memset(m_Mips_Interface, 0, sizeof(m_Mips_Interface));
memset(m_Video_Interface, 0, sizeof(m_Video_Interface));
memset(m_Display_ControlReg, 0, sizeof(m_Display_ControlReg));
memset(m_Audio_Interface, 0, sizeof(m_Audio_Interface));
memset(m_SigProcessor_Interface, 0, sizeof(m_SigProcessor_Interface));
memset(m_Peripheral_Interface, 0, sizeof(m_Peripheral_Interface));
memset(m_SerialInterface, 0, sizeof(m_SerialInterface));
m_AudioIntrReg = 0;
m_GfxIntrReg = 0;
@ -291,27 +292,27 @@ void CRegisters::CheckInterrupts()
FAKE_CAUSE_REGISTER &= ~CAUSE_IP2;
}
if (( STATUS_REGISTER & STATUS_IE ) == 0 )
if ((STATUS_REGISTER & STATUS_IE) == 0)
{
return;
}
if (( STATUS_REGISTER & STATUS_EXL ) != 0 )
if ((STATUS_REGISTER & STATUS_EXL) != 0)
{
return;
}
if (( STATUS_REGISTER & STATUS_ERL ) != 0 )
if ((STATUS_REGISTER & STATUS_ERL) != 0)
{
return;
}
if (( STATUS_REGISTER & FAKE_CAUSE_REGISTER & 0xFF00) != 0)
if ((STATUS_REGISTER & FAKE_CAUSE_REGISTER & 0xFF00) != 0)
{
if (m_FirstInterupt)
{
m_FirstInterupt = false;
if (g_Recompiler)
{
g_Recompiler->ClearRecompCode_Virt(0x80000000,0x200,CRecompiler::Remove_InitialCode);
g_Recompiler->ClearRecompCode_Virt(0x80000000, 0x200, CRecompiler::Remove_InitialCode);
}
}
m_SystemEvents->QueueEvent(SysEvent_ExecuteInterrupt);
@ -323,11 +324,11 @@ void CRegisters::DoAddressError(bool DelaySlot, uint32_t BadVaddr, bool FromRead
if (bHaveDebugger())
{
g_Notify->DisplayError(L"AddressError");
if (( STATUS_REGISTER & STATUS_EXL ) != 0 )
if ((STATUS_REGISTER & STATUS_EXL) != 0)
{
g_Notify->DisplayError(L"EXL set in AddressError Exception");
}
if (( STATUS_REGISTER & STATUS_ERL ) != 0 )
if ((STATUS_REGISTER & STATUS_ERL) != 0)
{
g_Notify->DisplayError(L"ERL set in AddressError Exception");
}
@ -359,7 +360,7 @@ void CRegisters::FixFpuLocations()
{
if ((STATUS_REGISTER & STATUS_FR) == 0)
{
for (int count = 0; count < 32; count ++)
for (int count = 0; count < 32; count++)
{
m_FPR_S[count] = &m_FPR[count >> 1].F[count & 1];
m_FPR_D[count] = &m_FPR[count >> 1].D;
@ -367,7 +368,7 @@ void CRegisters::FixFpuLocations()
}
else
{
for (int count = 0; count < 32; count ++) {
for (int count = 0; count < 32; count++) {
m_FPR_S[count] = &m_FPR[count].F[1];
m_FPR_D[count] = &m_FPR[count].D;
}
@ -378,11 +379,11 @@ void CRegisters::DoBreakException(bool DelaySlot)
{
if (bHaveDebugger())
{
if (( STATUS_REGISTER & STATUS_EXL ) != 0 )
if ((STATUS_REGISTER & STATUS_EXL) != 0)
{
g_Notify->DisplayError(L"EXL set in Break Exception");
}
if (( STATUS_REGISTER & STATUS_ERL ) != 0 )
if ((STATUS_REGISTER & STATUS_ERL) != 0)
{
g_Notify->DisplayError(L"ERL set in Break Exception");
}
@ -406,11 +407,11 @@ void CRegisters::DoCopUnusableException(bool DelaySlot, int Coprocessor)
{
if (bHaveDebugger())
{
if (( STATUS_REGISTER & STATUS_EXL ) != 0 )
if ((STATUS_REGISTER & STATUS_EXL) != 0)
{
g_Notify->DisplayError(L"EXL set in Break Exception");
}
if (( STATUS_REGISTER & STATUS_ERL ) != 0 )
if ((STATUS_REGISTER & STATUS_ERL) != 0)
{
g_Notify->DisplayError(L"ERL set in Break Exception");
}
@ -506,7 +507,7 @@ void CRegisters::DoTLBReadMiss(bool DelaySlot, uint32_t BadVaddr)
{
if (bHaveDebugger())
{
g_Notify->DisplayError(stdstr_f("TLBMiss - EXL Set\nBadVaddr = %X\nAddress Defined: %s",BadVaddr,g_TLB->AddressDefined(BadVaddr)?"TRUE":"FALSE").ToUTF16().c_str());
g_Notify->DisplayError(stdstr_f("TLBMiss - EXL Set\nBadVaddr = %X\nAddress Defined: %s", BadVaddr, g_TLB->AddressDefined(BadVaddr) ? "TRUE" : "FALSE").ToUTF16().c_str());
}
m_PROGRAM_COUNTER = 0x80000180;
}
@ -516,11 +517,11 @@ void CRegisters::DoSysCallException(bool DelaySlot)
{
if (bHaveDebugger())
{
if (( STATUS_REGISTER & STATUS_EXL ) != 0 )
if ((STATUS_REGISTER & STATUS_EXL) != 0)
{
g_Notify->DisplayError(L"EXL set in SysCall Exception");
}
if (( STATUS_REGISTER & STATUS_ERL ) != 0 )
if ((STATUS_REGISTER & STATUS_ERL) != 0)
{
g_Notify->DisplayError(L"ERL set in SysCall Exception");
}
@ -538,4 +539,4 @@ void CRegisters::DoSysCallException(bool DelaySlot)
}
STATUS_REGISTER |= STATUS_EXL;
m_PROGRAM_COUNTER = 0x80000180;
}
}

2
Source/Project64/N64 System/N64 Class.cpp
View File

@ -9,6 +9,7 @@
* *
****************************************************************************/
#include "stdafx.h"
#include <Project64\User Interface\LoggingUI.h>
#pragma warning(disable:4355) // Disable 'this' : used in base member initializer list
@ -459,7 +460,6 @@ void CN64System::Pause()
Notify().DisplayMessage(5, MSG_CPU_RESUMED);
}
void CN64System::GameReset()
{
m_SystemTimer.SetTimer(CSystemTimer::SoftResetTimer, 0x3000000, false);

4
Source/Project64/Project64.vcxproj
View File

@ -44,7 +44,6 @@
</Manifest>
</ItemDefinitionGroup>
<ItemGroup>
<ClCompile Include="Logging.cpp" />
<ClCompile Include="main.cpp" />
<ClCompile Include="Multilanguage\LanguageSelector.cpp" />
<ClCompile Include="N64 System\Mips\Rumblepak.cpp" />
@ -81,6 +80,7 @@
<ClCompile Include="User Interface\Cheat Class UI.cpp" />
<ClCompile Include="User Interface\Frame Per Second Class.cpp" />
<ClCompile Include="User Interface\Gui Class.cpp" />
<ClCompile Include="User Interface\LoggingUI.cpp" />
<ClCompile Include="User Interface\Main Menu Class.cpp" />
<ClCompile Include="User Interface\Menu Class.cpp" />
<ClCompile Include="User Interface\MenuShortCuts.cpp" />
@ -176,7 +176,6 @@
</ResourceCompile>
</ItemGroup>
<ItemGroup>
<ClInclude Include="Logging.h" />
<ClInclude Include="Multilanguage.h" />
<ClInclude Include="Multilanguage\LanguageSelector.h" />
<ClInclude Include="N64 System.h" />
@ -187,6 +186,7 @@
<ClInclude Include="stdafx.h" />
<ClInclude Include="User Interface.h" />
<ClInclude Include="User Interface\Cheat Class UI.h" />
<ClInclude Include="User Interface\LoggingUI.h" />
<ClInclude Include="Version.h" />
<ClInclude Include="WTL App.h" />
<ClInclude Include="Settings\Debug Settings.h" />

10
Source/Project64/Project64.vcxproj.filters
View File

@ -417,8 +417,8 @@
<ClCompile Include="User Interface\Cheat Class UI.cpp">
<Filter>Source Files\User Interface Source</Filter>
</ClCompile>
<ClCompile Include="Logging.cpp">
<Filter>Source Files</Filter>
<ClCompile Include="User Interface\LoggingUI.cpp">
<Filter>Source Files\User Interface Source</Filter>
</ClCompile>
</ItemGroup>
<ItemGroup>
@ -827,11 +827,11 @@
<ClInclude Include="User Interface\Cheat Class UI.h">
<Filter>Header Files\User Interface Headers</Filter>
</ClInclude>
<ClInclude Include="Logging.h">
<Filter>Header Files</Filter>
</ClInclude>
<ClInclude Include="Settings\Settings.h">
<Filter>Header Files\Settings Headers</Filter>
</ClInclude>
<ClInclude Include="User Interface\LoggingUI.h">
<Filter>Header Files\User Interface Headers</Filter>
</ClInclude>
</ItemGroup>
</Project>

920
Source/Project64/User Interface/LoggingUI.cpp Normal file
View File

@ -0,0 +1,920 @@
/****************************************************************************
* *
* Project64 - A Nintendo 64 emulator. *
* http://www.pj64-emu.com/ *
* Copyright (C) 2012 Project64. All rights reserved. *
* *
* License: *
* GNU/GPLv2 http://www.gnu.org/licenses/gpl-2.0.html *
* *
****************************************************************************/
#include "stdafx.h"
#include "LoggingUI.h"
#include <prsht.h>
void LoadLogSetting(HKEY hKey, char * String, bool * Value);
void SaveLogOptions(void);
LRESULT CALLBACK LogGeneralProc(HWND, UINT, WPARAM, LPARAM);
LRESULT CALLBACK LogPifProc(HWND, UINT, WPARAM, LPARAM);
LRESULT CALLBACK LogRegProc(HWND, UINT, WPARAM, LPARAM);
static HANDLE g_hLogFile = NULL;
LOG_OPTIONS g_LogOptions, TempOptions;
void EnterLogOptions(HWND hwndOwner)
{
PROPSHEETPAGE psp[3];
PROPSHEETHEADER psh;
psp[0].dwSize = sizeof(PROPSHEETPAGE);
psp[0].dwFlags = PSP_USETITLE;
psp[0].hInstance = GetModuleHandle(NULL);
psp[0].pszTemplate = MAKEINTRESOURCE(IDD_Logging_Registers);
psp[0].pfnDlgProc = (DLGPROC)LogRegProc;
psp[0].pszTitle = "Registers";
psp[0].lParam = 0;
psp[0].pfnCallback = NULL;
psp[1].dwSize = sizeof(PROPSHEETPAGE);
psp[1].dwFlags = PSP_USETITLE;
psp[1].hInstance = GetModuleHandle(NULL);
psp[1].pszTemplate = MAKEINTRESOURCE(IDD_Logging_PifRam);
psp[1].pfnDlgProc = (DLGPROC)LogPifProc;
psp[1].pszTitle = "Pif Ram";
psp[1].lParam = 0;
psp[1].pfnCallback = NULL;
psp[2].dwSize = sizeof(PROPSHEETPAGE);
psp[2].dwFlags = PSP_USETITLE;
psp[2].hInstance = GetModuleHandle(NULL);
psp[2].pszTemplate = MAKEINTRESOURCE(IDD_Logging_General);
psp[2].pfnDlgProc = (DLGPROC)LogGeneralProc;
psp[2].pszTitle = "General";
psp[2].lParam = 0;
psp[2].pfnCallback = NULL;
psh.dwSize = sizeof(PROPSHEETHEADER);
psh.dwFlags = PSH_PROPSHEETPAGE | PSH_NOAPPLYNOW;
psh.hwndParent = hwndOwner;
psh.hInstance = GetModuleHandle(NULL);
psh.pszCaption = (LPSTR) "Log Options";
psh.nPages = sizeof(psp) / sizeof(PROPSHEETPAGE);
psh.nStartPage = 0;
psh.ppsp = (LPCPROPSHEETPAGE)&psp;
psh.pfnCallback = NULL;
LoadLogOptions(&TempOptions, TRUE);
#if defined(WINDOWS_UI)
PropertySheet(&psh);
#else
g_Notify -> BreakPoint(__FILEW__, __LINE__);
#endif
SaveLogOptions();
LoadLogOptions(&g_LogOptions, FALSE);
return;
}
void LoadLogOptions(LOG_OPTIONS * LogOptions, bool AlwaysFill)
{
int32_t lResult;
HKEY hKeyResults = 0;
char String[200];
sprintf(String, "Software\\N64 Emulation\\%s\\Logging", g_Settings->LoadStringVal(Setting_ApplicationName).c_str());
lResult = RegOpenKeyEx(HKEY_CURRENT_USER, String, 0, KEY_ALL_ACCESS,
&hKeyResults);
if (lResult == ERROR_SUCCESS)
{
//LoadLogSetting(hKeyResults,"Generate Log File",&LogOptions->GenerateLog);
if (LogOptions->GenerateLog || AlwaysFill)
{
LoadLogSetting(hKeyResults, "Log RDRAM", &LogOptions->LogRDRamRegisters);
LoadLogSetting(hKeyResults, "Log SP", &LogOptions->LogSPRegisters);
LoadLogSetting(hKeyResults, "Log DP Command", &LogOptions->LogDPCRegisters);
LoadLogSetting(hKeyResults, "Log DP Span", &LogOptions->LogDPSRegisters);
LoadLogSetting(hKeyResults, "Log MIPS Interface (MI)", &LogOptions->LogMIPSInterface);
LoadLogSetting(hKeyResults, "Log Video Interface (VI)", &LogOptions->LogVideoInterface);
LoadLogSetting(hKeyResults, "Log Audio Interface (AI)", &LogOptions->LogAudioInterface);
LoadLogSetting(hKeyResults, "Log Peripheral Interface (PI)", &LogOptions->LogPerInterface);
LoadLogSetting(hKeyResults, "Log RDRAM Interface (RI)", &LogOptions->LogRDRAMInterface);
LoadLogSetting(hKeyResults, "Log Serial Interface (SI)", &LogOptions->LogSerialInterface);
LoadLogSetting(hKeyResults, "Log PifRam DMA Operations", &LogOptions->LogPRDMAOperations);
LoadLogSetting(hKeyResults, "Log PifRam Direct Memory Loads", &LogOptions->LogPRDirectMemLoads);
LoadLogSetting(hKeyResults, "Log PifRam DMA Memory Loads", &LogOptions->LogPRDMAMemLoads);
LoadLogSetting(hKeyResults, "Log PifRam Direct Memory Stores", &LogOptions->LogPRDirectMemStores);
LoadLogSetting(hKeyResults, "Log PifRam DMA Memory Stores", &LogOptions->LogPRDMAMemStores);
LoadLogSetting(hKeyResults, "Log Controller Pak", &LogOptions->LogControllerPak);
LoadLogSetting(hKeyResults, "Log CP0 changes", &LogOptions->LogCP0changes);
LoadLogSetting(hKeyResults, "Log CP0 reads", &LogOptions->LogCP0reads);
LoadLogSetting(hKeyResults, "Log Exceptions", &LogOptions->LogExceptions);
LoadLogSetting(hKeyResults, "No Interrupts", &LogOptions->NoInterrupts);
LoadLogSetting(hKeyResults, "Log TLB", &LogOptions->LogTLB);
LoadLogSetting(hKeyResults, "Log Cache Operations", &LogOptions->LogCache);
LoadLogSetting(hKeyResults, "Log Rom Header", &LogOptions->LogRomHeader);
LoadLogSetting(hKeyResults, "Log Unknown access", &LogOptions->LogUnknown);
return;
}
}
LogOptions->GenerateLog = FALSE;
LogOptions->LogRDRamRegisters = FALSE;
LogOptions->LogSPRegisters = FALSE;
LogOptions->LogDPCRegisters = FALSE;
LogOptions->LogDPSRegisters = FALSE;
LogOptions->LogMIPSInterface = FALSE;
LogOptions->LogVideoInterface = FALSE;
LogOptions->LogAudioInterface = FALSE;
LogOptions->LogPerInterface = FALSE;
LogOptions->LogRDRAMInterface = FALSE;
LogOptions->LogSerialInterface = FALSE;
LogOptions->LogPRDMAOperations = FALSE;
LogOptions->LogPRDirectMemLoads = FALSE;
LogOptions->LogPRDMAMemLoads = FALSE;
LogOptions->LogPRDirectMemStores = FALSE;
LogOptions->LogPRDMAMemStores = FALSE;
LogOptions->LogControllerPak = FALSE;
LogOptions->LogCP0changes = FALSE;
LogOptions->LogCP0reads = FALSE;
LogOptions->LogCache = FALSE;
LogOptions->LogExceptions = FALSE;
LogOptions->NoInterrupts = FALSE;
LogOptions->LogTLB = FALSE;
LogOptions->LogRomHeader = FALSE;
LogOptions->LogUnknown = FALSE;
}
void LoadLogSetting(HKEY hKey, char * String, bool * Value)
{
DWORD Type, dwResult, Bytes = 4;
int32_t lResult;
lResult = RegQueryValueEx(hKey, String, 0, &Type, (LPBYTE)(&dwResult), &Bytes);
if (Type == REG_DWORD && lResult == ERROR_SUCCESS)
{
*Value = dwResult != 0;
}
else
{
*Value = FALSE;
}
}
LRESULT CALLBACK LogGeneralProc(HWND hDlg, UINT uMsg, WPARAM /*wParam*/, LPARAM lParam)
{
switch (uMsg)
{
case WM_INITDIALOG:
if (TempOptions.LogCP0changes) { CheckDlgButton(hDlg, IDC_CP0_WRITE, BST_CHECKED); }
if (TempOptions.LogCP0reads) { CheckDlgButton(hDlg, IDC_CP0_READ, BST_CHECKED); }
if (TempOptions.LogCache) { CheckDlgButton(hDlg, IDC_CACHE, BST_CHECKED); }
if (TempOptions.LogExceptions) { CheckDlgButton(hDlg, IDC_EXCEPTIONS, BST_CHECKED); }
if (TempOptions.NoInterrupts) { CheckDlgButton(hDlg, IDC_INTERRUPTS, BST_CHECKED); }
if (TempOptions.LogTLB) { CheckDlgButton(hDlg, IDC_TLB, BST_CHECKED); }
if (TempOptions.LogRomHeader) { CheckDlgButton(hDlg, IDC_ROM_HEADER, BST_CHECKED); }
if (TempOptions.LogUnknown) { CheckDlgButton(hDlg, IDC_UNKOWN, BST_CHECKED); }
break;
case WM_NOTIFY:
if (((NMHDR FAR *) lParam)->code != PSN_APPLY) { break; }
TempOptions.LogCP0changes = IsDlgButtonChecked(hDlg, IDC_CP0_WRITE) == BST_CHECKED ? TRUE : FALSE;
TempOptions.LogCP0reads = IsDlgButtonChecked(hDlg, IDC_CP0_READ) == BST_CHECKED ? TRUE : FALSE;
TempOptions.LogCache = IsDlgButtonChecked(hDlg, IDC_CACHE) == BST_CHECKED ? TRUE : FALSE;
TempOptions.LogExceptions = IsDlgButtonChecked(hDlg, IDC_EXCEPTIONS) == BST_CHECKED ? TRUE : FALSE;
TempOptions.NoInterrupts = IsDlgButtonChecked(hDlg, IDC_INTERRUPTS) == BST_CHECKED ? TRUE : FALSE;
TempOptions.LogTLB = IsDlgButtonChecked(hDlg, IDC_TLB) == BST_CHECKED ? TRUE : FALSE;
TempOptions.LogRomHeader = IsDlgButtonChecked(hDlg, IDC_ROM_HEADER) == BST_CHECKED ? TRUE : FALSE;
TempOptions.LogUnknown = IsDlgButtonChecked(hDlg, IDC_UNKOWN) == BST_CHECKED ? TRUE : FALSE;
break;
default:
return FALSE;
}
return TRUE;
}
void Log_LW(uint32_t PC, uint32_t VAddr)
{
if (!g_LogOptions.GenerateLog)
{
return;
}
if (VAddr < 0xA0000000 || VAddr >= 0xC0000000)
{
uint32_t PAddr;
if (!g_TransVaddr->TranslateVaddr(VAddr, PAddr))
{
if (g_LogOptions.LogUnknown)
{
LogMessage("%08X: read from unknown ??? (%08X)", PC, VAddr);
}
return;
}
VAddr = PAddr + 0xA0000000;
}
uint32_t Value;
if (VAddr >= 0xA0000000 && VAddr < (0xA0000000 + g_MMU->RdramSize()))
{
return;
}
if (VAddr >= 0xA3F00000 && VAddr <= 0xA3F00024)
{
if (!g_LogOptions.LogRDRamRegisters)
{
return;
}
g_MMU->LW_VAddr(VAddr, Value);
switch (VAddr)
{
case 0xA3F00000: LogMessage("%08X: read from RDRAM_CONFIG_REG/RDRAM_DEVICE_TYPE_REG (%08X)", PC, Value); return;
case 0xA3F00004: LogMessage("%08X: read from RDRAM_DEVICE_ID_REG (%08X)", PC, Value); return;
case 0xA3F00008: LogMessage("%08X: read from RDRAM_DELAY_REG (%08X)", PC, Value); return;
case 0xA3F0000C: LogMessage("%08X: read from RDRAM_MODE_REG (%08X)", PC, Value); return;
case 0xA3F00010: LogMessage("%08X: read from RDRAM_REF_INTERVAL_REG (%08X)", PC, Value); return;
case 0xA3F00014: LogMessage("%08X: read from RDRAM_REF_ROW_REG (%08X)", PC, Value); return;
case 0xA3F00018: LogMessage("%08X: read from RDRAM_RAS_INTERVAL_REG (%08X)", PC, Value); return;
case 0xA3F0001C: LogMessage("%08X: read from RDRAM_MIN_INTERVAL_REG (%08X)", PC, Value); return;
case 0xA3F00020: LogMessage("%08X: read from RDRAM_ADDR_SELECT_REG (%08X)", PC, Value); return;
case 0xA3F00024: LogMessage("%08X: read from RDRAM_DEVICE_MANUF_REG (%08X)", PC, Value); return;
}
}
if (VAddr >= 0xA4000000 && VAddr <= 0xA4001FFC)
{
return;
}
if (VAddr >= 0xA4040000 && VAddr <= 0xA404001C)
{
if (!g_LogOptions.LogSPRegisters)
{
return;
}
g_MMU->LW_VAddr(VAddr, Value);
switch (VAddr)
{
case 0xA4040000: LogMessage("%08X: read from SP_MEM_ADDR_REG (%08X)", PC, Value); break;
case 0xA4040004: LogMessage("%08X: read from SP_DRAM_ADDR_REG (%08X)", PC, Value); break;
case 0xA4040008: LogMessage("%08X: read from SP_RD_LEN_REG (%08X)", PC, Value); break;
case 0xA404000C: LogMessage("%08X: read from SP_WR_LEN_REG (%08X)", PC, Value); break;
case 0xA4040010: LogMessage("%08X: read from SP_STATUS_REG (%08X)", PC, Value); break;
case 0xA4040014: LogMessage("%08X: read from SP_DMA_FULL_REG (%08X)", PC, Value); break;
case 0xA4040018: LogMessage("%08X: read from SP_DMA_BUSY_REG (%08X)", PC, Value); break;
case 0xA404001C: LogMessage("%08X: read from SP_SEMAPHORE_REG (%08X)", PC, Value); break;
}
return;
}
if (VAddr == 0xA4080000)
{
if (!g_LogOptions.LogSPRegisters)
{
return;
}
g_MMU->LW_VAddr(VAddr, Value);
LogMessage("%08X: read from SP_PC (%08X)", PC, Value);
return;
}
if (VAddr >= 0xA4100000 && VAddr <= 0xA410001C)
{
if (!g_LogOptions.LogDPCRegisters)
{
return;
}
g_MMU->LW_VAddr(VAddr, Value);
switch (VAddr)
{
case 0xA4100000: LogMessage("%08X: read from DPC_START_REG (%08X)", PC, Value); return;
case 0xA4100004: LogMessage("%08X: read from DPC_END_REG (%08X)", PC, Value); return;
case 0xA4100008: LogMessage("%08X: read from DPC_CURRENT_REG (%08X)", PC, Value); return;
case 0xA410000C: LogMessage("%08X: read from DPC_STATUS_REG (%08X)", PC, Value); return;
case 0xA4100010: LogMessage("%08X: read from DPC_CLOCK_REG (%08X)", PC, Value); return;
case 0xA4100014: LogMessage("%08X: read from DPC_BUFBUSY_REG (%08X)", PC, Value); return;
case 0xA4100018: LogMessage("%08X: read from DPC_PIPEBUSY_REG (%08X)", PC, Value); return;
case 0xA410001C: LogMessage("%08X: read from DPC_TMEM_REG (%08X)", PC, Value); return;
}
}
if (VAddr >= 0xA4300000 && VAddr <= 0xA430000C)
{
if (!g_LogOptions.LogMIPSInterface)
{
return;
}
g_MMU->LW_VAddr(VAddr, Value);
switch (VAddr)
{
case 0xA4300000: LogMessage("%08X: read from MI_INIT_MODE_REG/MI_MODE_REG (%08X)", PC, Value); return;
case 0xA4300004: LogMessage("%08X: read from MI_VERSION_REG/MI_NOOP_REG (%08X)", PC, Value); return;
case 0xA4300008: LogMessage("%08X: read from MI_INTR_REG (%08X)", PC, Value); return;
case 0xA430000C: LogMessage("%08X: read from MI_INTR_MASK_REG (%08X)", PC, Value); return;
}
}
if (VAddr >= 0xA4400000 && VAddr <= 0xA4400034)
{
if (!g_LogOptions.LogVideoInterface)
{
return;
}
g_MMU->LW_VAddr(VAddr, Value);
switch (VAddr)
{
case 0xA4400000: LogMessage("%08X: read from VI_STATUS_REG/VI_CONTROL_REG (%08X)", PC, Value); return;
case 0xA4400004: LogMessage("%08X: read from VI_ORIGIN_REG/VI_DRAM_ADDR_REG (%08X)", PC, Value); return;
case 0xA4400008: LogMessage("%08X: read from VI_WIDTH_REG/VI_H_WIDTH_REG (%08X)", PC, Value); return;
case 0xA440000C: LogMessage("%08X: read from VI_INTR_REG/VI_V_INTR_REG (%08X)", PC, Value); return;
case 0xA4400010: LogMessage("%08X: read from VI_CURRENT_REG/VI_V_CURRENT_LINE_REG (%08X)", PC, Value); return;
case 0xA4400014: LogMessage("%08X: read from VI_BURST_REG/VI_TIMING_REG (%08X)", PC, Value); return;
case 0xA4400018: LogMessage("%08X: read from VI_V_SYNC_REG (%08X)", PC, Value); return;
case 0xA440001C: LogMessage("%08X: read from VI_H_SYNC_REG (%08X)", PC, Value); return;
case 0xA4400020: LogMessage("%08X: read from VI_LEAP_REG/VI_H_SYNC_LEAP_REG (%08X)", PC, Value); return;
case 0xA4400024: LogMessage("%08X: read from VI_H_START_REG/VI_H_VIDEO_REG (%08X)", PC, Value); return;
case 0xA4400028: LogMessage("%08X: read from VI_V_START_REG/VI_V_VIDEO_REG (%08X)", PC, Value); return;
case 0xA440002C: LogMessage("%08X: read from VI_V_BURST_REG (%08X)", PC, Value); return;
case 0xA4400030: LogMessage("%08X: read from VI_X_SCALE_REG (%08X)", PC, Value); return;
case 0xA4400034: LogMessage("%08X: read from VI_Y_SCALE_REG (%08X)", PC, Value); return;
}
}
if (VAddr >= 0xA4500000 && VAddr <= 0xA4500014)
{
if (!g_LogOptions.LogAudioInterface)
{
return;
}
g_MMU->LW_VAddr(VAddr, Value);
switch (VAddr)
{
case 0xA4500000: LogMessage("%08X: read from AI_DRAM_ADDR_REG (%08X)", PC, Value); return;
case 0xA4500004: LogMessage("%08X: read from AI_LEN_REG (%08X)", PC, Value); return;
case 0xA4500008: LogMessage("%08X: read from AI_CONTROL_REG (%08X)", PC, Value); return;
case 0xA450000C: LogMessage("%08X: read from AI_STATUS_REG (%08X)", PC, Value); return;
case 0xA4500010: LogMessage("%08X: read from AI_DACRATE_REG (%08X)", PC, Value); return;
case 0xA4500014: LogMessage("%08X: read from AI_BITRATE_REG (%08X)", PC, Value); return;
}
}
if (VAddr >= 0xA4600000 && VAddr <= 0xA4600030)
{
if (!g_LogOptions.LogPerInterface)
{
return;
}
g_MMU->LW_VAddr(VAddr, Value);
switch (VAddr)
{
case 0xA4600000: LogMessage("%08X: read from PI_DRAM_ADDR_REG (%08X)", PC, Value); return;
case 0xA4600004: LogMessage("%08X: read from PI_CART_ADDR_REG (%08X)", PC, Value); return;
case 0xA4600008: LogMessage("%08X: read from PI_RD_LEN_REG (%08X)", PC, Value); return;
case 0xA460000C: LogMessage("%08X: read from PI_WR_LEN_REG (%08X)", PC, Value); return;
case 0xA4600010: LogMessage("%08X: read from PI_STATUS_REG (%08X)", PC, Value); return;
case 0xA4600014: LogMessage("%08X: read from PI_BSD_DOM1_LAT_REG/PI_DOMAIN1_REG (%08X)", PC, Value); return;
case 0xA4600018: LogMessage("%08X: read from PI_BSD_DOM1_PWD_REG (%08X)", PC, Value); return;
case 0xA460001C: LogMessage("%08X: read from PI_BSD_DOM1_PGS_REG (%08X)", PC, Value); return;
case 0xA4600020: LogMessage("%08X: read from PI_BSD_DOM1_RLS_REG (%08X)", PC, Value); return;
case 0xA4600024: LogMessage("%08X: read from PI_BSD_DOM2_LAT_REG/PI_DOMAIN2_REG (%08X)", PC, Value); return;
case 0xA4600028: LogMessage("%08X: read from PI_BSD_DOM2_PWD_REG (%08X)", PC, Value); return;
case 0xA460002C: LogMessage("%08X: read from PI_BSD_DOM2_PGS_REG (%08X)", PC, Value); return;
case 0xA4600030: LogMessage("%08X: read from PI_BSD_DOM2_RLS_REG (%08X)", PC, Value); return;
}
}
if (VAddr >= 0xA4700000 && VAddr <= 0xA470001C)
{
if (!g_LogOptions.LogRDRAMInterface)
{
return;
}
g_MMU->LW_VAddr(VAddr, Value);
switch (VAddr)
{
case 0xA4700000: LogMessage("%08X: read from RI_MODE_REG (%08X)", PC, Value); return;
case 0xA4700004: LogMessage("%08X: read from RI_CONFIG_REG (%08X)", PC, Value); return;
case 0xA4700008: LogMessage("%08X: read from RI_CURRENT_LOAD_REG (%08X)", PC, Value); return;
case 0xA470000C: LogMessage("%08X: read from RI_SELECT_REG (%08X)", PC, Value); return;
case 0xA4700010: LogMessage("%08X: read from RI_REFRESH_REG/RI_COUNT_REG (%08X)", PC, Value); return;
case 0xA4700014: LogMessage("%08X: read from RI_LATENCY_REG (%08X)", PC, Value); return;
case 0xA4700018: LogMessage("%08X: read from RI_RERROR_REG (%08X)", PC, Value); return;
case 0xA470001C: LogMessage("%08X: read from RI_WERROR_REG (%08X)", PC, Value); return;
}
}
if (VAddr == 0xA4800000)
{
if (!g_LogOptions.LogSerialInterface)
{
return;
}
g_MMU->LW_VAddr(VAddr, Value);
LogMessage("%08X: read from SI_DRAM_ADDR_REG (%08X)", PC, Value);
return;
}
if (VAddr == 0xA4800004)
{
if (!g_LogOptions.LogSerialInterface)
{
return;
}
g_MMU->LW_VAddr(VAddr, Value);
LogMessage("%08X: read from SI_PIF_ADDR_RD64B_REG (%08X)", PC, Value);
return;
}
if (VAddr == 0xA4800010)
{
if (!g_LogOptions.LogSerialInterface)
{
return;
}
g_MMU->LW_VAddr(VAddr, Value);
LogMessage("%08X: read from SI_PIF_ADDR_WR64B_REG (%08X)", PC, Value);
return;
}
if (VAddr == 0xA4800018)
{
if (!g_LogOptions.LogSerialInterface)
{
return;
}
g_MMU->LW_VAddr(VAddr, Value);
LogMessage("%08X: read from SI_STATUS_REG (%08X)", PC, Value);
return;
}
if (VAddr >= 0xBFC00000 && VAddr <= 0xBFC007C0)
{
return;
}
if (VAddr >= 0xBFC007C0 && VAddr <= 0xBFC007FC)
{
if (!g_LogOptions.LogPRDirectMemLoads)
{
return;
}
g_MMU->LW_VAddr(VAddr, Value);
LogMessage("%08X: read word from Pif Ram at 0x%X (%08X)", PC, VAddr - 0xBFC007C0, Value);
return;
}
if (VAddr >= 0xB0000040 && ((VAddr - 0xB0000000) < g_Rom->GetRomSize()))
{
return;
}
if (VAddr >= 0xB0000000 && VAddr < 0xB0000040)
{
if (!g_LogOptions.LogRomHeader)
{
return;
}
g_MMU->LW_VAddr(VAddr, Value);
switch (VAddr)
{
case 0xB0000004: LogMessage("%08X: read from Rom Clock Rate (%08X)", PC, Value); break;
case 0xB0000008: LogMessage("%08X: read from Rom Boot address offset (%08X)", PC, Value); break;
case 0xB000000C: LogMessage("%08X: read from Rom Release offset (%08X)", PC, Value); break;
case 0xB0000010: LogMessage("%08X: read from Rom CRC1 (%08X)", PC, Value); break;
case 0xB0000014: LogMessage("%08X: read from Rom CRC2 (%08X)", PC, Value); break;
default: LogMessage("%08X: read from Rom header 0x%X (%08X)", PC, VAddr & 0xFF, Value); break;
}
return;
}
if (!g_LogOptions.LogUnknown)
{
return;
}
LogMessage("%08X: read from unknown ??? (%08X)", PC, VAddr);
}
void Log_SW(uint32_t PC, uint32_t VAddr, uint32_t Value)
{
if (!g_LogOptions.GenerateLog)
{
return;
}
if (VAddr < 0xA0000000 || VAddr >= 0xC0000000)
{
uint32_t PAddr;
if (!g_TransVaddr->TranslateVaddr(VAddr, PAddr))
{
if (g_LogOptions.LogUnknown)
{
LogMessage("%08X: Writing 0x%08X to %08X", PC, Value, VAddr);
}
return;
}
VAddr = PAddr + 0xA0000000;
}
if (VAddr >= 0xA0000000 && VAddr < (0xA0000000 + g_MMU->RdramSize()))
{
return;
}
if (VAddr >= 0xA3F00000 && VAddr <= 0xA3F00024)
{
if (!g_LogOptions.LogRDRamRegisters)
{
return;
}
switch (VAddr)
{
case 0xA3F00000: LogMessage("%08X: Writing 0x%08X to RDRAM_CONFIG_REG/RDRAM_DEVICE_TYPE_REG", PC, Value); return;
case 0xA3F00004: LogMessage("%08X: Writing 0x%08X to RDRAM_DEVICE_ID_REG", PC, Value); return;
case 0xA3F00008: LogMessage("%08X: Writing 0x%08X to RDRAM_DELAY_REG", PC, Value); return;
case 0xA3F0000C: LogMessage("%08X: Writing 0x%08X to RDRAM_MODE_REG", PC, Value); return;
case 0xA3F00010: LogMessage("%08X: Writing 0x%08X to RDRAM_REF_INTERVAL_REG", PC, Value); return;
case 0xA3F00014: LogMessage("%08X: Writing 0x%08X to RDRAM_REF_ROW_REG", PC, Value); return;
case 0xA3F00018: LogMessage("%08X: Writing 0x%08X to RDRAM_RAS_INTERVAL_REG", PC, Value); return;
case 0xA3F0001C: LogMessage("%08X: Writing 0x%08X to RDRAM_MIN_INTERVAL_REG", PC, Value); return;
case 0xA3F00020: LogMessage("%08X: Writing 0x%08X to RDRAM_ADDR_SELECT_REG", PC, Value); return;
case 0xA3F00024: LogMessage("%08X: Writing 0x%08X to RDRAM_DEVICE_MANUF_REG", PC, Value); return;
}
}
if (VAddr >= 0xA4000000 && VAddr <= 0xA4001FFC)
{
return;
}
if (VAddr >= 0xA4040000 && VAddr <= 0xA404001C)
{
if (!g_LogOptions.LogSPRegisters)
{
return;
}
switch (VAddr)
{
case 0xA4040000: LogMessage("%08X: Writing 0x%08X to SP_MEM_ADDR_REG", PC, Value); return;
case 0xA4040004: LogMessage("%08X: Writing 0x%08X to SP_DRAM_ADDR_REG", PC, Value); return;
case 0xA4040008: LogMessage("%08X: Writing 0x%08X to SP_RD_LEN_REG", PC, Value); return;
case 0xA404000C: LogMessage("%08X: Writing 0x%08X to SP_WR_LEN_REG", PC, Value); return;
case 0xA4040010: LogMessage("%08X: Writing 0x%08X to SP_STATUS_REG", PC, Value); return;
case 0xA4040014: LogMessage("%08X: Writing 0x%08X to SP_DMA_FULL_REG", PC, Value); return;
case 0xA4040018: LogMessage("%08X: Writing 0x%08X to SP_DMA_BUSY_REG", PC, Value); return;
case 0xA404001C: LogMessage("%08X: Writing 0x%08X to SP_SEMAPHORE_REG", PC, Value); return;
}
}
if (VAddr == 0xA4080000)
{
if (!g_LogOptions.LogSPRegisters)
{
return;
}
LogMessage("%08X: Writing 0x%08X to SP_PC", PC, Value); return;
}
if (VAddr >= 0xA4100000 && VAddr <= 0xA410001C)
{
if (!g_LogOptions.LogDPCRegisters)
{
return;
}
switch (VAddr)
{
case 0xA4100000: LogMessage("%08X: Writing 0x%08X to DPC_START_REG", PC, Value); return;
case 0xA4100004: LogMessage("%08X: Writing 0x%08X to DPC_END_REG", PC, Value); return;
case 0xA4100008: LogMessage("%08X: Writing 0x%08X to DPC_CURRENT_REG", PC, Value); return;
case 0xA410000C: LogMessage("%08X: Writing 0x%08X to DPC_STATUS_REG", PC, Value); return;
case 0xA4100010: LogMessage("%08X: Writing 0x%08X to DPC_CLOCK_REG", PC, Value); return;
case 0xA4100014: LogMessage("%08X: Writing 0x%08X to DPC_BUFBUSY_REG", PC, Value); return;
case 0xA4100018: LogMessage("%08X: Writing 0x%08X to DPC_PIPEBUSY_REG", PC, Value); return;
case 0xA410001C: LogMessage("%08X: Writing 0x%08X to DPC_TMEM_REG", PC, Value); return;
}
}
if (VAddr >= 0xA4200000 && VAddr <= 0xA420000C)
{
if (!g_LogOptions.LogDPSRegisters)
{
return;
}
switch (VAddr)
{
case 0xA4200000: LogMessage("%08X: Writing 0x%08X to DPS_TBIST_REG", PC, Value); return;
case 0xA4200004: LogMessage("%08X: Writing 0x%08X to DPS_TEST_MODE_REG", PC, Value); return;
case 0xA4200008: LogMessage("%08X: Writing 0x%08X to DPS_BUFTEST_ADDR_REG", PC, Value); return;
case 0xA420000C: LogMessage("%08X: Writing 0x%08X to DPS_BUFTEST_DATA_REG", PC, Value); return;
}
}
if (VAddr >= 0xA4300000 && VAddr <= 0xA430000C)
{
if (!g_LogOptions.LogMIPSInterface)
{
return;
}
switch (VAddr)
{
case 0xA4300000: LogMessage("%08X: Writing 0x%08X to MI_INIT_MODE_REG/MI_MODE_REG", PC, Value); return;
case 0xA4300004: LogMessage("%08X: Writing 0x%08X to MI_VERSION_REG/MI_NOOP_REG", PC, Value); return;
case 0xA4300008: LogMessage("%08X: Writing 0x%08X to MI_INTR_REG", PC, Value); return;
case 0xA430000C: LogMessage("%08X: Writing 0x%08X to MI_INTR_MASK_REG", PC, Value); return;
}
}
if (VAddr >= 0xA4400000 && VAddr <= 0xA4400034)
{
if (!g_LogOptions.LogVideoInterface)
{
return;
}
switch (VAddr)
{
case 0xA4400000: LogMessage("%08X: Writing 0x%08X to VI_STATUS_REG/VI_CONTROL_REG", PC, Value); return;
case 0xA4400004: LogMessage("%08X: Writing 0x%08X to VI_ORIGIN_REG/VI_DRAM_ADDR_REG", PC, Value); return;
case 0xA4400008: LogMessage("%08X: Writing 0x%08X to VI_WIDTH_REG/VI_H_WIDTH_REG", PC, Value); return;
case 0xA440000C: LogMessage("%08X: Writing 0x%08X to VI_INTR_REG/VI_V_INTR_REG", PC, Value); return;
case 0xA4400010: LogMessage("%08X: Writing 0x%08X to VI_CURRENT_REG/VI_V_CURRENT_LINE_REG", PC, Value); return;
case 0xA4400014: LogMessage("%08X: Writing 0x%08X to VI_BURST_REG/VI_TIMING_REG", PC, Value); return;
case 0xA4400018: LogMessage("%08X: Writing 0x%08X to VI_V_SYNC_REG", PC, Value); return;
case 0xA440001C: LogMessage("%08X: Writing 0x%08X to VI_H_SYNC_REG", PC, Value); return;
case 0xA4400020: LogMessage("%08X: Writing 0x%08X to VI_LEAP_REG/VI_H_SYNC_LEAP_REG", PC, Value); return;
case 0xA4400024: LogMessage("%08X: Writing 0x%08X to VI_H_START_REG/VI_H_VIDEO_REG", PC, Value); return;
case 0xA4400028: LogMessage("%08X: Writing 0x%08X to VI_V_START_REG/VI_V_VIDEO_REG", PC, Value); return;
case 0xA440002C: LogMessage("%08X: Writing 0x%08X to VI_V_BURST_REG", PC, Value); return;
case 0xA4400030: LogMessage("%08X: Writing 0x%08X to VI_X_SCALE_REG", PC, Value); return;
case 0xA4400034: LogMessage("%08X: Writing 0x%08X to VI_Y_SCALE_REG", PC, Value); return;
}
}
if (VAddr >= 0xA4500000 && VAddr <= 0xA4500014)
{
if (!g_LogOptions.LogAudioInterface)
{
return;
}
switch (VAddr)
{
case 0xA4500000: LogMessage("%08X: Writing 0x%08X to AI_DRAM_ADDR_REG", PC, Value); return;
case 0xA4500004: LogMessage("%08X: Writing 0x%08X to AI_LEN_REG", PC, Value); return;
case 0xA4500008: LogMessage("%08X: Writing 0x%08X to AI_CONTROL_REG", PC, Value); return;
case 0xA450000C: LogMessage("%08X: Writing 0x%08X to AI_STATUS_REG", PC, Value); return;
case 0xA4500010: LogMessage("%08X: Writing 0x%08X to AI_DACRATE_REG", PC, Value); return;
case 0xA4500014: LogMessage("%08X: Writing 0x%08X to AI_BITRATE_REG", PC, Value); return;
}
}
if (VAddr >= 0xA4600000 && VAddr <= 0xA4600030)
{
if (!g_LogOptions.LogPerInterface)
{
return;
}
switch (VAddr)
{
case 0xA4600000: LogMessage("%08X: Writing 0x%08X to PI_DRAM_ADDR_REG", PC, Value); return;
case 0xA4600004: LogMessage("%08X: Writing 0x%08X to PI_CART_ADDR_REG", PC, Value); return;
case 0xA4600008: LogMessage("%08X: Writing 0x%08X to PI_RD_LEN_REG", PC, Value); return;
case 0xA460000C: LogMessage("%08X: Writing 0x%08X to PI_WR_LEN_REG", PC, Value); return;
case 0xA4600010: LogMessage("%08X: Writing 0x%08X to PI_STATUS_REG", PC, Value); return;
case 0xA4600014: LogMessage("%08X: Writing 0x%08X to PI_BSD_DOM1_LAT_REG/PI_DOMAIN1_REG", PC, Value); return;
case 0xA4600018: LogMessage("%08X: Writing 0x%08X to PI_BSD_DOM1_PWD_REG", PC, Value); return;
case 0xA460001C: LogMessage("%08X: Writing 0x%08X to PI_BSD_DOM1_PGS_REG", PC, Value); return;
case 0xA4600020: LogMessage("%08X: Writing 0x%08X to PI_BSD_DOM1_RLS_REG", PC, Value); return;
case 0xA4600024: LogMessage("%08X: Writing 0x%08X to PI_BSD_DOM2_LAT_REG/PI_DOMAIN2_REG", PC, Value); return;
case 0xA4600028: LogMessage("%08X: Writing 0x%08X to PI_BSD_DOM2_PWD_REG", PC, Value); return;
case 0xA460002C: LogMessage("%08X: Writing 0x%08X to PI_BSD_DOM2_PGS_REG", PC, Value); return;
case 0xA4600030: LogMessage("%08X: Writing 0x%08X to PI_BSD_DOM2_RLS_REG", PC, Value); return;
}
}
if (VAddr >= 0xA4700000 && VAddr <= 0xA470001C)
{
if (!g_LogOptions.LogRDRAMInterface)
{
return;
}
switch (VAddr)
{
case 0xA4700000: LogMessage("%08X: Writing 0x%08X to RI_MODE_REG", PC, Value); return;
case 0xA4700004: LogMessage("%08X: Writing 0x%08X to RI_CONFIG_REG", PC, Value); return;
case 0xA4700008: LogMessage("%08X: Writing 0x%08X to RI_CURRENT_LOAD_REG", PC, Value); return;
case 0xA470000C: LogMessage("%08X: Writing 0x%08X to RI_SELECT_REG", PC, Value); return;
case 0xA4700010: LogMessage("%08X: Writing 0x%08X to RI_REFRESH_REG/RI_COUNT_REG", PC, Value); return;
case 0xA4700014: LogMessage("%08X: Writing 0x%08X to RI_LATENCY_REG", PC, Value); return;
case 0xA4700018: LogMessage("%08X: Writing 0x%08X to RI_RERROR_REG", PC, Value); return;
case 0xA470001C: LogMessage("%08X: Writing 0x%08X to RI_WERROR_REG", PC, Value); return;
}
}
if (VAddr == 0xA4800000)
{
if (!g_LogOptions.LogSerialInterface)
{
return;
}
LogMessage("%08X: Writing 0x%08X to SI_DRAM_ADDR_REG", PC, Value); return;
}
if (VAddr == 0xA4800004)
{
if (g_LogOptions.LogPRDMAOperations)
{
LogMessage("%08X: A DMA transfer from the PIF ram has occured", PC);
}
if (!g_LogOptions.LogSerialInterface)
{
return;
}
LogMessage("%08X: Writing 0x%08X to SI_PIF_ADDR_RD64B_REG", PC, Value); return;
}
if (VAddr == 0xA4800010)
{
if (g_LogOptions.LogPRDMAOperations)
{
LogMessage("%08X: A DMA transfer to the PIF ram has occured", PC);
}
if (!g_LogOptions.LogSerialInterface)
{
return;
}
LogMessage("%08X: Writing 0x%08X to SI_PIF_ADDR_WR64B_REG", PC, Value); return;
}
if (VAddr == 0xA4800018)
{
if (!g_LogOptions.LogSerialInterface)
{
return;
}
LogMessage("%08X: Writing 0x%08X to SI_STATUS_REG", PC, Value); return;
}
if (VAddr >= 0xBFC007C0 && VAddr <= 0xBFC007FC)
{
if (!g_LogOptions.LogPRDirectMemStores)
{
return;
}
LogMessage("%08X: Writing 0x%08X to Pif Ram at 0x%X", PC, Value, VAddr - 0xBFC007C0);
return;
}
if (!g_LogOptions.LogUnknown)
{
return;
}
LogMessage("%08X: Writing 0x%08X to %08X ????", PC, Value, VAddr);
}
LRESULT CALLBACK LogPifProc(HWND hDlg, UINT uMsg, WPARAM /*wParam*/, LPARAM lParam)
{
switch (uMsg)
{
case WM_INITDIALOG:
if (TempOptions.LogPRDMAOperations) { CheckDlgButton(hDlg, IDC_SI_DMA, BST_CHECKED); }
if (TempOptions.LogPRDirectMemLoads) { CheckDlgButton(hDlg, IDC_DIRECT_WRITE, BST_CHECKED); }
if (TempOptions.LogPRDMAMemLoads) { CheckDlgButton(hDlg, IDC_DMA_WRITE, BST_CHECKED); }
if (TempOptions.LogPRDirectMemStores) { CheckDlgButton(hDlg, IDC_DIRECT_READ, BST_CHECKED); }
if (TempOptions.LogPRDMAMemStores) { CheckDlgButton(hDlg, IDC_DMA_READ, BST_CHECKED); }
if (TempOptions.LogControllerPak) { CheckDlgButton(hDlg, IDC_CONT_PAK, BST_CHECKED); }
break;
case WM_NOTIFY:
if (((NMHDR FAR *) lParam)->code != PSN_APPLY)
{
break;
}
TempOptions.LogPRDMAOperations = IsDlgButtonChecked(hDlg, IDC_SI_DMA) == BST_CHECKED ? TRUE : FALSE;
TempOptions.LogPRDirectMemLoads = IsDlgButtonChecked(hDlg, IDC_DIRECT_WRITE) == BST_CHECKED ? TRUE : FALSE;
TempOptions.LogPRDMAMemLoads = IsDlgButtonChecked(hDlg, IDC_DMA_WRITE) == BST_CHECKED ? TRUE : FALSE;
TempOptions.LogPRDirectMemStores = IsDlgButtonChecked(hDlg, IDC_DIRECT_READ) == BST_CHECKED ? TRUE : FALSE;
TempOptions.LogPRDMAMemStores = IsDlgButtonChecked(hDlg, IDC_DMA_READ) == BST_CHECKED ? TRUE : FALSE;
TempOptions.LogControllerPak = IsDlgButtonChecked(hDlg, IDC_CONT_PAK) == BST_CHECKED ? TRUE : FALSE;
break;
default:
return FALSE;
}
return TRUE;
}
LRESULT CALLBACK LogRegProc(HWND hDlg, UINT uMsg, WPARAM /*wParam*/, LPARAM lParam)
{
switch (uMsg)
{
case WM_INITDIALOG:
if (TempOptions.LogRDRamRegisters) { CheckDlgButton(hDlg, IDC_RDRAM, BST_CHECKED); }
if (TempOptions.LogSPRegisters) { CheckDlgButton(hDlg, IDC_SP_REG, BST_CHECKED); }
if (TempOptions.LogDPCRegisters) { CheckDlgButton(hDlg, IDC_DPC_REG, BST_CHECKED); }
if (TempOptions.LogDPSRegisters) { CheckDlgButton(hDlg, IDC_DPS_REG, BST_CHECKED); }
if (TempOptions.LogMIPSInterface) { CheckDlgButton(hDlg, IDC_MI_REG, BST_CHECKED); }
if (TempOptions.LogVideoInterface) { CheckDlgButton(hDlg, IDC_VI_REG, BST_CHECKED); }
if (TempOptions.LogAudioInterface) { CheckDlgButton(hDlg, IDC_AI_REG, BST_CHECKED); }
if (TempOptions.LogPerInterface) { CheckDlgButton(hDlg, IDC_PI_REG, BST_CHECKED); }
if (TempOptions.LogRDRAMInterface) { CheckDlgButton(hDlg, IDC_RI_REG, BST_CHECKED); }
if (TempOptions.LogSerialInterface) { CheckDlgButton(hDlg, IDC_SI_REG, BST_CHECKED); }
break;
case WM_NOTIFY:
if (((NMHDR FAR *) lParam)->code != PSN_APPLY)
{
break;
}
TempOptions.LogRDRamRegisters = IsDlgButtonChecked(hDlg, IDC_RDRAM) == BST_CHECKED ? TRUE : FALSE;
TempOptions.LogSPRegisters = IsDlgButtonChecked(hDlg, IDC_SP_REG) == BST_CHECKED ? TRUE : FALSE;
TempOptions.LogDPCRegisters = IsDlgButtonChecked(hDlg, IDC_DPC_REG) == BST_CHECKED ? TRUE : FALSE;
TempOptions.LogDPSRegisters = IsDlgButtonChecked(hDlg, IDC_DPS_REG) == BST_CHECKED ? TRUE : FALSE;
TempOptions.LogMIPSInterface = IsDlgButtonChecked(hDlg, IDC_MI_REG) == BST_CHECKED ? TRUE : FALSE;
TempOptions.LogVideoInterface = IsDlgButtonChecked(hDlg, IDC_VI_REG) == BST_CHECKED ? TRUE : FALSE;
TempOptions.LogAudioInterface = IsDlgButtonChecked(hDlg, IDC_AI_REG) == BST_CHECKED ? TRUE : FALSE;
TempOptions.LogPerInterface = IsDlgButtonChecked(hDlg, IDC_PI_REG) == BST_CHECKED ? TRUE : FALSE;
TempOptions.LogRDRAMInterface = IsDlgButtonChecked(hDlg, IDC_RI_REG) == BST_CHECKED ? TRUE : FALSE;
TempOptions.LogSerialInterface = IsDlgButtonChecked(hDlg, IDC_SI_REG) == BST_CHECKED ? TRUE : FALSE;
break;
default:
return FALSE;
}
return TRUE;
}
void SaveLogSetting(HKEY hKey, char * String, BOOL Value)
{
DWORD StoreValue = Value;
RegSetValueEx(hKey, String, 0, REG_DWORD, (CONST BYTE *)&StoreValue, sizeof(DWORD));
}
void SaveLogOptions(void)
{
long lResult;
HKEY hKeyResults = 0;
DWORD Disposition = 0;
char String[200];
sprintf(String, "Software\\N64 Emulation\\%s\\Logging", g_Settings->LoadStringVal(Setting_ApplicationName).c_str());
lResult = RegCreateKeyEx(HKEY_CURRENT_USER, String, 0, "", REG_OPTION_NON_VOLATILE,
KEY_ALL_ACCESS, NULL, &hKeyResults, &Disposition);
SaveLogSetting(hKeyResults, "Log RDRAM", TempOptions.LogRDRamRegisters);
SaveLogSetting(hKeyResults, "Log SP", TempOptions.LogSPRegisters);
SaveLogSetting(hKeyResults, "Log DP Command", TempOptions.LogDPCRegisters);
SaveLogSetting(hKeyResults, "Log DP Span", TempOptions.LogDPSRegisters);
SaveLogSetting(hKeyResults, "Log MIPS Interface (MI)", TempOptions.LogMIPSInterface);
SaveLogSetting(hKeyResults, "Log Video Interface (VI)", TempOptions.LogVideoInterface);
SaveLogSetting(hKeyResults, "Log Audio Interface (AI)", TempOptions.LogAudioInterface);
SaveLogSetting(hKeyResults, "Log Peripheral Interface (PI)", TempOptions.LogPerInterface);
SaveLogSetting(hKeyResults, "Log RDRAM Interface (RI)", TempOptions.LogRDRAMInterface);
SaveLogSetting(hKeyResults, "Log Serial Interface (SI)", TempOptions.LogSerialInterface);
SaveLogSetting(hKeyResults, "Log PifRam DMA Operations", TempOptions.LogPRDMAOperations);
SaveLogSetting(hKeyResults, "Log PifRam Direct Memory Loads", TempOptions.LogPRDirectMemLoads);
SaveLogSetting(hKeyResults, "Log PifRam DMA Memory Loads", TempOptions.LogPRDMAMemLoads);
SaveLogSetting(hKeyResults, "Log PifRam Direct Memory Stores", TempOptions.LogPRDirectMemStores);
SaveLogSetting(hKeyResults, "Log PifRam DMA Memory Stores", TempOptions.LogPRDMAMemStores);
SaveLogSetting(hKeyResults, "Log Controller Pak", TempOptions.LogControllerPak);
SaveLogSetting(hKeyResults, "Log CP0 changes", TempOptions.LogCP0changes);
SaveLogSetting(hKeyResults, "Log CP0 reads", TempOptions.LogCP0reads);
SaveLogSetting(hKeyResults, "Log Exceptions", TempOptions.LogExceptions);
SaveLogSetting(hKeyResults, "No Interrupts", TempOptions.NoInterrupts);
SaveLogSetting(hKeyResults, "Log TLB", TempOptions.LogTLB);
SaveLogSetting(hKeyResults, "Log Cache Operations", TempOptions.LogCache);
SaveLogSetting(hKeyResults, "Log Rom Header", TempOptions.LogRomHeader);
SaveLogSetting(hKeyResults, "Log Unknown access", TempOptions.LogUnknown);
RegCloseKey(hKeyResults);
}
void LogMessage(const char * Message, ...)
{
DWORD dwWritten;
char Msg[400];
va_list ap;
if (!g_Settings->LoadBool(Debugger_Enabled))
{
return;
}
if (g_hLogFile == NULL)
{
return;
}
va_start(ap, Message);
vsprintf(Msg, Message, ap);
va_end(ap);
strcat(Msg, "\r\n");
WriteFile(g_hLogFile, Msg, strlen(Msg), &dwWritten, NULL);
}
void StartLog(void)
{
if (!g_LogOptions.GenerateLog)
{
StopLog();
return;
}
if (g_hLogFile)
{
return;
}
CPath LogFile(CPath::MODULE_DIRECTORY);
LogFile.AppendDirectory("Logs");
LogFile.SetNameExtension("cpudebug.log");
g_hLogFile = CreateFile(LogFile, GENERIC_WRITE, FILE_SHARE_READ, NULL, CREATE_ALWAYS, FILE_ATTRIBUTE_NORMAL | FILE_FLAG_SEQUENTIAL_SCAN, NULL);
SetFilePointer(g_hLogFile, 0, NULL, FILE_BEGIN);
}
void StopLog(void)
{
if (g_hLogFile)
{
CloseHandle(g_hLogFile);
}
g_hLogFile = NULL;
}

0
Source/Project64/Logging.h → Source/Project64/User Interface/LoggingUI.h
View File

1
Source/Project64/stdafx.h
View File

@ -22,7 +22,6 @@
#include <shellapi.h>
#include "Multilanguage.h"
#include "User Interface.h"
#include "Logging.h"
#include "N64 System.h"
#include "Plugin.h"
#include "Support.h"