[Project64] Get Interpreter Ops to use standard types
This commit is contained in:
parent
1ace31216d
commit
e85c1665b1
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@ -12,12 +12,12 @@
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R4300iOp::Func * CInterpreterCPU::m_R4300i_Opcode = NULL;
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void ExecuteInterpreterOps (DWORD /*Cycles*/)
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void ExecuteInterpreterOps(uint32_t /*Cycles*/)
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{
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g_Notify->BreakPoint(__FILEW__,__LINE__);
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g_Notify->BreakPoint(__FILEW__, __LINE__);
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}
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bool DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2)
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bool DelaySlotEffectsCompare(uint32_t PC, uint32_t Reg1, uint32_t Reg2)
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{
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OPCODE Command;
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@ -87,7 +87,7 @@ bool DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2)
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default:
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if (g_Settings->LoadBool(Debugger_Enabled))
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{
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g_Notify->DisplayError(stdstr_f("Does %s effect Delay slot at %X?",R4300iOpcodeName(Command.Hex,PC+4), PC).ToUTF16().c_str());
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g_Notify->DisplayError(stdstr_f("Does %s effect Delay slot at %X?", R4300iOpcodeName(Command.Hex, PC + 4), PC).ToUTF16().c_str());
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}
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return true;
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}
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@ -107,7 +107,7 @@ bool DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2)
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}
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break;
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default:
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if ( (Command.rs & 0x10 ) != 0 )
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if ((Command.rs & 0x10) != 0)
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{
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switch (Command.funct)
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{
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@ -118,7 +118,7 @@ bool DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2)
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default:
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if (g_Settings->LoadBool(Debugger_Enabled))
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{
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g_Notify->DisplayError(stdstr_f("Does %s effect Delay slot at %X?\n6",R4300iOpcodeName(Command.Hex,PC+4), PC).ToUTF16().c_str());
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g_Notify->DisplayError(stdstr_f("Does %s effect Delay slot at %X?\n6", R4300iOpcodeName(Command.Hex, PC + 4), PC).ToUTF16().c_str());
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}
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return true;
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}
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@ -127,7 +127,7 @@ bool DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2)
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{
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if (g_Settings->LoadBool(Debugger_Enabled))
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{
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g_Notify->DisplayError(stdstr_f("Does %s effect Delay slot at %X?\n7",R4300iOpcodeName(Command.Hex,PC+4), PC).ToUTF16().c_str());
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g_Notify->DisplayError(stdstr_f("Does %s effect Delay slot at %X?\n7", R4300iOpcodeName(Command.Hex, PC + 4), PC).ToUTF16().c_str());
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}
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return true;
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}
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@ -156,7 +156,7 @@ bool DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2)
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default:
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if (g_Settings->LoadBool(Debugger_Enabled))
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{
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g_Notify->DisplayError(stdstr_f("Does %s effect Delay slot at %X?",R4300iOpcodeName(Command.Hex,PC+4), PC).ToUTF16().c_str());
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g_Notify->DisplayError(stdstr_f("Does %s effect Delay slot at %X?", R4300iOpcodeName(Command.Hex, PC + 4), PC).ToUTF16().c_str());
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}
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return true;
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}
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@ -204,7 +204,7 @@ bool DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2)
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default:
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if (g_Settings->LoadBool(Debugger_Enabled))
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{
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g_Notify->DisplayError(stdstr_f("Does %s effect Delay slot at %X?",R4300iOpcodeName(Command.Hex,PC+4), PC).ToUTF16().c_str());
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g_Notify->DisplayError(stdstr_f("Does %s effect Delay slot at %X?", R4300iOpcodeName(Command.Hex, PC + 4), PC).ToUTF16().c_str());
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}
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return true;
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}
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@ -236,10 +236,10 @@ void CInterpreterCPU::InPermLoop()
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//}
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/* Interrupts enabled */
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if (( g_Reg->STATUS_REGISTER & STATUS_IE ) == 0 ||
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( g_Reg->STATUS_REGISTER & STATUS_EXL ) != 0 ||
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( g_Reg->STATUS_REGISTER & STATUS_ERL ) != 0 ||
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( g_Reg->STATUS_REGISTER & 0xFF00) == 0)
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if ((g_Reg->STATUS_REGISTER & STATUS_IE) == 0 ||
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(g_Reg->STATUS_REGISTER & STATUS_EXL) != 0 ||
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(g_Reg->STATUS_REGISTER & STATUS_ERL) != 0 ||
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(g_Reg->STATUS_REGISTER & 0xFF00) == 0)
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{
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if (g_Plugins->Gfx()->UpdateScreen != NULL)
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{
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@ -266,11 +266,11 @@ void CInterpreterCPU::ExecuteCPU()
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bool & Done = g_System->m_EndEmulation;
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uint32_t & PROGRAM_COUNTER = *_PROGRAM_COUNTER;
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OPCODE & Opcode = R4300iOp::m_Opcode;
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DWORD & JumpToLocation = R4300iOp::m_JumpToLocation;
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uint32_t & JumpToLocation = R4300iOp::m_JumpToLocation;
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bool & TestTimer = R4300iOp::m_TestTimer;
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const BOOL & bDoSomething= g_SystemEvents->DoSomething();
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DWORD CountPerOp = g_System->CountPerOp();
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int & NextTimer = *g_NextTimer;
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const int32_t & bDoSomething = g_SystemEvents->DoSomething();
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uint32_t CountPerOp = g_System->CountPerOp();
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int32_t & NextTimer = *g_NextTimer;
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__try
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{
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@ -284,7 +284,7 @@ void CInterpreterCPU::ExecuteCPU()
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//WriteTraceF((TraceType)(TraceError | TraceNoHeader),"%X: %s t9: %08X v1: %08X",*_PROGRAM_COUNTER,R4300iOpcodeName(Opcode.Hex,*_PROGRAM_COUNTER),_GPR[0x19].UW[0],_GPR[0x03].UW[0]);
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//WriteTraceF((TraceType)(TraceError | TraceNoHeader),"%X: %d %d",*_PROGRAM_COUNTER,*g_NextTimer,g_SystemTimer->CurrentType());
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}*/
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m_R4300i_Opcode[ Opcode.op ]();
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m_R4300i_Opcode[Opcode.op]();
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NextTimer -= CountPerOp;
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switch (R4300iOp::m_NextInstruction)
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@ -302,7 +302,7 @@ void CInterpreterCPU::ExecuteCPU()
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break;
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case JUMP:
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{
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BOOL CheckTimer = (JumpToLocation < PROGRAM_COUNTER || TestTimer);
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bool CheckTimer = (JumpToLocation < PROGRAM_COUNTER || TestTimer);
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PROGRAM_COUNTER = JumpToLocation;
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R4300iOp::m_NextInstruction = NORMAL;
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if (CheckTimer)
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@ -330,32 +330,30 @@ void CInterpreterCPU::ExecuteCPU()
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}
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break;
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default:
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g_Notify->BreakPoint(__FILEW__,__LINE__);
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g_Notify->BreakPoint(__FILEW__, __LINE__);
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}
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}
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else
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{
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g_Reg->DoTLBReadMiss(R4300iOp::m_NextInstruction == JUMP,PROGRAM_COUNTER);
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g_Reg->DoTLBReadMiss(R4300iOp::m_NextInstruction == JUMP, PROGRAM_COUNTER);
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R4300iOp::m_NextInstruction = NORMAL;
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}
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}
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} __except( g_MMU->MemoryFilter( GetExceptionCode(), GetExceptionInformation()) )
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{
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g_Notify->DisplayError(GS(MSG_UNKNOWN_MEM_ACTION));
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ExitThread(0);
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g_Notify->FatalError(GS(MSG_UNKNOWN_MEM_ACTION));
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}
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}
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void CInterpreterCPU::ExecuteOps(int Cycles)
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void CInterpreterCPU::ExecuteOps(int32_t Cycles)
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{
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bool & Done = g_System->m_EndEmulation;
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uint32_t & PROGRAM_COUNTER = *_PROGRAM_COUNTER;
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OPCODE & Opcode = R4300iOp::m_Opcode;
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DWORD & JumpToLocation = R4300iOp::m_JumpToLocation;
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uint32_t & JumpToLocation = R4300iOp::m_JumpToLocation;
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bool & TestTimer = R4300iOp::m_TestTimer;
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const BOOL & DoSomething = g_SystemEvents->DoSomething();
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DWORD CountPerOp = g_System->CountPerOp();
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const int32_t & DoSomething = g_SystemEvents->DoSomething();
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uint32_t CountPerOp = g_System->CountPerOp();
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__try
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{
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@ -381,13 +379,13 @@ void CInterpreterCPU::ExecuteOps(int Cycles)
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//WriteTraceF((TraceType)(TraceError | TraceNoHeader),"%X: %s t9: %08X v1: %08X",*_PROGRAM_COUNTER,R4300iOpcodeName(Opcode.Hex,*_PROGRAM_COUNTER),_GPR[0x19].UW[0],_GPR[0x03].UW[0]);
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//WriteTraceF((TraceType)(TraceError | TraceNoHeader),"%X: %d %d",*_PROGRAM_COUNTER,*g_NextTimer,g_SystemTimer->CurrentType());
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}*/
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m_R4300i_Opcode[ Opcode.op ]();
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m_R4300i_Opcode[Opcode.op]();
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_GPR[0].DW = 0; /* MIPS $zero hard-wired to 0 */
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Cycles -= CountPerOp;
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*g_NextTimer -= CountPerOp;
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/*static DWORD TestAddress = 0x80077B0C, TestValue = 0, CurrentValue = 0;
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/*static uint32_t TestAddress = 0x80077B0C, TestValue = 0, CurrentValue = 0;
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if (g_MMU->LW_VAddr(TestAddress, TestValue))
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{
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if (TestValue != CurrentValue)
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@ -412,7 +410,7 @@ void CInterpreterCPU::ExecuteOps(int Cycles)
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break;
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case JUMP:
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{
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BOOL CheckTimer = (JumpToLocation < PROGRAM_COUNTER || TestTimer);
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bool CheckTimer = (JumpToLocation < PROGRAM_COUNTER || TestTimer);
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PROGRAM_COUNTER = JumpToLocation;
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R4300iOp::m_NextInstruction = NORMAL;
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if (CheckTimer)
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@ -440,18 +438,18 @@ void CInterpreterCPU::ExecuteOps(int Cycles)
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}
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break;
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default:
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g_Notify->BreakPoint(__FILEW__,__LINE__);
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g_Notify->BreakPoint(__FILEW__, __LINE__);
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}
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}
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else
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{
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g_Reg->DoTLBReadMiss(R4300iOp::m_NextInstruction == JUMP,PROGRAM_COUNTER);
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g_Reg->DoTLBReadMiss(R4300iOp::m_NextInstruction == JUMP, PROGRAM_COUNTER);
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R4300iOp::m_NextInstruction = NORMAL;
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}
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}
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} __except( g_MMU->MemoryFilter( GetExceptionCode(), GetExceptionInformation()) )
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}
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__except( g_MMU->MemoryFilter( GetExceptionCode(), GetExceptionInformation()) )
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{
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g_Notify->DisplayError(GS(MSG_UNKNOWN_MEM_ACTION));
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ExitThread(0);
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g_Notify->FatalError(GS(MSG_UNKNOWN_MEM_ACTION));
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}
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}
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@ -9,9 +9,8 @@
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* *
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****************************************************************************/
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#include "stdafx.h"
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//#include "../C Core/Logging.h"
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bool DelaySlotEffectsCompare ( DWORD PC, DWORD Reg1, DWORD Reg2 );
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bool DelaySlotEffectsCompare ( uint32_t PC, uint32_t Reg1, uint32_t Reg2 );
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#define ADDRESS_ERROR_EXCEPTION(Address,FromRead) \
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g_Reg->DoAddressError(m_NextInstruction == JUMP,Address,FromRead);\
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@ -626,7 +625,6 @@ R4300iOp32::Func * R4300iOp32::BuildInterpreter()
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return Jump_Opcode;
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}
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/************************* Opcode functions *************************/
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void R4300iOp32::JAL()
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{
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@ -645,7 +643,7 @@ void R4300iOp32::BEQ()
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m_NextInstruction = DELAY_SLOT;
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if (_GPR[m_Opcode.rs].W[0] == _GPR[m_Opcode.rt].W[0])
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{
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m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4;
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m_JumpToLocation = (*_PROGRAM_COUNTER) + ((int16_t)m_Opcode.offset << 2) + 4;
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if ((*_PROGRAM_COUNTER) == m_JumpToLocation)
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{
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if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER,m_Opcode.rs,m_Opcode.rt))
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@ -665,7 +663,7 @@ void R4300iOp32::BNE()
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m_NextInstruction = DELAY_SLOT;
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if (_GPR[m_Opcode.rs].W[0] != _GPR[m_Opcode.rt].W[0])
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{
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m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4;
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m_JumpToLocation = (*_PROGRAM_COUNTER) + ((int16_t)m_Opcode.offset << 2) + 4;
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if ((*_PROGRAM_COUNTER) == m_JumpToLocation)
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{
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if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER,m_Opcode.rs,m_Opcode.rt))
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@ -684,7 +682,7 @@ void R4300iOp32::BLEZ() {
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m_NextInstruction = DELAY_SLOT;
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if (_GPR[m_Opcode.rs].W[0] <= 0)
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{
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m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4;
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m_JumpToLocation = (*_PROGRAM_COUNTER) + ((int16_t)m_Opcode.offset << 2) + 4;
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if ((*_PROGRAM_COUNTER) == m_JumpToLocation)
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{
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if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER,m_Opcode.rs,0))
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@ -704,7 +702,7 @@ void R4300iOp32::BGTZ()
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m_NextInstruction = DELAY_SLOT;
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if (_GPR[m_Opcode.rs].W[0] > 0)
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{
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m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4;
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m_JumpToLocation = (*_PROGRAM_COUNTER) + ((int16_t)m_Opcode.offset << 2) + 4;
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if ((*_PROGRAM_COUNTER) == m_JumpToLocation)
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{
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if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER,m_Opcode.rs,0))
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@ -724,10 +722,10 @@ void R4300iOp32::ADDI()
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#ifdef Interpreter_StackTest
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if (m_Opcode.rs == 29 && m_Opcode.rt == 29)
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{
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StackValue += (short)m_Opcode.immediate;
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StackValue += (int16_t)m_Opcode.immediate;
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}
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#endif
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_GPR[m_Opcode.rt].W[0] = (_GPR[m_Opcode.rs].W[0] + ((short)m_Opcode.immediate));
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_GPR[m_Opcode.rt].W[0] = (_GPR[m_Opcode.rs].W[0] + ((int16_t)m_Opcode.immediate));
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#ifdef Interpreter_StackTest
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if (m_Opcode.rt == 29 && m_Opcode.rs != 29)
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{
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@ -741,10 +739,10 @@ void R4300iOp32::ADDIU()
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#ifdef Interpreter_StackTest
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if (m_Opcode.rs == 29 && m_Opcode.rt == 29)
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{
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StackValue += (short)m_Opcode.immediate;
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StackValue += (int16_t)m_Opcode.immediate;
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}
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#endif
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_GPR[m_Opcode.rt].W[0] = (_GPR[m_Opcode.rs].W[0] + ((short)m_Opcode.immediate));
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_GPR[m_Opcode.rt].W[0] = (_GPR[m_Opcode.rs].W[0] + ((int16_t)m_Opcode.immediate));
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#ifdef Interpreter_StackTest
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if (m_Opcode.rt == 29 && m_Opcode.rs != 29)
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{
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@ -755,7 +753,7 @@ void R4300iOp32::ADDIU()
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void R4300iOp32::SLTI()
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{
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if (_GPR[m_Opcode.rs].W[0] < (__int64)((short)m_Opcode.immediate))
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if (_GPR[m_Opcode.rs].W[0] < (int64_t)((int16_t)m_Opcode.immediate))
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{
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_GPR[m_Opcode.rt].W[0] = 1;
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}
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@ -767,11 +765,11 @@ void R4300iOp32::SLTI()
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void R4300iOp32::SLTIU()
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{
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int imm32 = (short)m_Opcode.immediate;
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__int64 imm64;
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int32_t imm32 = (int16_t)m_Opcode.immediate;
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int64_t imm64;
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imm64 = imm32;
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_GPR[m_Opcode.rt].W[0] = _GPR[m_Opcode.rs].UW[0] < (unsigned __int64)imm64?1:0;
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_GPR[m_Opcode.rt].W[0] = _GPR[m_Opcode.rs].UW[0] < (uint64_t)imm64?1:0;
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}
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void R4300iOp32::ANDI()
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@ -791,7 +789,7 @@ void R4300iOp32::XORI()
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void R4300iOp32::LUI()
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{
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_GPR[m_Opcode.rt].W[0] = (long)((short)m_Opcode.offset << 16);
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_GPR[m_Opcode.rt].W[0] = (int32_t)((int16_t)m_Opcode.offset << 16);
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#ifdef Interpreter_StackTest
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if (m_Opcode.rt == 29)
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{
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@ -805,7 +803,7 @@ void R4300iOp32::BEQL()
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if (_GPR[m_Opcode.rs].W[0] == _GPR[m_Opcode.rt].W[0])
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{
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m_NextInstruction = DELAY_SLOT;
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m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4;
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m_JumpToLocation = (*_PROGRAM_COUNTER) + ((int16_t)m_Opcode.offset << 2) + 4;
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if ((*_PROGRAM_COUNTER) == m_JumpToLocation)
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{
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if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER,m_Opcode.rs,m_Opcode.rt))
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@ -826,7 +824,7 @@ void R4300iOp32::BNEL()
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if (_GPR[m_Opcode.rs].W[0] != _GPR[m_Opcode.rt].W[0])
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{
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m_NextInstruction = DELAY_SLOT;
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m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4;
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m_JumpToLocation = (*_PROGRAM_COUNTER) + ((int16_t)m_Opcode.offset << 2) + 4;
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if ((*_PROGRAM_COUNTER) == m_JumpToLocation)
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{
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if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER,m_Opcode.rs,m_Opcode.rt))
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@ -847,7 +845,7 @@ void R4300iOp32::BLEZL()
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if (_GPR[m_Opcode.rs].W[0] <= 0)
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{
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m_NextInstruction = DELAY_SLOT;
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m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4;
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m_JumpToLocation = (*_PROGRAM_COUNTER) + ((int16_t)m_Opcode.offset << 2) + 4;
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if ((*_PROGRAM_COUNTER) == m_JumpToLocation)
|
||||
{
|
||||
if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER,m_Opcode.rs,0))
|
||||
|
@ -868,7 +866,7 @@ void R4300iOp32::BGTZL()
|
|||
if (_GPR[m_Opcode.rs].W[0] > 0)
|
||||
{
|
||||
m_NextInstruction = DELAY_SLOT;
|
||||
m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4;
|
||||
m_JumpToLocation = (*_PROGRAM_COUNTER) + ((int16_t)m_Opcode.offset << 2) + 4;
|
||||
if ((*_PROGRAM_COUNTER) == m_JumpToLocation)
|
||||
{
|
||||
if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER,m_Opcode.rs,0))
|
||||
|
@ -886,7 +884,7 @@ void R4300iOp32::BGTZL()
|
|||
|
||||
void R4300iOp32::LB()
|
||||
{
|
||||
DWORD Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;
|
||||
uint32_t Address = _GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset;
|
||||
if (!g_MMU->LB_VAddr(Address,_GPR[m_Opcode.rt].UB[0]))
|
||||
{
|
||||
if (bShowTLBMisses())
|
||||
|
@ -903,7 +901,7 @@ void R4300iOp32::LB()
|
|||
|
||||
void R4300iOp32::LH()
|
||||
{
|
||||
DWORD Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;
|
||||
uint32_t Address = _GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset;
|
||||
if ((Address & 1) != 0)
|
||||
{
|
||||
ADDRESS_ERROR_EXCEPTION(Address, true);
|
||||
|
@ -924,12 +922,12 @@ void R4300iOp32::LH()
|
|||
|
||||
void R4300iOp32::LWL()
|
||||
{
|
||||
DWORD Offset, Address, Value;
|
||||
uint32_t Offset, Address, Value;
|
||||
|
||||
Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;
|
||||
Address = _GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset;
|
||||
Offset = Address & 3;
|
||||
|
||||
if (!g_MMU->LW_VAddr((Address & ~3),(uint32_t &)Value))
|
||||
if (!g_MMU->LW_VAddr((Address & ~3),Value))
|
||||
{
|
||||
if (bShowTLBMisses())
|
||||
{
|
||||
|
@ -939,13 +937,13 @@ void R4300iOp32::LWL()
|
|||
return;
|
||||
}
|
||||
|
||||
_GPR[m_Opcode.rt].W[0] = (int)(_GPR[m_Opcode.rt].W[0] & LWL_MASK[Offset]);
|
||||
_GPR[m_Opcode.rt].W[0] += (int)(Value << LWL_SHIFT[Offset]);
|
||||
_GPR[m_Opcode.rt].W[0] = (int32_t)(_GPR[m_Opcode.rt].W[0] & LWL_MASK[Offset]);
|
||||
_GPR[m_Opcode.rt].W[0] += (int32_t)(Value << LWL_SHIFT[Offset]);
|
||||
}
|
||||
|
||||
void R4300iOp32::LW()
|
||||
{
|
||||
DWORD Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;
|
||||
uint32_t Address = _GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset;
|
||||
if ((Address & 3) != 0)
|
||||
{
|
||||
ADDRESS_ERROR_EXCEPTION(Address, true);
|
||||
|
@ -956,7 +954,7 @@ void R4300iOp32::LW()
|
|||
Log_LW((*_PROGRAM_COUNTER),Address);
|
||||
}
|
||||
|
||||
if (!g_MMU->LW_VAddr(Address,(uint32_t &)_GPR[m_Opcode.rt].UW[0]))
|
||||
if (!g_MMU->LW_VAddr(Address,_GPR[m_Opcode.rt].UW[0]))
|
||||
{
|
||||
if (bShowTLBMisses())
|
||||
{
|
||||
|
@ -972,7 +970,7 @@ void R4300iOp32::LW()
|
|||
|
||||
void R4300iOp32::LBU()
|
||||
{
|
||||
DWORD Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;
|
||||
uint32_t Address = _GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset;
|
||||
if (!g_MMU->LB_VAddr(Address,_GPR[m_Opcode.rt].UB[0]))
|
||||
{
|
||||
if (bShowTLBMisses())
|
||||
|
@ -989,7 +987,7 @@ void R4300iOp32::LBU()
|
|||
|
||||
void R4300iOp32::LHU()
|
||||
{
|
||||
DWORD Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;
|
||||
uint32_t Address = _GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset;
|
||||
if ((Address & 1) != 0)
|
||||
{
|
||||
ADDRESS_ERROR_EXCEPTION(Address, true);
|
||||
|
@ -1010,12 +1008,12 @@ void R4300iOp32::LHU()
|
|||
|
||||
void R4300iOp32::LWR()
|
||||
{
|
||||
DWORD Offset, Address, Value;
|
||||
uint32_t Offset, Address, Value;
|
||||
|
||||
Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;
|
||||
Address = _GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset;
|
||||
Offset = Address & 3;
|
||||
|
||||
if (!g_MMU->LW_VAddr((Address & ~3),(uint32_t &)Value))
|
||||
if (!g_MMU->LW_VAddr((Address & ~3),Value))
|
||||
{
|
||||
g_Notify->BreakPoint(__FILEW__,__LINE__);
|
||||
if (bShowTLBMisses())
|
||||
|
@ -1025,19 +1023,19 @@ void R4300iOp32::LWR()
|
|||
return;
|
||||
}
|
||||
|
||||
_GPR[m_Opcode.rt].W[0] = (int)(_GPR[m_Opcode.rt].W[0] & LWR_MASK[Offset]);
|
||||
_GPR[m_Opcode.rt].W[0] += (int)(Value >> LWR_SHIFT[Offset]);
|
||||
_GPR[m_Opcode.rt].W[0] = (int32_t)(_GPR[m_Opcode.rt].W[0] & LWR_MASK[Offset]);
|
||||
_GPR[m_Opcode.rt].W[0] += (int32_t)(Value >> LWR_SHIFT[Offset]);
|
||||
}
|
||||
|
||||
void R4300iOp32::LWU()
|
||||
{
|
||||
DWORD Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;
|
||||
uint32_t Address = _GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset;
|
||||
if ((Address & 3) != 0)
|
||||
{
|
||||
ADDRESS_ERROR_EXCEPTION(Address, true);
|
||||
}
|
||||
|
||||
if (!g_MMU->LW_VAddr(Address,(uint32_t &)_GPR[m_Opcode.rt].UW[0]))
|
||||
if (!g_MMU->LW_VAddr(Address,_GPR[m_Opcode.rt].UW[0]))
|
||||
{
|
||||
if (bShowTLBMisses())
|
||||
{
|
||||
|
@ -1051,16 +1049,15 @@ void R4300iOp32::LWU()
|
|||
}
|
||||
}
|
||||
|
||||
|
||||
void R4300iOp32::LL()
|
||||
{
|
||||
DWORD Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;
|
||||
uint32_t Address = _GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset;
|
||||
if ((Address & 3) != 0)
|
||||
{
|
||||
ADDRESS_ERROR_EXCEPTION(Address, true);
|
||||
}
|
||||
|
||||
if (!g_MMU->LW_VAddr(Address,(uint32_t &)_GPR[m_Opcode.rt].UW[0]))
|
||||
if (!g_MMU->LW_VAddr(Address,_GPR[m_Opcode.rt].UW[0]))
|
||||
{
|
||||
if (bShowTLBMisses())
|
||||
{
|
||||
|
@ -1083,7 +1080,7 @@ void R4300iOp32::SPECIAL_SLL()
|
|||
|
||||
void R4300iOp32::SPECIAL_SRL()
|
||||
{
|
||||
_GPR[m_Opcode.rd].W[0] = (int)(_GPR[m_Opcode.rt].UW[0] >> m_Opcode.sa);
|
||||
_GPR[m_Opcode.rd].W[0] = (int32_t)(_GPR[m_Opcode.rt].UW[0] >> m_Opcode.sa);
|
||||
}
|
||||
|
||||
void R4300iOp32::SPECIAL_SRA()
|
||||
|
@ -1098,7 +1095,7 @@ void R4300iOp32::SPECIAL_SLLV()
|
|||
|
||||
void R4300iOp32::SPECIAL_SRLV()
|
||||
{
|
||||
_GPR[m_Opcode.rd].W[0] = (int)(_GPR[m_Opcode.rt].UW[0] >> (_GPR[m_Opcode.rs].UW[0] & 0x1F));
|
||||
_GPR[m_Opcode.rd].W[0] = (int32_t)(_GPR[m_Opcode.rt].UW[0] >> (_GPR[m_Opcode.rs].UW[0] & 0x1F));
|
||||
}
|
||||
|
||||
void R4300iOp32::SPECIAL_SRAV()
|
||||
|
@ -1110,7 +1107,7 @@ void R4300iOp32::SPECIAL_JALR()
|
|||
{
|
||||
m_NextInstruction = DELAY_SLOT;
|
||||
m_JumpToLocation = _GPR[m_Opcode.rs].UW[0];
|
||||
_GPR[m_Opcode.rd].W[0] = (long)((*_PROGRAM_COUNTER) + 8);
|
||||
_GPR[m_Opcode.rd].W[0] = (int32_t)((*_PROGRAM_COUNTER) + 8);
|
||||
m_TestTimer = true;
|
||||
}
|
||||
|
||||
|
@ -1189,12 +1186,12 @@ void R4300iOp32::SPECIAL_TEQ()
|
|||
|
||||
void R4300iOp32::SPECIAL_DSRL32()
|
||||
{
|
||||
_GPR[m_Opcode.rd].UW[0] = (DWORD)(_GPR[m_Opcode.rt].UDW >> (m_Opcode.sa + 32));
|
||||
_GPR[m_Opcode.rd].UW[0] = (uint32_t)(_GPR[m_Opcode.rt].UDW >> (m_Opcode.sa + 32));
|
||||
}
|
||||
|
||||
void R4300iOp32::SPECIAL_DSRA32()
|
||||
{
|
||||
_GPR[m_Opcode.rd].W[0] = (long)(_GPR[m_Opcode.rt].DW >> (m_Opcode.sa + 32));
|
||||
_GPR[m_Opcode.rd].W[0] = (int32_t)(_GPR[m_Opcode.rt].DW >> (m_Opcode.sa + 32));
|
||||
}
|
||||
|
||||
/********************** R4300i OpCodes: RegImm **********************/
|
||||
|
@ -1203,7 +1200,7 @@ void R4300iOp32::REGIMM_BLTZ()
|
|||
m_NextInstruction = DELAY_SLOT;
|
||||
if (_GPR[m_Opcode.rs].W[0] < 0)
|
||||
{
|
||||
m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4;
|
||||
m_JumpToLocation = (*_PROGRAM_COUNTER) + ((int16_t)m_Opcode.offset << 2) + 4;
|
||||
if ((*_PROGRAM_COUNTER) == m_JumpToLocation)
|
||||
{
|
||||
if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER),m_Opcode.rs,0))
|
||||
|
@ -1223,7 +1220,7 @@ void R4300iOp32::REGIMM_BGEZ()
|
|||
m_NextInstruction = DELAY_SLOT;
|
||||
if (_GPR[m_Opcode.rs].W[0] >= 0)
|
||||
{
|
||||
m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4;
|
||||
m_JumpToLocation = (*_PROGRAM_COUNTER) + ((int16_t)m_Opcode.offset << 2) + 4;
|
||||
if ((*_PROGRAM_COUNTER) == m_JumpToLocation)
|
||||
{
|
||||
if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER),m_Opcode.rs,0))
|
||||
|
@ -1243,7 +1240,7 @@ void R4300iOp32::REGIMM_BLTZL()
|
|||
if (_GPR[m_Opcode.rs].W[0] < 0)
|
||||
{
|
||||
m_NextInstruction = DELAY_SLOT;
|
||||
m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4;
|
||||
m_JumpToLocation = (*_PROGRAM_COUNTER) + ((int16_t)m_Opcode.offset << 2) + 4;
|
||||
if ((*_PROGRAM_COUNTER) == m_JumpToLocation)
|
||||
{
|
||||
if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER),m_Opcode.rs,0))
|
||||
|
@ -1264,7 +1261,7 @@ void R4300iOp32::REGIMM_BGEZL()
|
|||
if (_GPR[m_Opcode.rs].W[0] >= 0)
|
||||
{
|
||||
m_NextInstruction = DELAY_SLOT;
|
||||
m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4;
|
||||
m_JumpToLocation = (*_PROGRAM_COUNTER) + ((int16_t)m_Opcode.offset << 2) + 4;
|
||||
if ((*_PROGRAM_COUNTER) == m_JumpToLocation)
|
||||
{
|
||||
if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER),m_Opcode.rs,0))
|
||||
|
@ -1285,7 +1282,7 @@ void R4300iOp32::REGIMM_BLTZAL()
|
|||
m_NextInstruction = DELAY_SLOT;
|
||||
if (_GPR[m_Opcode.rs].W[0] < 0)
|
||||
{
|
||||
m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4;
|
||||
m_JumpToLocation = (*_PROGRAM_COUNTER) + ((int16_t)m_Opcode.offset << 2) + 4;
|
||||
if ((*_PROGRAM_COUNTER) == m_JumpToLocation)
|
||||
{
|
||||
if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER),m_Opcode.rs,0))
|
||||
|
@ -1298,7 +1295,7 @@ void R4300iOp32::REGIMM_BLTZAL()
|
|||
{
|
||||
m_JumpToLocation = (*_PROGRAM_COUNTER) + 8;
|
||||
}
|
||||
_GPR[31].W[0]= (long)((*_PROGRAM_COUNTER) + 8);
|
||||
_GPR[31].W[0]= (int32_t)((*_PROGRAM_COUNTER) + 8);
|
||||
}
|
||||
|
||||
void R4300iOp32::REGIMM_BGEZAL()
|
||||
|
@ -1306,7 +1303,7 @@ void R4300iOp32::REGIMM_BGEZAL()
|
|||
m_NextInstruction = DELAY_SLOT;
|
||||
if (_GPR[m_Opcode.rs].W[0] >= 0)
|
||||
{
|
||||
m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4;
|
||||
m_JumpToLocation = (*_PROGRAM_COUNTER) + ((int16_t)m_Opcode.offset << 2) + 4;
|
||||
if ((*_PROGRAM_COUNTER) == m_JumpToLocation)
|
||||
{
|
||||
if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER),m_Opcode.rs,0))
|
||||
|
@ -1319,10 +1316,12 @@ void R4300iOp32::REGIMM_BGEZAL()
|
|||
{
|
||||
m_JumpToLocation = (*_PROGRAM_COUNTER) + 8;
|
||||
}
|
||||
_GPR[31].W[0] = (long)((*_PROGRAM_COUNTER) + 8);
|
||||
_GPR[31].W[0] = (int32_t)((*_PROGRAM_COUNTER) + 8);
|
||||
}
|
||||
|
||||
/************************** COP0 functions **************************/
|
||||
void R4300iOp32::COP0_MF() {
|
||||
void R4300iOp32::COP0_MF()
|
||||
{
|
||||
if (g_LogOptions.LogCP0reads)
|
||||
{
|
||||
LogMessage("%08X: R4300i Read from %s (0x%08X)", (*_PROGRAM_COUNTER), CRegName::Cop0[m_Opcode.rd], _CP0[m_Opcode.rd]);
|
||||
|
@ -1332,7 +1331,7 @@ void R4300iOp32::COP0_MF() {
|
|||
{
|
||||
g_SystemTimer->UpdateTimers();
|
||||
}
|
||||
_GPR[m_Opcode.rt].W[0] = (int)_CP0[m_Opcode.rd];
|
||||
_GPR[m_Opcode.rt].W[0] = (int32_t)_CP0[m_Opcode.rd];
|
||||
}
|
||||
|
||||
void R4300iOp32::COP0_MT()
|
||||
|
@ -1412,7 +1411,7 @@ void R4300iOp32::COP0_MT()
|
|||
void R4300iOp32::COP1_MF()
|
||||
{
|
||||
TEST_COP1_USABLE_EXCEPTION
|
||||
_GPR[m_Opcode.rt].W[0] = *(int *)_FPR_S[m_Opcode.fs];
|
||||
_GPR[m_Opcode.rt].W[0] = *(int32_t *)_FPR_S[m_Opcode.fs];
|
||||
}
|
||||
|
||||
void R4300iOp32::COP1_CF()
|
||||
|
@ -1423,11 +1422,11 @@ void R4300iOp32::COP1_CF()
|
|||
if (g_Settings->LoadBool(Debugger_Enabled)) { g_Notify->DisplayError(L"CFC1 what register are you writing to ?"); }
|
||||
return;
|
||||
}
|
||||
_GPR[m_Opcode.rt].W[0] = (int)_FPCR[m_Opcode.fs];
|
||||
_GPR[m_Opcode.rt].W[0] = (int32_t)_FPCR[m_Opcode.fs];
|
||||
}
|
||||
|
||||
void R4300iOp32::COP1_DMT()
|
||||
{
|
||||
TEST_COP1_USABLE_EXCEPTION
|
||||
*(__int64 *)_FPR_D[m_Opcode.fs] = _GPR[m_Opcode.rt].W[0];
|
||||
*(int64_t *)_FPR_D[m_Opcode.fs] = _GPR[m_Opcode.rt].W[0];
|
||||
}
|
||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -64,7 +64,6 @@ public:
|
|||
static void SDC1();
|
||||
static void SD();
|
||||
|
||||
|
||||
/********************** R4300i OpCodes: Special **********************/
|
||||
static void SPECIAL_SLL();
|
||||
static void SPECIAL_SRL();
|
||||
|
@ -200,13 +199,12 @@ public:
|
|||
/************************** Other functions **************************/
|
||||
static void UnknownOpcode();
|
||||
|
||||
|
||||
static Func* BuildInterpreter();
|
||||
|
||||
static bool m_TestTimer;
|
||||
static DWORD m_NextInstruction;
|
||||
static uint32_t m_NextInstruction;
|
||||
static OPCODE m_Opcode;
|
||||
static DWORD m_JumpToLocation;
|
||||
static uint32_t m_JumpToLocation;
|
||||
|
||||
protected:
|
||||
static void SPECIAL();
|
||||
|
@ -232,7 +230,6 @@ protected:
|
|||
static Func Jump_CoP1_W[64];
|
||||
static Func Jump_CoP1_L[64];
|
||||
|
||||
static const DWORD SWL_MASK[4], SWR_MASK[4], LWL_MASK[4], LWR_MASK[4];
|
||||
static const int SWL_SHIFT[4], SWR_SHIFT[4], LWL_SHIFT[4], LWR_SHIFT[4];
|
||||
|
||||
static const uint32_t SWL_MASK[4], SWR_MASK[4], LWL_MASK[4], LWR_MASK[4];
|
||||
static const int32_t SWL_SHIFT[4], SWR_SHIFT[4], LWL_SHIFT[4], LWR_SHIFT[4];
|
||||
};
|
||||
|
|
|
@ -10,7 +10,7 @@
|
|||
****************************************************************************/
|
||||
#include "stdafx.h"
|
||||
|
||||
bool DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2);
|
||||
bool DelaySlotEffectsCompare (uint32_t PC, uint32_t Reg1, uint32_t Reg2);
|
||||
|
||||
CCodeBlock::CCodeBlock(DWORD VAddrEnter, BYTE * RecompPos) :
|
||||
m_VAddrEnter(VAddrEnter),
|
||||
|
|
|
@ -12,7 +12,7 @@
|
|||
|
||||
void InPermLoop();
|
||||
|
||||
bool DelaySlotEffectsCompare(DWORD PC, DWORD Reg1, DWORD Reg2);
|
||||
bool DelaySlotEffectsCompare(uint32_t PC, uint32_t Reg1, uint32_t Reg2);
|
||||
|
||||
static bool DelaySlotEffectsJump(DWORD JumpPC) {
|
||||
OPCODE Command;
|
||||
|
|
|
@ -14,7 +14,7 @@
|
|||
#define CHECKED_BUILD 1
|
||||
#endif
|
||||
|
||||
bool DelaySlotEffectsCompare ( DWORD PC, DWORD Reg1, DWORD Reg2 );
|
||||
bool DelaySlotEffectsCompare(uint32_t PC, uint32_t Reg1, uint32_t Reg2);
|
||||
|
||||
LoopAnalysis::LoopAnalysis(CCodeBlock * CodeBlock, CCodeSection * Section) :
|
||||
m_EnterSection(Section),
|
||||
|
|
|
@ -38,7 +38,7 @@ void CRecompilerOps::CompileWriteTLBMiss (x86Reg AddressReg, x86Reg LookUpReg )
|
|||
m_Section->CompileExit(m_CompilePC, m_CompilePC, m_RegWorkingSet, CExitInfo::TLBWriteMiss, false, JeLabel32);
|
||||
}
|
||||
|
||||
bool DelaySlotEffectsCompare ( DWORD PC, DWORD Reg1, DWORD Reg2 );
|
||||
bool DelaySlotEffectsCompare(uint32_t PC, uint32_t Reg1, uint32_t Reg2);
|
||||
|
||||
/************************** Branch functions ************************/
|
||||
void CRecompilerOps::Compile_Branch (CRecompilerOps::BranchFunction CompareFunc, BRANCH_TYPE BranchType, bool Link)
|
||||
|
|
Loading…
Reference in New Issue