more bug fixes with ABL refactoring, mario now boots

This commit is contained in:
zilmar 2012-10-18 20:58:24 +11:00
parent 9ba2812062
commit e638b161f2
2 changed files with 70 additions and 64 deletions

View File

@ -190,7 +190,10 @@ bool CCodeBlock::CreateBlockLinkage ( CCodeSection * EnterSection )
{ {
CPU_Message(__FUNCTION__ ": SetContinueAddress TestPC = %X ContinuePC = %X",TestPC,ContinuePC); CPU_Message(__FUNCTION__ ": SetContinueAddress TestPC = %X ContinuePC = %X",TestPC,ContinuePC);
CurrentSection->SetContinueAddress(TestPC, ContinuePC); CurrentSection->SetContinueAddress(TestPC, ContinuePC);
SetSection(CurrentSection->m_ContinueSection, CurrentSection, ContinuePC,true,TestPC); if (!SetSection(CurrentSection->m_ContinueSection, CurrentSection, ContinuePC,true,TestPC))
{
ContinuePC = (DWORD)-1;
}
} }
if (LikelyBranch) if (LikelyBranch)
@ -498,13 +501,31 @@ bool CCodeBlock::AnalyzeInstruction ( DWORD PC, DWORD & TargetPC, DWORD & Contin
case R4300i_COP1_S: case R4300i_COP1_D: case R4300i_COP1_W: case R4300i_COP1_L: case R4300i_COP1_S: case R4300i_COP1_D: case R4300i_COP1_W: case R4300i_COP1_L:
break; break;
case R4300i_COP1_BC: case R4300i_COP1_BC:
TargetPC = PC + ((short)Command.offset << 2) + 4; switch (Command.ft) {
if (TargetPC == PC) case R4300i_COP1_BC_BCF:
{ case R4300i_COP1_BC_BCT:
TargetPC = PC + ((short)Command.offset << 2) + 4;
if (TargetPC == PC)
{
_Notify->BreakPoint(__FILE__,__LINE__);
}
ContinuePC = PC + 8;
IncludeDelaySlot = true;
break;
case R4300i_COP1_BC_BCFL:
case R4300i_COP1_BC_BCTL:
TargetPC = PC + ((short)Command.offset << 2) + 4;
if (TargetPC == PC)
{
_Notify->BreakPoint(__FILE__,__LINE__);
}
ContinuePC = PC + 8;
LikelyBranch = true;
IncludeDelaySlot = true;
break;
default:
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
} }
ContinuePC = PC + 8;
IncludeDelaySlot = true;
break; break;
default: default:
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
@ -534,6 +555,7 @@ bool CCodeBlock::AnalyzeInstruction ( DWORD PC, DWORD & TargetPC, DWORD & Contin
LikelyBranch = true; LikelyBranch = true;
break; break;
case R4300i_BNEL: case R4300i_BNEL:
case R4300i_BGTZL:
TargetPC = PC + ((short)Command.offset << 2) + 4; TargetPC = PC + ((short)Command.offset << 2) + 4;
if (TargetPC == PC) if (TargetPC == PC)
{ {

View File

@ -225,7 +225,9 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
case R4300i_REGIMM_BGEZ: case R4300i_REGIMM_BGEZ:
m_NextInstruction = DELAY_SLOT; m_NextInstruction = DELAY_SLOT;
#ifdef CHECKED_BUILD #ifdef CHECKED_BUILD
if (Section->m_Cont.TargetPC != m_PC + 8) if (Section->m_Cont.TargetPC != m_PC + 8 &&
Section->m_ContinueSection != NULL &&
Section->m_Cont.TargetPC != (DWORD)-1)
{ {
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
} }
@ -248,7 +250,9 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
case R4300i_REGIMM_BGEZL: case R4300i_REGIMM_BGEZL:
m_NextInstruction = LIKELY_DELAY_SLOT; m_NextInstruction = LIKELY_DELAY_SLOT;
#ifdef CHECKED_BUILD #ifdef CHECKED_BUILD
if (Section->m_Cont.TargetPC != m_PC + 8) if (Section->m_Cont.TargetPC != m_PC + 8 &&
Section->m_ContinueSection != NULL &&
Section->m_Cont.TargetPC != (DWORD)-1)
{ {
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
} }
@ -462,17 +466,9 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
m_Reg.MipsRegLo(m_Command.rt) = ((short)m_Command.offset << 16); m_Reg.MipsRegLo(m_Command.rt) = ((short)m_Command.offset << 16);
m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_CONST_32); m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_CONST_32);
break; break;
case R4300i_ANDI: case R4300i_ANDI:
if (m_Command.rt == 0) { break; } if (m_Command.rt == 0) { break; }
if (m_Command.rs == m_Command.rt) m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_UNKNOWN);
{
m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_UNKNOWN);
} else if (m_Reg.IsConst(m_Command.rs)) {
m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_CONST_32);
m_Reg.MipsRegLo(m_Command.rt) = m_Reg.MipsRegLo(m_Command.rs) & m_Command.immediate;
} else {
m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_UNKNOWN);
}
break; break;
case R4300i_ORI: case R4300i_ORI:
if (m_Command.rt == 0) { break; } if (m_Command.rt == 0) { break; }
@ -542,62 +538,50 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
case R4300i_COP1_BC_BCFL: case R4300i_COP1_BC_BCFL:
case R4300i_COP1_BC_BCTL: case R4300i_COP1_BC_BCTL:
m_NextInstruction = LIKELY_DELAY_SLOT; m_NextInstruction = LIKELY_DELAY_SLOT;
_Notify->BreakPoint(__FILE__,__LINE__); #ifdef CHECKED_BUILD
#ifdef tofix if (Section->m_Cont.TargetPC != m_PC + 8 &&
Section->m_Cont.TargetPC = m_PC + 8; Section->m_ContinueSection != NULL &&
Section->m_Jump.TargetPC = m_PC + ((short)m_Command.offset << 2) + 4; Section->m_Cont.TargetPC != (DWORD)-1)
if (m_PC == Section->m_Jump.TargetPC) { {
int EffectDelaySlot; _Notify->BreakPoint(__FILE__,__LINE__);
OPCODE NewCommand; }
if (m_PC == m_PC + ((short)m_Command.offset << 2) + 4)
if (!_MMU->LW_VAddr(m_PC + 4, NewCommand.Hex)) { {
_Notify->DisplayError(GS(MSG_FAIL_LOAD_WORD)); _Notify->BreakPoint(__FILE__,__LINE__);
ExitThread(0); #ifdef tofix
} if (!DelaySlotEffectsCompare(m_PC,m_Command.rs,m_Command.rt))
{
EffectDelaySlot = false; if (!Section->m_Jump.PermLoop)
if (NewCommand.op == R4300i_CP1) { {
if (NewCommand.fmt == R4300i_COP1_S && (NewCommand.funct & 0x30) == 0x30 ) { _Notify->BreakPoint(__FILE__,__LINE__);
EffectDelaySlot = true; }
}
if (NewCommand.fmt == R4300i_COP1_D && (NewCommand.funct & 0x30) == 0x30 ) {
EffectDelaySlot = true;
}
}
if (!EffectDelaySlot) {
Section->m_Jump.PermLoop = true;
} }
#endif
} }
#endif #endif
break; break;
case R4300i_COP1_BC_BCF: case R4300i_COP1_BC_BCF:
case R4300i_COP1_BC_BCT: case R4300i_COP1_BC_BCT:
m_NextInstruction = DELAY_SLOT; m_NextInstruction = DELAY_SLOT;
_Notify->BreakPoint(__FILE__,__LINE__); #ifdef CHECKED_BUILD
if (Section->m_Cont.TargetPC != m_PC + 8 &&
Section->m_ContinueSection != NULL &&
Section->m_Cont.TargetPC != (DWORD)-1)
{
_Notify->BreakPoint(__FILE__,__LINE__);
}
if (Section->m_Jump.TargetPC != m_PC + ((short)m_Command.offset << 2) + 4)
{
_Notify->BreakPoint(__FILE__,__LINE__);
}
if (m_PC == Section->m_Jump.TargetPC)
{
_Notify->BreakPoint(__FILE__,__LINE__);
#ifdef tofix #ifdef tofix
Section->m_Cont.TargetPC = m_PC + 8; if (!DelaySlotEffectsCompare(m_PC,m_Command.rs,m_Command.rt)) {
Section->m_Jump.TargetPC = m_PC + ((short)m_Command.offset << 2) + 4;
if (m_PC == Section->m_Jump.TargetPC) {
int EffectDelaySlot;
OPCODE NewCommand;
if (!_MMU->LW_VAddr(m_PC + 4, NewCommand.Hex)) {
_Notify->DisplayError(GS(MSG_FAIL_LOAD_WORD));
ExitThread(0);
}
EffectDelaySlot = false;
if (NewCommand.op == R4300i_CP1) {
if (NewCommand.fmt == R4300i_COP1_S && (NewCommand.funct & 0x30) == 0x30 ) {
EffectDelaySlot = true;
}
if (NewCommand.fmt == R4300i_COP1_D && (NewCommand.funct & 0x30) == 0x30 ) {
EffectDelaySlot = true;
}
}
if (!EffectDelaySlot) {
Section->m_Jump.PermLoop = true; Section->m_Jump.PermLoop = true;
} }
#endif
} }
#endif #endif
break; break;