more bug fixes with ABL refactoring, mario now boots
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9ba2812062
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e638b161f2
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@ -190,7 +190,10 @@ bool CCodeBlock::CreateBlockLinkage ( CCodeSection * EnterSection )
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{
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CPU_Message(__FUNCTION__ ": SetContinueAddress TestPC = %X ContinuePC = %X",TestPC,ContinuePC);
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CurrentSection->SetContinueAddress(TestPC, ContinuePC);
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SetSection(CurrentSection->m_ContinueSection, CurrentSection, ContinuePC,true,TestPC);
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if (!SetSection(CurrentSection->m_ContinueSection, CurrentSection, ContinuePC,true,TestPC))
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{
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ContinuePC = (DWORD)-1;
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}
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}
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if (LikelyBranch)
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@ -498,13 +501,31 @@ bool CCodeBlock::AnalyzeInstruction ( DWORD PC, DWORD & TargetPC, DWORD & Contin
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case R4300i_COP1_S: case R4300i_COP1_D: case R4300i_COP1_W: case R4300i_COP1_L:
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break;
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case R4300i_COP1_BC:
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TargetPC = PC + ((short)Command.offset << 2) + 4;
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if (TargetPC == PC)
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{
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switch (Command.ft) {
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case R4300i_COP1_BC_BCF:
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case R4300i_COP1_BC_BCT:
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TargetPC = PC + ((short)Command.offset << 2) + 4;
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if (TargetPC == PC)
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{
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_Notify->BreakPoint(__FILE__,__LINE__);
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}
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ContinuePC = PC + 8;
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IncludeDelaySlot = true;
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break;
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case R4300i_COP1_BC_BCFL:
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case R4300i_COP1_BC_BCTL:
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TargetPC = PC + ((short)Command.offset << 2) + 4;
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if (TargetPC == PC)
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{
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_Notify->BreakPoint(__FILE__,__LINE__);
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}
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ContinuePC = PC + 8;
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LikelyBranch = true;
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IncludeDelaySlot = true;
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break;
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default:
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_Notify->BreakPoint(__FILE__,__LINE__);
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}
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ContinuePC = PC + 8;
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IncludeDelaySlot = true;
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break;
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default:
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_Notify->BreakPoint(__FILE__,__LINE__);
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@ -534,6 +555,7 @@ bool CCodeBlock::AnalyzeInstruction ( DWORD PC, DWORD & TargetPC, DWORD & Contin
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LikelyBranch = true;
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break;
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case R4300i_BNEL:
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case R4300i_BGTZL:
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TargetPC = PC + ((short)Command.offset << 2) + 4;
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if (TargetPC == PC)
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{
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@ -225,7 +225,9 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
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case R4300i_REGIMM_BGEZ:
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m_NextInstruction = DELAY_SLOT;
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#ifdef CHECKED_BUILD
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if (Section->m_Cont.TargetPC != m_PC + 8)
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if (Section->m_Cont.TargetPC != m_PC + 8 &&
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Section->m_ContinueSection != NULL &&
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Section->m_Cont.TargetPC != (DWORD)-1)
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{
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_Notify->BreakPoint(__FILE__,__LINE__);
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}
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@ -248,7 +250,9 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
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case R4300i_REGIMM_BGEZL:
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m_NextInstruction = LIKELY_DELAY_SLOT;
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#ifdef CHECKED_BUILD
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if (Section->m_Cont.TargetPC != m_PC + 8)
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if (Section->m_Cont.TargetPC != m_PC + 8 &&
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Section->m_ContinueSection != NULL &&
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Section->m_Cont.TargetPC != (DWORD)-1)
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{
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_Notify->BreakPoint(__FILE__,__LINE__);
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}
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@ -462,17 +466,9 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
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m_Reg.MipsRegLo(m_Command.rt) = ((short)m_Command.offset << 16);
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m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_CONST_32);
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break;
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case R4300i_ANDI:
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case R4300i_ANDI:
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if (m_Command.rt == 0) { break; }
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if (m_Command.rs == m_Command.rt)
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{
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m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_UNKNOWN);
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} else if (m_Reg.IsConst(m_Command.rs)) {
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m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_CONST_32);
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m_Reg.MipsRegLo(m_Command.rt) = m_Reg.MipsRegLo(m_Command.rs) & m_Command.immediate;
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} else {
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m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_UNKNOWN);
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}
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m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_UNKNOWN);
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break;
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case R4300i_ORI:
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if (m_Command.rt == 0) { break; }
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@ -542,62 +538,50 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
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case R4300i_COP1_BC_BCFL:
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case R4300i_COP1_BC_BCTL:
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m_NextInstruction = LIKELY_DELAY_SLOT;
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_Notify->BreakPoint(__FILE__,__LINE__);
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#ifdef tofix
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Section->m_Cont.TargetPC = m_PC + 8;
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Section->m_Jump.TargetPC = m_PC + ((short)m_Command.offset << 2) + 4;
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if (m_PC == Section->m_Jump.TargetPC) {
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int EffectDelaySlot;
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OPCODE NewCommand;
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if (!_MMU->LW_VAddr(m_PC + 4, NewCommand.Hex)) {
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_Notify->DisplayError(GS(MSG_FAIL_LOAD_WORD));
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ExitThread(0);
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}
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EffectDelaySlot = false;
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if (NewCommand.op == R4300i_CP1) {
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if (NewCommand.fmt == R4300i_COP1_S && (NewCommand.funct & 0x30) == 0x30 ) {
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EffectDelaySlot = true;
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}
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if (NewCommand.fmt == R4300i_COP1_D && (NewCommand.funct & 0x30) == 0x30 ) {
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EffectDelaySlot = true;
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}
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}
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if (!EffectDelaySlot) {
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Section->m_Jump.PermLoop = true;
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#ifdef CHECKED_BUILD
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if (Section->m_Cont.TargetPC != m_PC + 8 &&
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Section->m_ContinueSection != NULL &&
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Section->m_Cont.TargetPC != (DWORD)-1)
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{
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_Notify->BreakPoint(__FILE__,__LINE__);
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}
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if (m_PC == m_PC + ((short)m_Command.offset << 2) + 4)
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{
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_Notify->BreakPoint(__FILE__,__LINE__);
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#ifdef tofix
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if (!DelaySlotEffectsCompare(m_PC,m_Command.rs,m_Command.rt))
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{
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if (!Section->m_Jump.PermLoop)
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{
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_Notify->BreakPoint(__FILE__,__LINE__);
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}
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}
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#endif
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}
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#endif
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break;
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case R4300i_COP1_BC_BCF:
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case R4300i_COP1_BC_BCT:
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m_NextInstruction = DELAY_SLOT;
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_Notify->BreakPoint(__FILE__,__LINE__);
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#ifdef CHECKED_BUILD
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if (Section->m_Cont.TargetPC != m_PC + 8 &&
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Section->m_ContinueSection != NULL &&
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Section->m_Cont.TargetPC != (DWORD)-1)
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{
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_Notify->BreakPoint(__FILE__,__LINE__);
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}
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if (Section->m_Jump.TargetPC != m_PC + ((short)m_Command.offset << 2) + 4)
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{
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_Notify->BreakPoint(__FILE__,__LINE__);
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}
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if (m_PC == Section->m_Jump.TargetPC)
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{
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_Notify->BreakPoint(__FILE__,__LINE__);
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#ifdef tofix
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Section->m_Cont.TargetPC = m_PC + 8;
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Section->m_Jump.TargetPC = m_PC + ((short)m_Command.offset << 2) + 4;
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if (m_PC == Section->m_Jump.TargetPC) {
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int EffectDelaySlot;
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OPCODE NewCommand;
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if (!_MMU->LW_VAddr(m_PC + 4, NewCommand.Hex)) {
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_Notify->DisplayError(GS(MSG_FAIL_LOAD_WORD));
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ExitThread(0);
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}
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EffectDelaySlot = false;
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if (NewCommand.op == R4300i_CP1) {
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if (NewCommand.fmt == R4300i_COP1_S && (NewCommand.funct & 0x30) == 0x30 ) {
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EffectDelaySlot = true;
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}
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if (NewCommand.fmt == R4300i_COP1_D && (NewCommand.funct & 0x30) == 0x30 ) {
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EffectDelaySlot = true;
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}
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}
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if (!EffectDelaySlot) {
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if (!DelaySlotEffectsCompare(m_PC,m_Command.rs,m_Command.rt)) {
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Section->m_Jump.PermLoop = true;
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}
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#endif
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}
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#endif
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break;
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