[Project64] Add Load32PeripheralInterface, Load32RDRAMInterface
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9778846ae8
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e3caeb8b07
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@ -2535,37 +2535,12 @@ bool CMipsMemoryVM::LW_NonMemory(uint32_t PAddr, uint32_t* Value)
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*Value = m_MemLookupValue.UW[0];
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break;
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case 0x04600000:
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switch (PAddr)
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{
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case 0x04600010: *Value = g_Reg->PI_STATUS_REG; break;
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case 0x04600014: *Value = g_Reg->PI_DOMAIN1_REG; break;
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case 0x04600018: *Value = g_Reg->PI_BSD_DOM1_PWD_REG; break;
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case 0x0460001C: *Value = g_Reg->PI_BSD_DOM1_PGS_REG; break;
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case 0x04600020: *Value = g_Reg->PI_BSD_DOM1_RLS_REG; break;
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case 0x04600024: *Value = g_Reg->PI_DOMAIN2_REG; break;
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case 0x04600028: *Value = g_Reg->PI_BSD_DOM2_PWD_REG; break;
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case 0x0460002C: *Value = g_Reg->PI_BSD_DOM2_PGS_REG; break;
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case 0x04600030: *Value = g_Reg->PI_BSD_DOM2_RLS_REG; break;
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default:
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*Value = 0;
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return false;
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}
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Load32PeripheralInterface();
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*Value = m_MemLookupValue.UW[0];
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break;
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case 0x04700000:
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switch (PAddr)
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{
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case 0x04700000: *Value = g_Reg->RI_MODE_REG; break;
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case 0x04700004: *Value = g_Reg->RI_CONFIG_REG; break;
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case 0x04700008: *Value = g_Reg->RI_CURRENT_LOAD_REG; break;
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case 0x0470000C: *Value = g_Reg->RI_SELECT_REG; break;
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case 0x04700010: *Value = g_Reg->RI_REFRESH_REG; break;
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case 0x04700014: *Value = g_Reg->RI_LATENCY_REG; break;
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case 0x04700018: *Value = g_Reg->RI_RERROR_REG; break;
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case 0x0470001C: *Value = g_Reg->RI_WERROR_REG; break;
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default:
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*Value = 0;
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return false;
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}
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Load32RDRAMInterface();
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*Value = m_MemLookupValue.UW[0];
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break;
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case 0x04800000:
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switch (PAddr)
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@ -2706,7 +2681,7 @@ bool CMipsMemoryVM::SH_NonMemory(uint32_t PAddr, uint16_t Value)
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break;
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default:
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return false;
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}
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}
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return true;
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}
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@ -2726,7 +2701,7 @@ bool CMipsMemoryVM::SW_NonMemory(uint32_t PAddr, uint32_t Value)
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}
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#endif
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//LogMessage("%X: Wrote To Rom %08X from %08X",PROGRAM_COUNTER,Value,PAddr);
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}
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}
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else
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{
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return false;
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@ -3326,7 +3301,7 @@ bool CMipsMemoryVM::SW_NonMemory(uint32_t PAddr, uint32_t Value)
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}
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return true;
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}
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}
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void CMipsMemoryVM::UpdateHalfLine()
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{
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@ -5681,3 +5656,46 @@ void CMipsMemoryVM::Load32AudioInterface(void)
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}
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}
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}
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void CMipsMemoryVM::Load32PeripheralInterface(void)
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{
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switch (m_MemLookupAddress & 0x1FFFFFFF)
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{
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case 0x04600010: m_MemLookupValue.UW[0] = g_Reg->PI_STATUS_REG; break;
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case 0x04600014: m_MemLookupValue.UW[0] = g_Reg->PI_DOMAIN1_REG; break;
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case 0x04600018: m_MemLookupValue.UW[0] = g_Reg->PI_BSD_DOM1_PWD_REG; break;
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case 0x0460001C: m_MemLookupValue.UW[0] = g_Reg->PI_BSD_DOM1_PGS_REG; break;
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case 0x04600020: m_MemLookupValue.UW[0] = g_Reg->PI_BSD_DOM1_RLS_REG; break;
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case 0x04600024: m_MemLookupValue.UW[0] = g_Reg->PI_DOMAIN2_REG; break;
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case 0x04600028: m_MemLookupValue.UW[0] = g_Reg->PI_BSD_DOM2_PWD_REG; break;
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case 0x0460002C: m_MemLookupValue.UW[0] = g_Reg->PI_BSD_DOM2_PGS_REG; break;
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case 0x04600030: m_MemLookupValue.UW[0] = g_Reg->PI_BSD_DOM2_RLS_REG; break;
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default:
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m_MemLookupValue.UW[0] = 0;
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if (bHaveDebugger())
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}
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}
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void CMipsMemoryVM::Load32RDRAMInterface(void)
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{
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switch (m_MemLookupAddress & 0x1FFFFFFF)
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{
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case 0x04700000: m_MemLookupValue.UW[0] = g_Reg->RI_MODE_REG; break;
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case 0x04700004: m_MemLookupValue.UW[0] = g_Reg->RI_CONFIG_REG; break;
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case 0x04700008: m_MemLookupValue.UW[0] = g_Reg->RI_CURRENT_LOAD_REG; break;
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case 0x0470000C: m_MemLookupValue.UW[0] = g_Reg->RI_SELECT_REG; break;
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case 0x04700010: m_MemLookupValue.UW[0] = g_Reg->RI_REFRESH_REG; break;
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case 0x04700014: m_MemLookupValue.UW[0] = g_Reg->RI_LATENCY_REG; break;
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case 0x04700018: m_MemLookupValue.UW[0] = g_Reg->RI_RERROR_REG; break;
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case 0x0470001C: m_MemLookupValue.UW[0] = g_Reg->RI_WERROR_REG; break;
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default:
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m_MemLookupValue.UW[0] = 0;
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if (bHaveDebugger())
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}
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}
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@ -188,6 +188,8 @@ private:
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static void Load32MIPSInterface(void);
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static void Load32VideoInterface(void);
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static void Load32AudioInterface(void);
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static void Load32PeripheralInterface(void);
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static void Load32RDRAMInterface(void);
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CMipsMemory_CallBack * const m_CBClass;
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