Core: Move Serial interface into handler
This commit is contained in:
parent
c28bc27c27
commit
e1d3222a8a
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@ -33,79 +33,16 @@ void CLogging::Log_LW(uint32_t PC, uint32_t VAddr)
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}
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}
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uint32_t Value;
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uint32_t Value;
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if (VAddr >= 0xA0000000 && VAddr < (0xA0000000 + g_MMU->RdramSize()))
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if ((VAddr >= 0xA0000000 && VAddr < (0xA0000000 + g_MMU->RdramSize())) ||
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{
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(VAddr >= 0xA3F00000 && VAddr <= 0xA3F00024) ||
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return;
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(VAddr >= 0xA4000000 && VAddr <= 0xA4001FFC) ||
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}
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(VAddr == 0xA4080000) ||
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if (VAddr >= 0xA3F00000 && VAddr <= 0xA3F00024)
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(VAddr >= 0xA4100000 && VAddr <= 0xA410001C) ||
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{
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(VAddr >= 0xA4300000 && VAddr <= 0xA430000C) ||
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return;
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(VAddr >= 0xA4400000 && VAddr <= 0xA4400034) ||
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}
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(VAddr >= 0xA4500000 && VAddr <= 0xA4500014) ||
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if (VAddr >= 0xA4000000 && VAddr <= 0xA4001FFC)
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(VAddr == 0xA4800000 && VAddr <= 0xA4800018) ||
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{
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(VAddr >= 0xBFC00000 && VAddr <= 0xBFC007C0))
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return;
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}
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if (VAddr == 0xA4080000)
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{
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return;
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}
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if (VAddr >= 0xA4100000 && VAddr <= 0xA410001C)
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{
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return;
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}
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if (VAddr >= 0xA4300000 && VAddr <= 0xA430000C)
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{
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return;
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}
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if (VAddr >= 0xA4400000 && VAddr <= 0xA4400034)
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{
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return;
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}
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if (VAddr >= 0xA4500000 && VAddr <= 0xA4500014)
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{
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return;
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}
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if (VAddr == 0xA4800000)
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{
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if (!LogSerialInterface())
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{
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return;
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}
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g_MMU->LW_VAddr(VAddr, Value);
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LogMessage("%08X: read from SI_DRAM_ADDR_REG (%08X)", PC, Value);
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return;
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}
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if (VAddr == 0xA4800004)
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{
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if (!LogSerialInterface())
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{
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return;
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}
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g_MMU->LW_VAddr(VAddr, Value);
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LogMessage("%08X: read from SI_PIF_ADDR_RD64B_REG (%08X)", PC, Value);
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return;
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}
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if (VAddr == 0xA4800010)
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{
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if (!LogSerialInterface())
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{
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return;
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}
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g_MMU->LW_VAddr(VAddr, Value);
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LogMessage("%08X: read from SI_PIF_ADDR_WR64B_REG (%08X)", PC, Value);
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return;
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}
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if (VAddr == 0xA4800018)
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{
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if (!LogSerialInterface())
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{
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return;
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}
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g_MMU->LW_VAddr(VAddr, Value);
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LogMessage("%08X: read from SI_STATUS_REG (%08X)", PC, Value);
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return;
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}
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if (VAddr >= 0xBFC00000 && VAddr <= 0xBFC007C0)
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{
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{
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return;
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return;
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}
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}
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@ -170,31 +107,16 @@ void CLogging::Log_SW(uint32_t PC, uint32_t VAddr, uint32_t Value)
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VAddr = PAddr + 0xA0000000;
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VAddr = PAddr + 0xA0000000;
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}
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}
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if (VAddr >= 0xA0000000 && VAddr < (0xA0000000 + g_MMU->RdramSize()))
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if ((VAddr >= 0xA0000000 && VAddr < (0xA0000000 + g_MMU->RdramSize())) ||
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{
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(VAddr >= 0xA3F00000 && VAddr <= 0xA3F00024) ||
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return;
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(VAddr >= 0xA4000000 && VAddr <= 0xA4001FFC) ||
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}
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(VAddr >= 0xA4040000 && VAddr <= 0xA404001C) ||
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if (VAddr >= 0xA3F00000 && VAddr <= 0xA3F00024)
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(VAddr == 0xA4080000) ||
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{
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(VAddr >= 0xA4100000 && VAddr <= 0xA410001C))
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}
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if (VAddr >= 0xA4000000 && VAddr <= 0xA4001FFC)
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{
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{
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return;
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return;
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}
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}
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if (VAddr >= 0xA4040000 && VAddr <= 0xA404001C)
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{
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return;
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}
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if (VAddr == 0xA4080000)
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{
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return;
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}
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if (VAddr >= 0xA4100000 && VAddr <= 0xA410001C)
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{
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return;
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}
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if (VAddr >= 0xA4200000 && VAddr <= 0xA420000C)
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if (VAddr >= 0xA4200000 && VAddr <= 0xA420000C)
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{
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{
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@ -213,52 +135,12 @@ void CLogging::Log_SW(uint32_t PC, uint32_t VAddr, uint32_t Value)
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if ((VAddr >= 0xA4300000 && VAddr <= 0xA430000C) ||
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if ((VAddr >= 0xA4300000 && VAddr <= 0xA430000C) ||
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(VAddr >= 0xA4400000 && VAddr <= 0xA4400034) ||
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(VAddr >= 0xA4400000 && VAddr <= 0xA4400034) ||
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(VAddr >= 0xA4500000 && VAddr <= 0xA4500014))
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(VAddr >= 0xA4500000 && VAddr <= 0xA4500014) ||
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(VAddr >= 0xA4800000 && VAddr <= 0xA4800018))
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{
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{
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return;
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return;
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}
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}
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if (VAddr == 0xA4800000)
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{
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if (!LogSerialInterface())
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{
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return;
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}
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LogMessage("%08X: Writing 0x%08X to SI_DRAM_ADDR_REG", PC, Value); return;
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}
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if (VAddr == 0xA4800004)
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{
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if (LogPRDMAOperations())
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{
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LogMessage("%08X: A DMA transfer from the PIF RAM has occurred", PC);
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}
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if (!LogSerialInterface())
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{
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return;
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}
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LogMessage("%08X: Writing 0x%08X to SI_PIF_ADDR_RD64B_REG", PC, Value); return;
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}
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if (VAddr == 0xA4800010)
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{
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if (LogPRDMAOperations())
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{
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LogMessage("%08X: A DMA transfer to the PIF RAM has occurred", PC);
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}
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if (!LogSerialInterface())
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{
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return;
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}
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LogMessage("%08X: Writing 0x%08X to SI_PIF_ADDR_WR64B_REG", PC, Value); return;
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}
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if (VAddr == 0xA4800018)
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{
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if (!LogSerialInterface())
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{
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return;
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}
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LogMessage("%08X: Writing 0x%08X to SI_STATUS_REG", PC, Value); return;
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}
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if (VAddr >= 0xBFC007C0 && VAddr <= 0xBFC007FC)
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if (VAddr >= 0xBFC007C0 && VAddr <= 0xBFC007FC)
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{
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{
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if (!LogPRDirectMemStores())
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if (!LogPRDirectMemStores())
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@ -14,7 +14,7 @@ enum
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class AudioInterfaceReg
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class AudioInterfaceReg
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{
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{
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protected:
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protected:
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AudioInterfaceReg(uint32_t * _AudioInterface);
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AudioInterfaceReg(uint32_t * Interface);
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public:
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public:
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uint32_t & AI_DRAM_ADDR_REG;
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uint32_t & AI_DRAM_ADDR_REG;
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@ -0,0 +1,108 @@
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#include "stdafx.h"
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#include "SerialInterfaceHandler.h"
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#include <Project64-core\N64System\Mips\MemoryVirtualMem.h>
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#include <Project64-core\N64System\Mips\Register.h>
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#include <Project64-core\N64System\SystemGlobals.h>
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SerialInterfaceReg::SerialInterfaceReg(uint32_t * Interface) :
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SI_DRAM_ADDR_REG(Interface[0]),
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SI_PIF_ADDR_RD64B_REG(Interface[1]),
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SI_PIF_ADDR_WR64B_REG(Interface[2]),
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SI_STATUS_REG(Interface[3])
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{
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}
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SerialInterfaceHandler::SerialInterfaceHandler(CMipsMemoryVM & MMU, CRegisters & Reg) :
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SerialInterfaceReg(Reg.m_SerialInterface),
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MIPSInterfaceReg(Reg.m_Mips_Interface),
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m_MMU(MMU),
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m_Reg(Reg),
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m_PC(Reg.m_PROGRAM_COUNTER)
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{
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}
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bool SerialInterfaceHandler::Read32(uint32_t Address, uint32_t & Value)
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{
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switch (Address & 0x1FFFFFFF)
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{
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case 0x04800018: Value = SI_STATUS_REG; break;
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default:
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Value = 0;
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if (HaveDebugger())
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}
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if (LogSerialInterface())
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{
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switch (Address & 0x1FFFFFFF)
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{
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case 0x04800000: LogMessage("%08X: read from SI_DRAM_ADDR_REG (%08X)", m_PC, Value); break;
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case 0x04800004: LogMessage("%08X: read from SI_PIF_ADDR_RD64B_REG (%08X)", m_PC, Value); break;
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case 0xA4800010: LogMessage("%08X: read from SI_PIF_ADDR_WR64B_REG (%08X)", m_PC, Value); break;
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case 0x04800018: LogMessage("%08X: read from SI_STATUS_REG (%08X)", m_PC, Value); break;
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default:
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if (HaveDebugger())
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}
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}
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return true;
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}
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bool SerialInterfaceHandler::Write32(uint32_t Address, uint32_t Value, uint32_t Mask)
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{
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if (GenerateLog())
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{
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if (LogSerialInterface())
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{
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switch (Address & 0x1FFFFFFF)
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{
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case 0x04800000: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SI_DRAM_ADDR_REG", m_PC, Value, Mask); break;
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case 0x04800004: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SI_PIF_ADDR_RD64B_REG", m_PC, Value, Mask); break;
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case 0x04800010: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SI_PIF_ADDR_WR64B_REG", m_PC, Value, Mask); break;
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case 0x04800018: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SI_STATUS_REG", m_PC, Value, Mask); break;
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default:
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if (HaveDebugger())
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}
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}
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if (LogPRDMAOperations())
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{
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switch (Address & 0x1FFFFFFF)
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{
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case 0x04800004: LogMessage("%08X: A DMA transfer from the PIF RAM has occurred", m_PC); break;
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case 0x04800010: LogMessage("%08X: A DMA transfer to the PIF RAM has occurred", m_PC); break;
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}
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}
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}
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uint32_t MaskedValue = Value & Mask;
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switch (Address & 0x1FFFFFFF)
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{
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case 0x04800000: SI_DRAM_ADDR_REG = (SI_DRAM_ADDR_REG & ~Mask) | (MaskedValue); break;
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case 0x04800004:
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SI_PIF_ADDR_RD64B_REG = (SI_PIF_ADDR_RD64B_REG & ~Mask) | (MaskedValue);
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m_MMU.SI_DMA_READ();
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break;
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case 0x04800010:
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SI_PIF_ADDR_WR64B_REG = (SI_PIF_ADDR_WR64B_REG & ~Mask) | (MaskedValue);
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m_MMU.SI_DMA_WRITE();
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break;
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case 0x04800018:
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MI_INTR_REG &= ~MI_INTR_SI;
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m_Reg.SI_STATUS_REG &= ~SI_STATUS_INTERRUPT;
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m_Reg.CheckInterrupts();
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break;
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default:
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if (HaveDebugger())
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}
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return true;
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}
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@ -0,0 +1,57 @@
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#pragma once
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#include "MemoryHandler.h"
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#include "MIPSInterfaceHandler.h"
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#include <Project64-core\Settings\DebugSettings.h>
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#include <Project64-core\Logging.h>
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#include <stdint.h>
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enum
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{
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SI_STATUS_DMA_BUSY = 0x0001,
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SI_STATUS_RD_BUSY = 0x0002,
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SI_STATUS_DMA_ERROR = 0x0008,
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SI_STATUS_INTERRUPT = 0x1000,
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};
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class SerialInterfaceReg
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{
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protected:
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SerialInterfaceReg(uint32_t * Interface);
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public:
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uint32_t & SI_DRAM_ADDR_REG;
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uint32_t & SI_PIF_ADDR_RD64B_REG;
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uint32_t & SI_PIF_ADDR_WR64B_REG;
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uint32_t & SI_STATUS_REG;
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private:
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SerialInterfaceReg();
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SerialInterfaceReg(const SerialInterfaceReg&);
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SerialInterfaceReg& operator=(const SerialInterfaceReg&);
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};
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class CMipsMemoryVM;
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class CRegisters;
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class SerialInterfaceHandler :
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public MemoryHandler,
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public SerialInterfaceReg,
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private MIPSInterfaceReg,
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private CDebugSettings,
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private CLogging
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{
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public:
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SerialInterfaceHandler(CMipsMemoryVM & MMU, CRegisters & Reg);
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bool Read32(uint32_t Address, uint32_t & Value);
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bool Write32(uint32_t Address, uint32_t Value, uint32_t Mask);
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private:
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SerialInterfaceHandler();
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SerialInterfaceHandler(const SerialInterfaceHandler &);
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SerialInterfaceHandler & operator=(const SerialInterfaceHandler &);
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CMipsMemoryVM & m_MMU;
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CRegisters & m_Reg;
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uint32_t & m_PC;
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};
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@ -34,6 +34,7 @@ CMipsMemoryVM::CMipsMemoryVM(CN64System & System, bool SavesReadOnly) :
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m_MIPSInterfaceHandler(System.m_Reg),
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m_MIPSInterfaceHandler(System.m_Reg),
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m_PeripheralInterfaceHandler(*this, System.m_Reg),
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m_PeripheralInterfaceHandler(*this, System.m_Reg),
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m_RDRAMInterfaceHandler(System.m_Reg),
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m_RDRAMInterfaceHandler(System.m_Reg),
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m_SerialInterfaceHandler(*this, System.m_Reg),
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m_SPRegistersHandler(System, *this, System.m_Reg),
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m_SPRegistersHandler(System, *this, System.m_Reg),
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m_VideoInterfaceHandler(System, *this, System.m_Reg),
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m_VideoInterfaceHandler(System, *this, System.m_Reg),
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m_Rom(nullptr),
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m_Rom(nullptr),
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@ -649,7 +650,7 @@ bool CMipsMemoryVM::LW_NonMemory(uint32_t PAddr, uint32_t* Value)
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case 0x04500000: m_AudioInterfaceHandler.Read32(PAddr, m_MemLookupValue.UW[0]); break;
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case 0x04500000: m_AudioInterfaceHandler.Read32(PAddr, m_MemLookupValue.UW[0]); break;
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case 0x04600000: m_PeripheralInterfaceHandler.Read32(PAddr, m_MemLookupValue.UW[0]); break;
|
case 0x04600000: m_PeripheralInterfaceHandler.Read32(PAddr, m_MemLookupValue.UW[0]); break;
|
||||||
case 0x04700000: m_RDRAMInterfaceHandler.Read32(PAddr, m_MemLookupValue.UW[0]); break;
|
case 0x04700000: m_RDRAMInterfaceHandler.Read32(PAddr, m_MemLookupValue.UW[0]); break;
|
||||||
case 0x04800000: Load32SerialInterface(); break;
|
case 0x04800000: m_SerialInterfaceHandler.Read32(PAddr, m_MemLookupValue.UW[0]); break;
|
||||||
case 0x05000000: Load32CartridgeDomain2Address1(); break;
|
case 0x05000000: Load32CartridgeDomain2Address1(); break;
|
||||||
case 0x06000000: Load32CartridgeDomain1Address1(); break;
|
case 0x06000000: Load32CartridgeDomain1Address1(); break;
|
||||||
case 0x08000000: Load32CartridgeDomain2Address2(); break;
|
case 0x08000000: Load32CartridgeDomain2Address2(); break;
|
||||||
|
@ -1086,20 +1087,6 @@ void CMipsMemoryVM::ChangeMiIntrMask()
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void CMipsMemoryVM::Load32SerialInterface(void)
|
|
||||||
{
|
|
||||||
switch (m_MemLookupAddress & 0x1FFFFFFF)
|
|
||||||
{
|
|
||||||
case 0x04800018: m_MemLookupValue.UW[0] = g_Reg->SI_STATUS_REG; break;
|
|
||||||
default:
|
|
||||||
m_MemLookupValue.UW[0] = 0;
|
|
||||||
if (HaveDebugger())
|
|
||||||
{
|
|
||||||
g_Notify->BreakPoint(__FILE__, __LINE__);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
void CMipsMemoryVM::Load32CartridgeDomain1Address1(void)
|
void CMipsMemoryVM::Load32CartridgeDomain1Address1(void)
|
||||||
{
|
{
|
||||||
// 64DD IPL ROM
|
// 64DD IPL ROM
|
||||||
|
|
|
@ -45,7 +45,7 @@ class CArmRecompilerOps;
|
||||||
class CMipsMemoryVM :
|
class CMipsMemoryVM :
|
||||||
public CTransVaddr,
|
public CTransVaddr,
|
||||||
private R4300iOp,
|
private R4300iOp,
|
||||||
private CPifRam,
|
public CPifRam,
|
||||||
private CFlashram,
|
private CFlashram,
|
||||||
private CSram,
|
private CSram,
|
||||||
public CDMA,
|
public CDMA,
|
||||||
|
@ -140,7 +140,6 @@ private:
|
||||||
bool SH_NonMemory(uint32_t PAddr, uint16_t Value);
|
bool SH_NonMemory(uint32_t PAddr, uint16_t Value);
|
||||||
bool SW_NonMemory(uint32_t PAddr, uint32_t Value);
|
bool SW_NonMemory(uint32_t PAddr, uint32_t Value);
|
||||||
|
|
||||||
static void Load32SerialInterface(void);
|
|
||||||
static void Load32CartridgeDomain1Address1(void);
|
static void Load32CartridgeDomain1Address1(void);
|
||||||
static void Load32CartridgeDomain1Address3(void);
|
static void Load32CartridgeDomain1Address3(void);
|
||||||
static void Load32CartridgeDomain2Address1(void);
|
static void Load32CartridgeDomain2Address1(void);
|
||||||
|
@ -184,6 +183,7 @@ private:
|
||||||
PeripheralInterfaceHandler m_PeripheralInterfaceHandler;
|
PeripheralInterfaceHandler m_PeripheralInterfaceHandler;
|
||||||
RDRAMInterfaceHandler m_RDRAMInterfaceHandler;
|
RDRAMInterfaceHandler m_RDRAMInterfaceHandler;
|
||||||
RDRAMRegistersHandler m_RDRAMRegistersHandler;
|
RDRAMRegistersHandler m_RDRAMRegistersHandler;
|
||||||
|
SerialInterfaceHandler m_SerialInterfaceHandler;
|
||||||
SPRegistersHandler m_SPRegistersHandler;
|
SPRegistersHandler m_SPRegistersHandler;
|
||||||
VideoInterfaceHandler m_VideoInterfaceHandler;
|
VideoInterfaceHandler m_VideoInterfaceHandler;
|
||||||
uint8_t * m_RDRAM, *m_DMEM, *m_IMEM;
|
uint8_t * m_RDRAM, *m_DMEM, *m_IMEM;
|
||||||
|
|
|
@ -87,14 +87,6 @@ DisplayControlReg::DisplayControlReg(uint32_t * _DisplayProcessor) :
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
Serial_InterfaceReg::Serial_InterfaceReg(uint32_t * SerialInterface) :
|
|
||||||
SI_DRAM_ADDR_REG(SerialInterface[0]),
|
|
||||||
SI_PIF_ADDR_RD64B_REG(SerialInterface[1]),
|
|
||||||
SI_PIF_ADDR_WR64B_REG(SerialInterface[2]),
|
|
||||||
SI_STATUS_REG(SerialInterface[3])
|
|
||||||
{
|
|
||||||
}
|
|
||||||
|
|
||||||
Disk_InterfaceReg::Disk_InterfaceReg(uint32_t * DiskInterface) :
|
Disk_InterfaceReg::Disk_InterfaceReg(uint32_t * DiskInterface) :
|
||||||
ASIC_DATA(DiskInterface[0]),
|
ASIC_DATA(DiskInterface[0]),
|
||||||
ASIC_MISC_REG(DiskInterface[1]),
|
ASIC_MISC_REG(DiskInterface[1]),
|
||||||
|
@ -131,7 +123,7 @@ CRegisters::CRegisters(CN64System * System, CSystemEvents * SystemEvents) :
|
||||||
RDRAMInterfaceReg(m_RDRAM_Interface),
|
RDRAMInterfaceReg(m_RDRAM_Interface),
|
||||||
SPRegistersReg(m_SigProcessor_Interface),
|
SPRegistersReg(m_SigProcessor_Interface),
|
||||||
DisplayControlReg(m_Display_ControlReg),
|
DisplayControlReg(m_Display_ControlReg),
|
||||||
Serial_InterfaceReg(m_SerialInterface),
|
SerialInterfaceReg(m_SerialInterface),
|
||||||
Disk_InterfaceReg(m_DiskInterface),
|
Disk_InterfaceReg(m_DiskInterface),
|
||||||
m_System(System),
|
m_System(System),
|
||||||
m_SystemEvents(SystemEvents)
|
m_SystemEvents(SystemEvents)
|
||||||
|
|
|
@ -8,6 +8,7 @@
|
||||||
#include <Project64-core\N64System\MemoryHandler\PeripheralInterfaceHandler.h>
|
#include <Project64-core\N64System\MemoryHandler\PeripheralInterfaceHandler.h>
|
||||||
#include <Project64-core\N64System\MemoryHandler\RDRAMInterfaceHandler.h>
|
#include <Project64-core\N64System\MemoryHandler\RDRAMInterfaceHandler.h>
|
||||||
#include <Project64-core\N64System\MemoryHandler\RDRAMRegistersHandler.h>
|
#include <Project64-core\N64System\MemoryHandler\RDRAMRegistersHandler.h>
|
||||||
|
#include <Project64-core\N64System\MemoryHandler\SerialInterfaceHandler.h>
|
||||||
#include <Project64-core\N64System\MemoryHandler\SPRegistersHandler.h>
|
#include <Project64-core\N64System\MemoryHandler\SPRegistersHandler.h>
|
||||||
#include <Project64-core\N64System\MemoryHandler\VideoInterfaceHandler.h>
|
#include <Project64-core\N64System\MemoryHandler\VideoInterfaceHandler.h>
|
||||||
#include <Project64-core\Settings\DebugSettings.h>
|
#include <Project64-core\Settings\DebugSettings.h>
|
||||||
|
@ -221,32 +222,6 @@ enum
|
||||||
PI_CLR_INTR = 0x02,
|
PI_CLR_INTR = 0x02,
|
||||||
};
|
};
|
||||||
|
|
||||||
class Serial_InterfaceReg
|
|
||||||
{
|
|
||||||
protected:
|
|
||||||
Serial_InterfaceReg (uint32_t * SerialInterface);
|
|
||||||
|
|
||||||
public:
|
|
||||||
uint32_t & SI_DRAM_ADDR_REG;
|
|
||||||
uint32_t & SI_PIF_ADDR_RD64B_REG;
|
|
||||||
uint32_t & SI_PIF_ADDR_WR64B_REG;
|
|
||||||
uint32_t & SI_STATUS_REG;
|
|
||||||
|
|
||||||
private:
|
|
||||||
Serial_InterfaceReg();
|
|
||||||
Serial_InterfaceReg(const Serial_InterfaceReg&);
|
|
||||||
Serial_InterfaceReg& operator=(const Serial_InterfaceReg&);
|
|
||||||
};
|
|
||||||
|
|
||||||
// Serial interface flags
|
|
||||||
enum
|
|
||||||
{
|
|
||||||
SI_STATUS_DMA_BUSY = 0x0001,
|
|
||||||
SI_STATUS_RD_BUSY = 0x0002,
|
|
||||||
SI_STATUS_DMA_ERROR = 0x0008,
|
|
||||||
SI_STATUS_INTERRUPT = 0x1000,
|
|
||||||
};
|
|
||||||
|
|
||||||
// Disk interface
|
// Disk interface
|
||||||
class Disk_InterfaceReg
|
class Disk_InterfaceReg
|
||||||
{
|
{
|
||||||
|
@ -357,7 +332,7 @@ class CRegisters :
|
||||||
public RDRAMInterfaceReg,
|
public RDRAMInterfaceReg,
|
||||||
public SPRegistersReg,
|
public SPRegistersReg,
|
||||||
public DisplayControlReg,
|
public DisplayControlReg,
|
||||||
public Serial_InterfaceReg,
|
public SerialInterfaceReg,
|
||||||
public Disk_InterfaceReg
|
public Disk_InterfaceReg
|
||||||
{
|
{
|
||||||
public:
|
public:
|
||||||
|
|
|
@ -59,6 +59,7 @@
|
||||||
<ClCompile Include="N64System\MemoryHandler\PeripheralInterfaceHandler.cpp" />
|
<ClCompile Include="N64System\MemoryHandler\PeripheralInterfaceHandler.cpp" />
|
||||||
<ClCompile Include="N64System\MemoryHandler\RDRAMInterfaceHandler.cpp" />
|
<ClCompile Include="N64System\MemoryHandler\RDRAMInterfaceHandler.cpp" />
|
||||||
<ClCompile Include="N64System\MemoryHandler\RDRAMRegistersHandler.cpp" />
|
<ClCompile Include="N64System\MemoryHandler\RDRAMRegistersHandler.cpp" />
|
||||||
|
<ClCompile Include="N64System\MemoryHandler\SerialInterfaceHandler.cpp" />
|
||||||
<ClCompile Include="N64System\MemoryHandler\SPRegistersHandler.cpp" />
|
<ClCompile Include="N64System\MemoryHandler\SPRegistersHandler.cpp" />
|
||||||
<ClCompile Include="N64System\MemoryHandler\VideoInterfaceHandler.cpp" />
|
<ClCompile Include="N64System\MemoryHandler\VideoInterfaceHandler.cpp" />
|
||||||
<ClCompile Include="N64System\Mips\Disk.cpp" />
|
<ClCompile Include="N64System\Mips\Disk.cpp" />
|
||||||
|
@ -162,6 +163,7 @@
|
||||||
<ClInclude Include="N64System\MemoryHandler\PeripheralInterfaceHandler.h" />
|
<ClInclude Include="N64System\MemoryHandler\PeripheralInterfaceHandler.h" />
|
||||||
<ClInclude Include="N64System\MemoryHandler\RDRAMInterfaceHandler.h" />
|
<ClInclude Include="N64System\MemoryHandler\RDRAMInterfaceHandler.h" />
|
||||||
<ClInclude Include="N64System\MemoryHandler\RDRAMRegistersHandler.h" />
|
<ClInclude Include="N64System\MemoryHandler\RDRAMRegistersHandler.h" />
|
||||||
|
<ClInclude Include="N64System\MemoryHandler\SerialInterfaceHandler.h" />
|
||||||
<ClInclude Include="N64System\MemoryHandler\SPRegistersHandler.h" />
|
<ClInclude Include="N64System\MemoryHandler\SPRegistersHandler.h" />
|
||||||
<ClInclude Include="N64System\MemoryHandler\VideoInterfaceHandler.h" />
|
<ClInclude Include="N64System\MemoryHandler\VideoInterfaceHandler.h" />
|
||||||
<ClInclude Include="N64System\Mips\Disk.h" />
|
<ClInclude Include="N64System\Mips\Disk.h" />
|
||||||
|
|
|
@ -378,6 +378,9 @@
|
||||||
<ClCompile Include="N64System\MemoryHandler\AudioInterfaceHandler.cpp">
|
<ClCompile Include="N64System\MemoryHandler\AudioInterfaceHandler.cpp">
|
||||||
<Filter>Source Files\N64 System\MemoryHandler</Filter>
|
<Filter>Source Files\N64 System\MemoryHandler</Filter>
|
||||||
</ClCompile>
|
</ClCompile>
|
||||||
|
<ClCompile Include="N64System\MemoryHandler\SerialInterfaceHandler.cpp">
|
||||||
|
<Filter>Source Files\N64 System\MemoryHandler</Filter>
|
||||||
|
</ClCompile>
|
||||||
</ItemGroup>
|
</ItemGroup>
|
||||||
<ItemGroup>
|
<ItemGroup>
|
||||||
<ClInclude Include="stdafx.h">
|
<ClInclude Include="stdafx.h">
|
||||||
|
@ -722,6 +725,9 @@
|
||||||
<ClInclude Include="N64System\MemoryHandler\AudioInterfaceHandler.h">
|
<ClInclude Include="N64System\MemoryHandler\AudioInterfaceHandler.h">
|
||||||
<Filter>Header Files\N64 System\MemoryHandler</Filter>
|
<Filter>Header Files\N64 System\MemoryHandler</Filter>
|
||||||
</ClInclude>
|
</ClInclude>
|
||||||
|
<ClInclude Include="N64System\MemoryHandler\SerialInterfaceHandler.h">
|
||||||
|
<Filter>Header Files\N64 System\MemoryHandler</Filter>
|
||||||
|
</ClInclude>
|
||||||
</ItemGroup>
|
</ItemGroup>
|
||||||
<ItemGroup>
|
<ItemGroup>
|
||||||
<None Include="Version.h.in">
|
<None Include="Version.h.in">
|
||||||
|
|
Loading…
Reference in New Issue