diff --git a/Source/Project64/N64 System/Interpreter/Interpreter CPU.cpp b/Source/Project64/N64 System/Interpreter/Interpreter CPU.cpp
index 150ddb5a7..35bfbd6dd 100644
--- a/Source/Project64/N64 System/Interpreter/Interpreter CPU.cpp	
+++ b/Source/Project64/N64 System/Interpreter/Interpreter CPU.cpp	
@@ -337,7 +337,7 @@ void CInterpreterCPU::ExecuteOps ( int Cycles )
 					//WriteTraceF((TraceType)(TraceError | TraceNoHeader),"%X: %d %d",*_PROGRAM_COUNTER,*g_NextTimer,g_SystemTimer->CurrentType());
 				}*/				
 				m_R4300i_Opcode[ Opcode.op ]();
-				_GPR[0].DW = 0;
+				_GPR[0].DW = 0; /* MIPS $zero hard-wired to 0 */
 
 				Cycles -= CountPerOp;
 				*g_NextTimer -= CountPerOp;
diff --git a/Source/Project64/N64 System/Interpreter/Interpreter Ops 32.cpp b/Source/Project64/N64 System/Interpreter/Interpreter Ops 32.cpp
index 9cc1eff5f..55b4e8b5f 100644
--- a/Source/Project64/N64 System/Interpreter/Interpreter Ops 32.cpp	
+++ b/Source/Project64/N64 System/Interpreter/Interpreter Ops 32.cpp	
@@ -709,7 +709,6 @@ void R4300iOp32::ADDI (void) {
 		StackValue += (short)m_Opcode.immediate;
 	}
 #endif
-	if (m_Opcode.rt == 0) { return; }
 	_GPR[m_Opcode.rt].W[0] = (_GPR[m_Opcode.rs].W[0] + ((short)m_Opcode.immediate));
 #ifdef Interpreter_StackTest
 	if (m_Opcode.rt == 29 && m_Opcode.rs != 29) {
@@ -761,7 +760,6 @@ void R4300iOp32::XORI (void) {
 }
 
 void R4300iOp32::LUI (void) {
-	if (m_Opcode.rt == 0) { return; }
 	_GPR[m_Opcode.rt].W[0] = (long)((short)m_Opcode.offset << 16);
 #ifdef Interpreter_StackTest
 	if (m_Opcode.rt == 29) {
@@ -840,7 +838,6 @@ void R4300iOp32::BGTZL (void) {
 
 void R4300iOp32::LB (void) {
 	DWORD Address =  _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;	
-	if (m_Opcode.rt == 0) { return; }
 	if (!g_MMU->LB_VAddr(Address,_GPR[m_Opcode.rt].UB[0])) {
 		if (bShowTLBMisses()) {
 			g_Notify->DisplayError(L"LB TLB: %X",Address);
@@ -892,8 +889,6 @@ void R4300iOp32::LW (void) {
 		Log_LW((*_PROGRAM_COUNTER),Address);
 	}
 
-	if (m_Opcode.rt == 0) { return; }
-
 	if (!g_MMU->LW_VAddr(Address,_GPR[m_Opcode.rt].UW[0])) {
 		if (bShowTLBMisses()) {
 			g_Notify->DisplayError(L"LW TLB: %X",Address);
@@ -952,7 +947,6 @@ void R4300iOp32::LWR (void) {
 void R4300iOp32::LWU (void) {
 	DWORD Address =  _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;	
 	if ((Address & 3) != 0) { ADDRESS_ERROR_EXCEPTION(Address,TRUE); }
-	if (m_Opcode.rt == 0) { return; }
 
 	if (!g_MMU->LW_VAddr(Address,_GPR[m_Opcode.rt].UW[0])) {
 		if (bShowTLBMisses()) {
@@ -969,8 +963,6 @@ void R4300iOp32::LL (void) {
 	DWORD Address =  _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;	
 	if ((Address & 3) != 0) { ADDRESS_ERROR_EXCEPTION(Address,TRUE); }
 
-	if (m_Opcode.rt == 0) { return; }
-
 	if (!g_MMU->LW_VAddr(Address,_GPR[m_Opcode.rt].UW[0])) {
 		if (bShowTLBMisses()) {
 			g_Notify->DisplayError(L"LL TLB: %X",Address);
@@ -996,7 +988,6 @@ void R4300iOp32::SPECIAL_SRA (void) {
 }
 
 void R4300iOp32::SPECIAL_SLLV (void) {
-	if (m_Opcode.rd == 0) { return; }
 	_GPR[m_Opcode.rd].W[0] = (_GPR[m_Opcode.rt].W[0] << (_GPR[m_Opcode.rs].UW[0] & 0x1F));
 }
 
diff --git a/Source/Project64/N64 System/Interpreter/Interpreter Ops.cpp b/Source/Project64/N64 System/Interpreter/Interpreter Ops.cpp
index b34179476..639325889 100644
--- a/Source/Project64/N64 System/Interpreter/Interpreter Ops.cpp	
+++ b/Source/Project64/N64 System/Interpreter/Interpreter Ops.cpp	
@@ -814,7 +814,6 @@ void R4300iOp::ADDI (void)
 		StackValue += (short)m_Opcode.immediate;
 	}
 #endif
-	if (m_Opcode.rt == 0) { return; }
 	_GPR[m_Opcode.rt].DW = (_GPR[m_Opcode.rs].W[0] + ((short)m_Opcode.immediate));
 #ifdef Interpreter_StackTest
 	if (m_Opcode.rt == 29 && m_Opcode.rs != 29) {
@@ -873,7 +872,6 @@ void R4300iOp::XORI (void)
 
 void R4300iOp::LUI (void)
 {
-	if (m_Opcode.rt == 0) { return; }
 	_GPR[m_Opcode.rt].DW = (long)((short)m_Opcode.offset << 16);
 #ifdef Interpreter_StackTest
 	if (m_Opcode.rt == 29) {
@@ -1016,7 +1014,6 @@ void R4300iOp::LDR (void)
 void R4300iOp::LB (void)
 {
 	DWORD Address =  _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;	
-	if (m_Opcode.rt == 0) { return; }
 	if (!g_MMU->LB_VAddr(Address,_GPR[m_Opcode.rt].UB[0])) {
 		if (bShowTLBMisses()) {
 			g_Notify->DisplayError(L"LB TLB: %X",Address);
@@ -1072,8 +1069,6 @@ void R4300iOp::LW (void)
 		Log_LW((*_PROGRAM_COUNTER),Address);
 	}
 
-	if (m_Opcode.rt == 0) { return; }
-
 	if (!g_MMU->LW_VAddr(Address,_GPR[m_Opcode.rt].UW[0])) {
 		if (bShowTLBMisses()) {
 			g_Notify->DisplayError(L"LW TLB: %X",Address);
@@ -1136,7 +1131,6 @@ void R4300iOp::LWU (void)
 {
 	DWORD Address =  _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;	
 	if ((Address & 3) != 0) { ADDRESS_ERROR_EXCEPTION(Address,TRUE); }
-	if (m_Opcode.rt == 0) { return; }
 
 	if (!g_MMU->LW_VAddr(Address,_GPR[m_Opcode.rt].UW[0])) {
 		if (bShowTLBMisses()) {
@@ -1381,8 +1375,6 @@ void R4300iOp::LL (void)
 	DWORD Address =  _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;	
 	if ((Address & 3) != 0) { ADDRESS_ERROR_EXCEPTION(Address,TRUE); }
 
-	if (m_Opcode.rt == 0) { return; }
-
 	if (!g_MMU->LW_VAddr(Address,_GPR[m_Opcode.rt].UW[0])) 
 	{
 		if (bShowTLBMisses()) 
@@ -1543,7 +1535,6 @@ void R4300iOp::SPECIAL_SRA (void)
 
 void R4300iOp::SPECIAL_SLLV (void)
 {
-	if (m_Opcode.rd == 0) { return; }
 	_GPR[m_Opcode.rd].DW = (_GPR[m_Opcode.rt].W[0] << (_GPR[m_Opcode.rs].UW[0] & 0x1F));
 }