[Project64] Move fpu used in to Reg Base
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5a62e305f6
commit
d1be767d24
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@ -12,12 +12,55 @@
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#include <Project64-core/N64System/Recompiler/RegBase.h>
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#include <Project64-core/N64System/Recompiler/RegBase.h>
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CRegBase::CRegBase() :
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CRegBase::CRegBase() :
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m_CycleCount(0)
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m_CycleCount(0),
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m_Fpu_Used(false)
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{
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{
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m_MIPS_RegState[0] = STATE_CONST_32_SIGN;
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for (int32_t i = 0; i < 32; i++)
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for (int32_t i = 1; i < 32; i++)
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{
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{
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m_MIPS_RegState[i] = STATE_UNKNOWN;
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m_MIPS_RegState[i] = STATE_UNKNOWN;
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m_MIPS_RegVal[i].DW = 0;
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m_MIPS_RegVal[i].DW = 0;
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}
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}
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m_MIPS_RegState[0] = STATE_CONST_32_SIGN;
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}
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bool CRegBase::operator==(const CRegBase& right) const
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{
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for (uint32_t count = 0; count < 32; count++)
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{
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if (m_MIPS_RegState[count] != right.m_MIPS_RegState[count])
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{
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return false;
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}
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if (m_MIPS_RegState[count] == STATE_UNKNOWN)
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{
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continue;
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}
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if (m_MIPS_RegVal[count].DW != right.m_MIPS_RegVal[count].DW)
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{
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return false;
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}
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}
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if (m_CycleCount != right.m_CycleCount) { return false; }
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if (m_Fpu_Used != right.m_Fpu_Used) { return false; }
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return true;
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}
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bool CRegBase::operator!=(const CRegBase& right) const
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{
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return !(right == *this);
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}
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CRegBase& CRegBase::operator=(const CRegBase& right)
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{
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memcpy(&m_MIPS_RegState, &right.m_MIPS_RegState, sizeof(m_MIPS_RegState));
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memcpy(&m_MIPS_RegVal, &right.m_MIPS_RegVal, sizeof(m_MIPS_RegVal));
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m_CycleCount = right.m_CycleCount;
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m_Fpu_Used = right.m_Fpu_Used;
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#ifdef _DEBUG
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if (*this != right)
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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#endif
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return *this;
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}
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}
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@ -69,8 +69,17 @@ public:
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void SetBlockCycleCount(uint32_t CyleCount) { m_CycleCount = CyleCount; }
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void SetBlockCycleCount(uint32_t CyleCount) { m_CycleCount = CyleCount; }
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uint32_t GetBlockCycleCount() const { return m_CycleCount; }
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uint32_t GetBlockCycleCount() const { return m_CycleCount; }
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void SetFpuBeenUsed(bool FpuUsed) { m_Fpu_Used = FpuUsed; }
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bool GetFpuBeenUsed() const { return m_Fpu_Used; }
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CRegBase& operator=(const CRegBase&);
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bool operator==(const CRegBase& right) const;
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bool operator!=(const CRegBase& right) const;
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protected:
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protected:
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REG_STATE m_MIPS_RegState[32];
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REG_STATE m_MIPS_RegState[32];
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MIPS_DWORD m_MIPS_RegVal[32];
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MIPS_DWORD m_MIPS_RegVal[32];
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uint32_t m_CycleCount;
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uint32_t m_CycleCount;
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bool m_Fpu_Used;
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};
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};
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@ -8851,12 +8851,14 @@ void CX86RecompilerOps::CompileExitCode()
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void CX86RecompilerOps::CompileCop1Test()
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void CX86RecompilerOps::CompileCop1Test()
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{
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{
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if (m_RegWorkingSet.FpuBeenUsed())
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if (m_RegWorkingSet.GetFpuBeenUsed())
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{
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return;
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return;
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}
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TestVariable(STATUS_CU1, &g_Reg->STATUS_REGISTER, "STATUS_REGISTER");
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TestVariable(STATUS_CU1, &g_Reg->STATUS_REGISTER, "STATUS_REGISTER");
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CompileExit(m_CompilePC, m_CompilePC, m_RegWorkingSet, CExitInfo::COP1_Unuseable, false, JeLabel32);
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CompileExit(m_CompilePC, m_CompilePC, m_RegWorkingSet, CExitInfo::COP1_Unuseable, false, JeLabel32);
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m_RegWorkingSet.FpuBeenUsed() = true;
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m_RegWorkingSet.SetFpuBeenUsed(true);
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}
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}
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void CX86RecompilerOps::CompileInPermLoop(CRegInfo & RegSet, uint32_t ProgramCounter)
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void CX86RecompilerOps::CompileInPermLoop(CRegInfo & RegSet, uint32_t ProgramCounter)
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@ -11456,4 +11458,4 @@ void CX86RecompilerOps::ResetMemoryStack()
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MoveX86regToVariable(Reg, &(g_Recompiler->MemoryStackPos()), "MemoryStack");
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MoveX86regToVariable(Reg, &(g_Recompiler->MemoryStackPos()), "MemoryStack");
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}
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}
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#endif
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#endif
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@ -27,10 +27,8 @@ const char *Format_Name[] = { "Unknown", "dword", "qword", "float", "double" };
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CX86RegInfo::CX86RegInfo() :
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CX86RegInfo::CX86RegInfo() :
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m_Stack_TopPos(0),
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m_Stack_TopPos(0),
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m_Fpu_Used(false),
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m_RoundingModel(RoundUnknown)
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m_RoundingModel(RoundUnknown)
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{
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{
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m_MIPS_RegVal[0].DW = 0;
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m_RegMapLo[0] = x86_Unknown;
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m_RegMapLo[0] = x86_Unknown;
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m_RegMapHi[0] = x86_Unknown;
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m_RegMapHi[0] = x86_Unknown;
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@ -65,13 +63,10 @@ CX86RegInfo::~CX86RegInfo()
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CX86RegInfo& CX86RegInfo::operator=(const CX86RegInfo& right)
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CX86RegInfo& CX86RegInfo::operator=(const CX86RegInfo& right)
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{
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{
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m_CycleCount = right.m_CycleCount;
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CRegBase::operator=(right);
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m_Stack_TopPos = right.m_Stack_TopPos;
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m_Stack_TopPos = right.m_Stack_TopPos;
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m_Fpu_Used = right.m_Fpu_Used;
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m_RoundingModel = right.m_RoundingModel;
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m_RoundingModel = right.m_RoundingModel;
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memcpy(&m_MIPS_RegState, &right.m_MIPS_RegState, sizeof(m_MIPS_RegState));
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memcpy(&m_MIPS_RegVal, &right.m_MIPS_RegVal, sizeof(m_MIPS_RegVal));
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memcpy(&m_RegMapLo, &right.m_RegMapLo, sizeof(m_RegMapLo));
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memcpy(&m_RegMapLo, &right.m_RegMapLo, sizeof(m_RegMapLo));
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memcpy(&m_RegMapHi, &right.m_RegMapHi, sizeof(m_RegMapHi));
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memcpy(&m_RegMapHi, &right.m_RegMapHi, sizeof(m_RegMapHi));
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memcpy(&m_x86reg_MappedTo, &right.m_x86reg_MappedTo, sizeof(m_x86reg_MappedTo));
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memcpy(&m_x86reg_MappedTo, &right.m_x86reg_MappedTo, sizeof(m_x86reg_MappedTo));
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@ -94,30 +89,19 @@ CX86RegInfo& CX86RegInfo::operator=(const CX86RegInfo& right)
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bool CX86RegInfo::operator==(const CX86RegInfo& right) const
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bool CX86RegInfo::operator==(const CX86RegInfo& right) const
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{
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{
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if (!CRegBase::operator==(right))
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{
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return false;
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}
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int32_t count;
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int32_t count;
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for (count = 0; count < 32; count++)
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{
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if (m_MIPS_RegState[count] != right.m_MIPS_RegState[count])
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{
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return false;
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}
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if (m_MIPS_RegState[count] == STATE_UNKNOWN)
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{
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continue;
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}
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if (m_MIPS_RegVal[count].DW != right.m_MIPS_RegVal[count].DW)
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{
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return false;
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}
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}
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for (count = 0; count < 10; count++)
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for (count = 0; count < 10; count++)
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{
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{
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if (m_x86reg_MappedTo[count] != right.m_x86reg_MappedTo[count]) { return false; }
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if (m_x86reg_MappedTo[count] != right.m_x86reg_MappedTo[count]) { return false; }
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if (m_x86reg_Protected[count] != right.m_x86reg_Protected[count]) { return false; }
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if (m_x86reg_Protected[count] != right.m_x86reg_Protected[count]) { return false; }
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if (m_x86reg_MapOrder[count] != right.m_x86reg_MapOrder[count]) { return false; }
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if (m_x86reg_MapOrder[count] != right.m_x86reg_MapOrder[count]) { return false; }
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}
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}
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if (m_CycleCount != right.m_CycleCount) { return false; }
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if (m_Stack_TopPos != right.m_Stack_TopPos) { return false; }
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if (m_Stack_TopPos != right.m_Stack_TopPos) { return false; }
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for (count = 0; count < 8; count++)
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for (count = 0; count < 8; count++)
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@ -108,7 +108,6 @@ public:
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int32_t & FpuMappedTo(int32_t Reg) { return m_x86fpu_MappedTo[Reg]; }
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int32_t & FpuMappedTo(int32_t Reg) { return m_x86fpu_MappedTo[Reg]; }
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FPU_STATE & FpuState(int32_t Reg) { return m_x86fpu_State[Reg]; }
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FPU_STATE & FpuState(int32_t Reg) { return m_x86fpu_State[Reg]; }
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FPU_ROUND & FpuRoundingModel(int32_t Reg) { return m_x86fpu_RoundingModel[Reg]; }
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FPU_ROUND & FpuRoundingModel(int32_t Reg) { return m_x86fpu_RoundingModel[Reg]; }
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bool & FpuBeenUsed() { return m_Fpu_Used; }
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FPU_ROUND GetRoundingModel() const { return m_RoundingModel; }
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FPU_ROUND GetRoundingModel() const { return m_RoundingModel; }
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void SetRoundingModel(FPU_ROUND RoundingModel) { m_RoundingModel = RoundingModel; }
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void SetRoundingModel(FPU_ROUND RoundingModel) { m_RoundingModel = RoundingModel; }
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@ -132,7 +131,6 @@ private:
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bool m_x86fpu_StateChanged[8];
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bool m_x86fpu_StateChanged[8];
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FPU_ROUND m_x86fpu_RoundingModel[8];
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FPU_ROUND m_x86fpu_RoundingModel[8];
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bool m_Fpu_Used;
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FPU_ROUND m_RoundingModel;
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FPU_ROUND m_RoundingModel;
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static uint32_t m_fpuControl;
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static uint32_t m_fpuControl;
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