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Core: Implement COP1_S_DIV with fpu exceptions

This commit is contained in:
zilmar 2023-12-21 14:11:29 +10:30
parent 8e54ec8c8e
commit d14a639a62
1 changed files with 49 additions and 24 deletions
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25
Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.cpp
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@ -7768,6 +7768,30 @@ void CX86RecompilerOps::COP1_S_MUL()
void CX86RecompilerOps::COP1_S_DIV()
{
if (FpuExceptionInRecompiler())
{
CompileInitFpuOperation(CRegInfo::RoundDefault);
if (m_RegWorkingSet.RegInStack(m_Opcode.fs, CRegInfo::FPU_Float))
{
g_Notify->BreakPoint(__FILE__, __LINE__);
return;
}
else
{
asmjit::x86::Gp TempReg = m_RegWorkingSet.FPRValuePointer(m_Opcode.fs, CRegInfo::FPU_Float);
CompileCheckFPUInput32(TempReg);
m_RegWorkingSet.SetX86Protected(GetIndexFromX86Reg(TempReg), false);
TempReg = m_RegWorkingSet.FPRValuePointer(m_Opcode.ft, CRegInfo::FPU_Float);
CompileCheckFPUInput32(TempReg);
m_RegWorkingSet.PrepareFPTopToBe(m_Opcode.fd, m_Opcode.fs, CRegInfo::FPU_Float);
m_Assembler.fdiv(asmjit::x86::dword_ptr(TempReg));
m_RegWorkingSet.SetX86Protected(GetIndexFromX86Reg(TempReg), false);
}
CompileCheckFPUResult32(m_Opcode.fd);
m_RegWorkingSet.SetFPTopAs(m_Opcode.fd);
}
else
{
uint32_t Reg1 = m_Opcode.ft == m_Opcode.fd ? m_Opcode.ft : m_Opcode.fs;
uint32_t Reg2 = m_Opcode.ft == m_Opcode.fd ? m_Opcode.fs : m_Opcode.ft;
@ -7802,6 +7826,7 @@ void CX86RecompilerOps::COP1_S_DIV()
}
m_RegWorkingSet.UnMap_FPR(m_Opcode.fd, true);
}
}
void CX86RecompilerOps::COP1_S_ABS()